Lines Matching +full:cfg +full:- +full:space

1 /*-
2  * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
101 u_int			 siba_cfg_agent_port(u_int cfg);
102 u_int			 siba_cfg_agent_region(u_int cfg);
131 	    (_dinfo->core_id.core_info.core_idx * SIBA_MAX_CFG))
133 /* Sonics/OCP address space mappings */
134 #define	SIBA_CORE_ADDRSPACE	0	/**< Address space mapping the primary
138 					  *  address space mappings for a
141 /* bhnd(4) (port,region) representation of siba address space mappings */
153 /** siba(4) address space descriptor */
159 					  *  address space reserved for the bus */
172 	int		rid;	/**< bus resource id, or -1 if unassigned */
177  * siba(4) per-core identification info.
182 								  *  the JEDEC-106 bhnd(4) vendor identifier. */
190 								     space */
194  * siba(4) per-core PMU allocation state.
200 	SIBA_PMU_FIXED,		/**< If legacy fixed (no-op) PMU support should be used */
204  * siba(4) per-device info
207 	struct resource_list	 resources;			/**< per-core memory regions. */
210 	struct siba_cfg_block	 cfg[SIBA_MAX_CFG];		/**< config block descriptors */  member
213 	struct bhnd_resource	*cfg_res[SIBA_MAX_CFG];		/**< bus-mapped config block registers */
214 	int			 cfg_rid[SIBA_MAX_CFG];		/**< bus-mapped config block resource IDs */
215 	siba_pmu_state		 pmu_state;			/**< per-core PMU state */
217 		void		*bhnd_info;	/**< if SIBA_PMU_BHND, bhnd(4)-managed per-core PMU info. */
222 /** siba(4) per-instance state */
230     mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), NULL, MTX_DEF)
231 #define	SIBA_LOCK(sc)			mtx_lock(&(sc)->mtx)
232 #define	SIBA_UNLOCK(sc)			mtx_unlock(&(sc)->mtx)
233 #define	SIBA_LOCK_ASSERT(sc, what)	mtx_assert(&(sc)->mtx, what)
234 #define	SIBA_LOCK_DESTROY(sc)		mtx_destroy(&(sc)->mtx)