1 /*-
2  * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
55  * Map a siba(4) OCP vendor code to its corresponding JEDEC JEP-106 vendor
89 	for (u_int i = 0; i < nitems(dinfo->cfg); i++) {  in siba_alloc_dinfo()
90 		dinfo->cfg[i] = ((struct siba_cfg_block){  in siba_alloc_dinfo()
93 			.cb_rid = -1,  in siba_alloc_dinfo()
95 		dinfo->cfg_res[i] = NULL;  in siba_alloc_dinfo()
96 		dinfo->cfg_rid[i] = -1;  in siba_alloc_dinfo()
99 	resource_list_init(&dinfo->resources);  in siba_alloc_dinfo()
101 	dinfo->pmu_state = SIBA_PMU_NONE;  in siba_alloc_dinfo()
103 	dinfo->intr = (struct siba_intr) {  in siba_alloc_dinfo()
105 		.rid = -1  in siba_alloc_dinfo()
121  * @retval non-zero initialization failed.
129 	dinfo->core_id = *core_id;  in siba_init_dinfo()
132 	for (uint8_t i = 0; i < core_id->num_admatch; i++) {  in siba_init_dinfo()
140 			bus_reserved = core_id->num_cfg_blocks * SIBA_CFG_SIZE;  in siba_init_dinfo()
144 		    core_id->admatch[i].am_base, core_id->admatch[i].am_size,  in siba_init_dinfo()
172 	if (!dinfo->core_id.intr_en)  in siba_register_interrupts()
176 	dinfo->intr.mapped = false;  in siba_register_interrupts()
177 	dinfo->intr.irq = 0;  in siba_register_interrupts()
178 	dinfo->intr.rid = -1;  in siba_register_interrupts()
182 	    &dinfo->intr.irq);  in siba_register_interrupts()
185 		    "%d\n", dinfo->core_id.core_info.core_idx, error);  in siba_register_interrupts()
188 	dinfo->intr.mapped = true;  in siba_register_interrupts()
191 	dinfo->intr.rid = resource_list_add_next(&dinfo->resources, SYS_RES_IRQ,  in siba_register_interrupts()
192 	    dinfo->intr.irq, dinfo->intr.irq, 1);  in siba_register_interrupts()
224 	 * are mapped to device1.0 + (n - 1) */  in siba_addrspace_device_region()
228 		return (addrspace - 1);  in siba_addrspace_device_region()
273 		return (min(core_id->num_admatch, 2));  in siba_port_count()
277 		if (core_id->num_cfg_blocks > 0)  in siba_port_count()
327 			return (min(core_id->num_admatch, 1));  in siba_port_region_count()
329 		/* All remaining address spaces are mapped to device0.(n - 1) */  in siba_port_region_count()
330 		if (port == 1 && core_id->num_admatch >= 2)  in siba_port_region_count()
331 			return (core_id->num_admatch - 1);  in siba_port_region_count()
338 			return (core_id->num_cfg_blocks);  in siba_port_region_count()
383 	if (region >= core_id->num_cfg_blocks)  in siba_cfg_index()
413 	error = siba_cfg_index(&dinfo->core_id, type, port, region, &cfgidx);  in siba_find_cfg_block()
418 	return (&dinfo->cfg[cfgidx]);  in siba_find_cfg_block()
425  * For compatibility with bcma(4), we map address spaces to port/region
450 	/* Address spaces are always device ports */  in siba_addrspace_index()
465 	if (idx >= core_id->num_admatch)  in siba_addrspace_index()
492 	error = siba_addrspace_index(&dinfo->core_id, type, port, region,  in siba_find_addrspace()
501 	return (&dinfo->addrspace[addridx]);  in siba_find_addrspace()
516  * @retval non-zero An error occurred appending the entry.
526 	if (size > 0 && UINT32_MAX - (size - 1) < base)  in siba_append_dinfo_region()
529 	/* Verify that size - bus_reserved will not underflow */  in siba_append_dinfo_region()
533 	/* Must not be 0-length */  in siba_append_dinfo_region()
538 	if (addridx >= nitems(dinfo->addrspace))  in siba_append_dinfo_region()
542 	sa = &dinfo->addrspace[addridx];  in siba_append_dinfo_region()
543 	sa->sa_base = base;  in siba_append_dinfo_region()
544 	sa->sa_size = size;  in siba_append_dinfo_region()
545 	sa->sa_bus_reserved = bus_reserved;  in siba_append_dinfo_region()
548 	r_size = size - bus_reserved;  in siba_append_dinfo_region()
549 	sa->sa_rid = resource_list_add_next(&dinfo->resources, SYS_RES_MEMORY,  in siba_append_dinfo_region()
550 	    base, base + (r_size - 1), r_size);  in siba_append_dinfo_region()
565 	resource_list_free(&dinfo->resources);  in siba_free_dinfo()
568 	for (u_int i = 0; i < nitems(dinfo->cfg); i++) {  in siba_free_dinfo()
569 		if (dinfo->cfg_res[i] == NULL)  in siba_free_dinfo()
572 		bhnd_release_resource(dev, SYS_RES_MEMORY, dinfo->cfg_rid[i],  in siba_free_dinfo()
573 		    dinfo->cfg_res[i]);  in siba_free_dinfo()
575 		dinfo->cfg_res[i] = NULL;  in siba_free_dinfo()
576 		dinfo->cfg_rid[i] = -1;  in siba_free_dinfo()
580 	if (dinfo->core_id.intr_en && dinfo->intr.mapped) {  in siba_free_dinfo()
581 		BHND_BUS_UNMAP_INTR(dev, child, dinfo->intr.irq);  in siba_free_dinfo()
582 		dinfo->intr.mapped = false;  in siba_free_dinfo()
589  * Return the core-enumeration-relative offset for the @p addrspace
594  * @retval non-zero success
622  * @retval non-zero a parse error occurred.
635 		admatch->am_base = am & SIBA_AM_BASE0_MASK;  in siba_parse_admatch()
636 		admatch->am_size = 1 << (SIBA_REG_GET(am, AM_ADINT0) + 1);  in siba_parse_admatch()
637 		admatch->am_enabled = true;  in siba_parse_admatch()
638 		admatch->am_negative = false;  in siba_parse_admatch()
641 		admatch->am_base = am & SIBA_AM_BASE1_MASK;  in siba_parse_admatch()
642 		admatch->am_size = 1 << (SIBA_REG_GET(am, AM_ADINT1) + 1);  in siba_parse_admatch()
643 		admatch->am_enabled = ((am & SIBA_AM_ADEN) != 0);  in siba_parse_admatch()
644 		admatch->am_negative = ((am & SIBA_AM_ADNEG) != 0);  in siba_parse_admatch()
647 		admatch->am_base = am & SIBA_AM_BASE2_MASK;  in siba_parse_admatch()
648 		admatch->am_size = 1 << (SIBA_REG_GET(am, AM_ADINT2) + 1);  in siba_parse_admatch()
649 		admatch->am_enabled = ((am & SIBA_AM_ADEN) != 0);  in siba_parse_admatch()
650 		admatch->am_negative = ((am & SIBA_AM_ADNEG) != 0);  in siba_parse_admatch()
661  * required read-back and waiting for completion.
664  * @param reg The CFG0 state register to write (e.g. SIBA_CFG0_TMSTATELOW,
666  * @param value The value to write to @p reg.
671     bus_size_t reg, uint32_t value, uint32_t mask)  in siba_write_target_state()  argument
676 	r = dinfo->cfg_res[0];  in siba_write_target_state()
680 	KASSERT(reg <= SIBA_CFG_SIZE-4, ("%s invalid CFG0 register offset %#jx",  in siba_write_target_state()
681 	    device_get_nameunit(dev), (uintmax_t)reg));  in siba_write_target_state()
683 	rval = bhnd_bus_read_4(r, reg);  in siba_write_target_state()
687 	bhnd_bus_write_4(r, reg, rval);  in siba_write_target_state()
688 	bhnd_bus_read_4(r, reg); /* read-back */  in siba_write_target_state()
699  * @param reg The state register to read (e.g. SIBA_CFG0_TMSTATEHIGH,
701  * @param value The value against which @p reg will be compared.
702  * @param mask The mask to be applied when comparing @p value with @p reg.
710 siba_wait_target_state(device_t dev, struct siba_devinfo *dinfo, bus_size_t reg,  in siba_wait_target_state()  argument
716 	if ((r = dinfo->cfg_res[0]) == NULL)  in siba_wait_target_state()
721 		rval = bhnd_bus_read_4(r, reg);  in siba_wait_target_state()