Lines Matching refs:CSR_READ_4
623 CSR_READ_4(sc, off); in bge_writembx()
965 if (CSR_READ_4(sc, BGE_NVRAM_SWARB) & BGE_NVRAMSWARB_GNT1) in bge_nvram_getbyte()
973 access = CSR_READ_4(sc, BGE_NVRAM_ACCESS); in bge_nvram_getbyte()
980 if (CSR_READ_4(sc, BGE_NVRAM_CMD) & BGE_NVRAMCMD_DONE) { in bge_nvram_getbyte()
992 byte = CSR_READ_4(sc, BGE_NVRAM_RDDATA); in bge_nvram_getbyte()
1001 CSR_READ_4(sc, BGE_NVRAM_SWARB); in bge_nvram_getbyte()
1057 if (CSR_READ_4(sc, BGE_EE_ADDR) & BGE_EEADDR_DONE) in bge_eeprom_getbyte()
1067 byte = CSR_READ_4(sc, BGE_EE_DATA); in bge_eeprom_getbyte()
1118 val = CSR_READ_4(sc, BGE_MI_COMM); in bge_miibus_readreg()
1121 val = CSR_READ_4(sc, BGE_MI_COMM); in bge_miibus_readreg()
1174 if (!(CSR_READ_4(sc, BGE_MI_COMM) & BGE_MICOMM_BUSY)) { in bge_miibus_writereg()
1176 CSR_READ_4(sc, BGE_MI_COMM); /* dummy read */ in bge_miibus_writereg()
1240 mac_mode = CSR_READ_4(sc, BGE_MAC_MODE) & in bge_miibus_statchg()
1242 tx_mode = CSR_READ_4(sc, BGE_TX_MODE); in bge_miibus_statchg()
1243 rx_mode = CSR_READ_4(sc, BGE_RX_MODE); in bge_miibus_statchg()
1704 CSR_READ_4(sc, BGE_RX_CPU_EVENT) | BGE_RX_CPU_DRV_EVENT); in bge_stop_fw()
1707 if (!(CSR_READ_4(sc, BGE_RX_CPU_EVENT) & in bge_stop_fw()
1776 CSR_READ_4(sc, BGE_CPMU_PADRNG_CTL) | in bge_chipinit()
1823 tmp = CSR_READ_4(sc, BGE_PCI_CLKCTL) & 0x1F; in bge_chipinit()
1870 mode_ctl |= CSR_READ_4(sc, BGE_MODE_CTL) & in bge_chipinit()
1911 CSR_READ_4(sc, BGE_MISC_CFG); /* Flush */ in bge_chipinit()
1995 if (CSR_READ_4(sc, BGE_BMAN_MODE) & BGE_BMANMODE_ENABLE) in bge_blockinit()
2011 if (CSR_READ_4(sc, BGE_FTQ_RESET) == 0) in bge_blockinit()
2156 (CSR_READ_4(sc, BGE_ISO_PKT_TX) & ~3) | 2); in bge_blockinit()
2282 val |= CSR_READ_4(sc, BGE_TX_LENGTHS) & in bge_blockinit()
2308 if (!(CSR_READ_4(sc, BGE_HCC_MODE) & BGE_HCCMODE_ENABLE)) in bge_blockinit()
2447 val |= CSR_READ_4(sc, BGE_RDMA_MODE) & in bge_blockinit()
2465 dmactl = CSR_READ_4(sc, rdmareg); in bge_blockinit()
2490 CSR_READ_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL) | in bge_blockinit()
2499 CSR_READ_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL) | in bge_blockinit()
2504 CSR_READ_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL_REG2) | in bge_blockinit()
2514 val = CSR_READ_4(sc, BGE_RDMA_LENGTH + i * 4); in bge_blockinit()
2521 val = CSR_READ_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL); in bge_blockinit()
3247 cfg = CSR_READ_4(sc, BGE_MISC_CFG) & BGE_MISCCFG_BOARD_ID_MASK; in bge_devinfo()
3251 clk = CSR_READ_4(sc, BGE_PCI_CLKCTL) & 0x1F; in bge_devinfo()
3353 if (CSR_READ_4(sc, BGE_SGDIG_STS) & in bge_attach()
3359 if (CSR_READ_4(sc, BGE_CPMU_PHY_STRAP) & in bge_attach()
3501 misccfg = CSR_READ_4(sc, BGE_MISC_CFG) & BGE_MISCCFG_BOARD_ID_MASK; in bge_attach()
3889 CSR_WRITE_4(sc, BGE_MSI_MODE, CSR_READ_4(sc, BGE_MSI_MODE) & in bge_attach()
4009 mac_mode = CSR_READ_4(sc, BGE_MAC_MODE) & mac_mode_mask; in bge_reset()
4024 if (CSR_READ_4(sc, BGE_NVRAM_SWARB) & in bge_reset()
4066 if (CSR_READ_4(sc, 0x7E2C) == 0x60) /* PCIE 1.0 */ in bge_reset()
4077 val = CSR_READ_4(sc, BGE_VCPU_STATUS); in bge_reset()
4080 val = CSR_READ_4(sc, BGE_VCPU_EXT_CTRL); in bge_reset()
4167 val = CSR_READ_4(sc, BGE_MSI_MODE); in bge_reset()
4171 val = CSR_READ_4(sc, BGE_MARB_MODE); in bge_reset()
4179 val = CSR_READ_4(sc, BGE_MAC_MODE); in bge_reset()
4188 val = CSR_READ_4(sc, BGE_VCPU_STATUS); in bge_reset()
4227 val = CSR_READ_4(sc, BGE_SERDES_CFG); in bge_reset()
4238 val = CSR_READ_4(sc, 0x7C00); in bge_reset()
4427 if_incierrors(ifp, CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_DROPS)); in bge_rxeof()
4684 statusword = CSR_READ_4(sc, BGE_MAC_STS) & BGE_MACSTAT_LINK_CHANGED; in bge_intr()
4734 CSR_READ_4(sc, BGE_RX_CPU_EVENT) | in bge_asf_driver_up()
4804 CSR_READ_4(sc, BGE_TX_MAC_STATS_OCTETS); in bge_stats_update_regs()
4806 CSR_READ_4(sc, BGE_TX_MAC_STATS_COLLS); in bge_stats_update_regs()
4808 CSR_READ_4(sc, BGE_TX_MAC_STATS_XON_SENT); in bge_stats_update_regs()
4810 CSR_READ_4(sc, BGE_TX_MAC_STATS_XOFF_SENT); in bge_stats_update_regs()
4812 CSR_READ_4(sc, BGE_TX_MAC_STATS_ERRORS); in bge_stats_update_regs()
4814 CSR_READ_4(sc, BGE_TX_MAC_STATS_SINGLE_COLL); in bge_stats_update_regs()
4816 CSR_READ_4(sc, BGE_TX_MAC_STATS_MULTI_COLL); in bge_stats_update_regs()
4818 CSR_READ_4(sc, BGE_TX_MAC_STATS_DEFERRED); in bge_stats_update_regs()
4820 CSR_READ_4(sc, BGE_TX_MAC_STATS_EXCESS_COLL); in bge_stats_update_regs()
4822 CSR_READ_4(sc, BGE_TX_MAC_STATS_LATE_COLL); in bge_stats_update_regs()
4824 CSR_READ_4(sc, BGE_TX_MAC_STATS_UCAST); in bge_stats_update_regs()
4826 CSR_READ_4(sc, BGE_TX_MAC_STATS_MCAST); in bge_stats_update_regs()
4828 CSR_READ_4(sc, BGE_TX_MAC_STATS_BCAST); in bge_stats_update_regs()
4831 CSR_READ_4(sc, BGE_RX_MAC_STATS_OCTESTS); in bge_stats_update_regs()
4833 CSR_READ_4(sc, BGE_RX_MAC_STATS_FRAGMENTS); in bge_stats_update_regs()
4835 CSR_READ_4(sc, BGE_RX_MAC_STATS_UCAST); in bge_stats_update_regs()
4837 CSR_READ_4(sc, BGE_RX_MAC_STATS_MCAST); in bge_stats_update_regs()
4839 CSR_READ_4(sc, BGE_RX_MAC_STATS_BCAST); in bge_stats_update_regs()
4841 CSR_READ_4(sc, BGE_RX_MAC_STATS_FCS_ERRORS); in bge_stats_update_regs()
4843 CSR_READ_4(sc, BGE_RX_MAC_STATS_ALGIN_ERRORS); in bge_stats_update_regs()
4845 CSR_READ_4(sc, BGE_RX_MAC_STATS_XON_RCVD); in bge_stats_update_regs()
4847 CSR_READ_4(sc, BGE_RX_MAC_STATS_XOFF_RCVD); in bge_stats_update_regs()
4849 CSR_READ_4(sc, BGE_RX_MAC_STATS_CTRL_RCVD); in bge_stats_update_regs()
4851 CSR_READ_4(sc, BGE_RX_MAC_STATS_XOFF_ENTERED); in bge_stats_update_regs()
4853 CSR_READ_4(sc, BGE_RX_MAC_STATS_FRAME_TOO_LONG); in bge_stats_update_regs()
4855 CSR_READ_4(sc, BGE_RX_MAC_STATS_JABBERS); in bge_stats_update_regs()
4857 CSR_READ_4(sc, BGE_RX_MAC_STATS_UNDERSIZE); in bge_stats_update_regs()
4860 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_FILTDROP); in bge_stats_update_regs()
4862 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_DMA_WRQ_FULL); in bge_stats_update_regs()
4864 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_DMA_HPWRQ_FULL); in bge_stats_update_regs()
4866 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_OUT_OF_BDS); in bge_stats_update_regs()
4890 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_DROPS); in bge_stats_update_regs()
4892 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_ERRORS); in bge_stats_update_regs()
4894 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_RXTHRESH_HIT); in bge_stats_update_regs()
4904 val = CSR_READ_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL); in bge_stats_update_regs()
4919 CSR_READ_4(sc, BGE_TX_MAC_STATS_OCTETS); in bge_stats_clear_regs()
4920 CSR_READ_4(sc, BGE_TX_MAC_STATS_COLLS); in bge_stats_clear_regs()
4921 CSR_READ_4(sc, BGE_TX_MAC_STATS_XON_SENT); in bge_stats_clear_regs()
4922 CSR_READ_4(sc, BGE_TX_MAC_STATS_XOFF_SENT); in bge_stats_clear_regs()
4923 CSR_READ_4(sc, BGE_TX_MAC_STATS_ERRORS); in bge_stats_clear_regs()
4924 CSR_READ_4(sc, BGE_TX_MAC_STATS_SINGLE_COLL); in bge_stats_clear_regs()
4925 CSR_READ_4(sc, BGE_TX_MAC_STATS_MULTI_COLL); in bge_stats_clear_regs()
4926 CSR_READ_4(sc, BGE_TX_MAC_STATS_DEFERRED); in bge_stats_clear_regs()
4927 CSR_READ_4(sc, BGE_TX_MAC_STATS_EXCESS_COLL); in bge_stats_clear_regs()
4928 CSR_READ_4(sc, BGE_TX_MAC_STATS_LATE_COLL); in bge_stats_clear_regs()
4929 CSR_READ_4(sc, BGE_TX_MAC_STATS_UCAST); in bge_stats_clear_regs()
4930 CSR_READ_4(sc, BGE_TX_MAC_STATS_MCAST); in bge_stats_clear_regs()
4931 CSR_READ_4(sc, BGE_TX_MAC_STATS_BCAST); in bge_stats_clear_regs()
4933 CSR_READ_4(sc, BGE_RX_MAC_STATS_OCTESTS); in bge_stats_clear_regs()
4934 CSR_READ_4(sc, BGE_RX_MAC_STATS_FRAGMENTS); in bge_stats_clear_regs()
4935 CSR_READ_4(sc, BGE_RX_MAC_STATS_UCAST); in bge_stats_clear_regs()
4936 CSR_READ_4(sc, BGE_RX_MAC_STATS_MCAST); in bge_stats_clear_regs()
4937 CSR_READ_4(sc, BGE_RX_MAC_STATS_BCAST); in bge_stats_clear_regs()
4938 CSR_READ_4(sc, BGE_RX_MAC_STATS_FCS_ERRORS); in bge_stats_clear_regs()
4939 CSR_READ_4(sc, BGE_RX_MAC_STATS_ALGIN_ERRORS); in bge_stats_clear_regs()
4940 CSR_READ_4(sc, BGE_RX_MAC_STATS_XON_RCVD); in bge_stats_clear_regs()
4941 CSR_READ_4(sc, BGE_RX_MAC_STATS_XOFF_RCVD); in bge_stats_clear_regs()
4942 CSR_READ_4(sc, BGE_RX_MAC_STATS_CTRL_RCVD); in bge_stats_clear_regs()
4943 CSR_READ_4(sc, BGE_RX_MAC_STATS_XOFF_ENTERED); in bge_stats_clear_regs()
4944 CSR_READ_4(sc, BGE_RX_MAC_STATS_FRAME_TOO_LONG); in bge_stats_clear_regs()
4945 CSR_READ_4(sc, BGE_RX_MAC_STATS_JABBERS); in bge_stats_clear_regs()
4946 CSR_READ_4(sc, BGE_RX_MAC_STATS_UNDERSIZE); in bge_stats_clear_regs()
4948 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_FILTDROP); in bge_stats_clear_regs()
4949 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_DMA_WRQ_FULL); in bge_stats_clear_regs()
4950 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_DMA_HPWRQ_FULL); in bge_stats_clear_regs()
4951 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_OUT_OF_BDS); in bge_stats_clear_regs()
4952 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_DROPS); in bge_stats_clear_regs()
4953 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_ERRORS); in bge_stats_clear_regs()
4954 CSR_READ_4(sc, BGE_RXLP_LOCSTAT_RXTHRESH_HIT); in bge_stats_clear_regs()
4969 CSR_READ_4(sc, stats + offsetof(struct bge_stats, stat)) in bge_stats_update()
5510 mode = CSR_READ_4(sc, BGE_TX_MODE); in bge_init_locked()
5516 mode |= CSR_READ_4(sc, BGE_TX_MODE) & in bge_init_locked()
5524 mode = CSR_READ_4(sc, BGE_RX_MODE); in bge_init_locked()
5625 sgdig = CSR_READ_4(sc, BGE_SGDIG_STS); in bge_ifmedia_upd_locked()
5628 sgdig = CSR_READ_4(sc, BGE_SGDIG_CFG); in bge_ifmedia_upd_locked()
5700 if (CSR_READ_4(sc, BGE_MAC_STS) & in bge_ifmedia_sts()
5709 if (CSR_READ_4(sc, BGE_MAC_MODE) & BGE_MACMODE_HALF_DUPLEX) in bge_ifmedia_sts()
5896 if ((CSR_READ_4(sc, BGE_RX_MODE) & BGE_RXMODE_FLOWCTL_ENABLE) != 0) { in bge_watchdog()
5897 status = CSR_READ_4(sc, BGE_RX_STS); in bge_watchdog()
5940 if ((CSR_READ_4(sc, reg) & bit) == 0) in bge_stop_block()
6123 status = CSR_READ_4(sc, BGE_MAC_STS); in bge_link_upd()
6153 status = CSR_READ_4(sc, BGE_MAC_STS); in bge_link_upd()
6180 link = (CSR_READ_4(sc, BGE_MI_STS) & BGE_MISTS_LINK) ? 1 : 0; in bge_link_upd()
6526 result = CSR_READ_4(sc, BGE_MEMWIN_START + BGE_STATS_BLOCK + offset + in bge_sysctl_stats()
6570 printf(" %08x", CSR_READ_4(sc, i)); in bge_sysctl_debug_info()
6620 val = CSR_READ_4(sc, result); in bge_sysctl_reg_read()