Lines Matching +full:cdr +full:- +full:mode
116 #include "xgbe-common.h"
142 /* Rate-change complete wait/retry count */
145 /* CDR delay values for KR support (in usec) */
257 /* Single mode, length of fiber in units of km */
261 /* Single mode, length of fiber in units of 100m */
275 * Optical specification compliance - denotes wavelength
306 ((_x)->extd[XGBE_SFP_EXTD_SFF_8472] && \
307 !((_x)->extd[XGBE_SFP_EXTD_DIAG] & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))
314 #define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
315 #define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
334 /* Re-driver related definitions */
407 /* Re-driver support */
429 return (pdata->i2c_if.i2c_xfer(pdata, i2c_op)); in xgbe_phy_i2c_xfer()
436 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_redrv_write()
461 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
466 if ((ret == -EAGAIN) && retry--) in xgbe_phy_redrv_write()
475 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
480 if ((ret == -EAGAIN) && retry--) in xgbe_phy_redrv_write()
488 ret = -EIO; in xgbe_phy_redrv_write()
509 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_write()
534 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_read()
549 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_read()
558 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_put_mux()
562 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_put_mux()
568 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_put_mux()
578 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_get_mux()
582 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_get_mux()
586 mux_channel = 1 << phy_data->sfp_mux_channel; in xgbe_phy_sfp_get_mux()
588 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_get_mux()
604 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_comm_ownership()
620 XP_SET_BITS(mutex_id, XP_I2C_MUTEX, ID, phy_data->port_id); in xgbe_phy_get_comm_ownership()
643 return (-ETIMEDOUT); in xgbe_phy_get_comm_ownership()
650 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_write()
653 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45) in xgbe_phy_mdio_mii_write()
654 return (-ENOTSUP); in xgbe_phy_mdio_mii_write()
656 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22) in xgbe_phy_mdio_mii_write()
657 return (-ENOTSUP); in xgbe_phy_mdio_mii_write()
660 return (pdata->hw_if.write_ext_mii_regs(pdata, addr, reg, val)); in xgbe_phy_mdio_mii_write()
689 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_write()
697 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_write()
699 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_write()
702 ret = -ENOTSUP; in xgbe_phy_mii_write()
712 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_read()
715 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45) in xgbe_phy_mdio_mii_read()
716 return (-ENOTSUP); in xgbe_phy_mdio_mii_read()
718 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22) in xgbe_phy_mdio_mii_read()
719 return (-ENOTSUP); in xgbe_phy_mdio_mii_read()
722 return (pdata->hw_if.read_ext_mii_regs(pdata, addr, reg)); in xgbe_phy_mdio_mii_read()
751 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_read()
759 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_read()
761 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_read()
764 ret = -ENOTSUP; in xgbe_phy_mii_read()
774 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_phy_settings()
776 if (!phy_data->sfp_mod_absent && !phy_data->sfp_changed) in xgbe_phy_sfp_phy_settings()
779 XGBE_ZERO_SUP(&pdata->phy); in xgbe_phy_sfp_phy_settings()
781 if (phy_data->sfp_mod_absent) { in xgbe_phy_sfp_phy_settings()
782 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
783 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
784 pdata->phy.autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
785 pdata->phy.pause_autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
787 XGBE_SET_SUP(&pdata->phy, Autoneg); in xgbe_phy_sfp_phy_settings()
788 XGBE_SET_SUP(&pdata->phy, Pause); in xgbe_phy_sfp_phy_settings()
789 XGBE_SET_SUP(&pdata->phy, Asym_Pause); in xgbe_phy_sfp_phy_settings()
790 XGBE_SET_SUP(&pdata->phy, TP); in xgbe_phy_sfp_phy_settings()
791 XGBE_SET_SUP(&pdata->phy, FIBRE); in xgbe_phy_sfp_phy_settings()
793 XGBE_LM_COPY(&pdata->phy, advertising, &pdata->phy, supported); in xgbe_phy_sfp_phy_settings()
798 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
802 pdata->phy.speed = SPEED_100; in xgbe_phy_sfp_phy_settings()
803 pdata->phy.duplex = DUPLEX_FULL; in xgbe_phy_sfp_phy_settings()
804 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
805 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
811 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
812 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
813 pdata->phy.autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
814 pdata->phy.pause_autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
815 XGBE_SET_SUP(&pdata->phy, Autoneg); in xgbe_phy_sfp_phy_settings()
816 XGBE_SET_SUP(&pdata->phy, Pause); in xgbe_phy_sfp_phy_settings()
817 XGBE_SET_SUP(&pdata->phy, Asym_Pause); in xgbe_phy_sfp_phy_settings()
818 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) { in xgbe_phy_sfp_phy_settings()
819 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) in xgbe_phy_sfp_phy_settings()
820 XGBE_SET_SUP(&pdata->phy, 100baseT_Full); in xgbe_phy_sfp_phy_settings()
821 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_sfp_phy_settings()
822 XGBE_SET_SUP(&pdata->phy, 1000baseT_Full); in xgbe_phy_sfp_phy_settings()
824 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_sfp_phy_settings()
825 XGBE_SET_SUP(&pdata->phy, 1000baseX_Full); in xgbe_phy_sfp_phy_settings()
830 pdata->phy.speed = SPEED_1000; in xgbe_phy_sfp_phy_settings()
831 pdata->phy.duplex = DUPLEX_FULL; in xgbe_phy_sfp_phy_settings()
832 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
833 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
840 pdata->phy.speed = SPEED_10000; in xgbe_phy_sfp_phy_settings()
841 pdata->phy.duplex = DUPLEX_FULL; in xgbe_phy_sfp_phy_settings()
842 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
843 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
844 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_sfp_phy_settings()
845 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
847 XGBE_SET_SUP(&pdata->phy, 10000baseSR_Full); in xgbe_phy_sfp_phy_settings()
850 XGBE_SET_SUP(&pdata->phy, 10000baseLR_Full); in xgbe_phy_sfp_phy_settings()
853 XGBE_SET_SUP(&pdata->phy, 10000baseLRM_Full); in xgbe_phy_sfp_phy_settings()
856 XGBE_SET_SUP(&pdata->phy, 10000baseER_Full); in xgbe_phy_sfp_phy_settings()
859 XGBE_SET_SUP(&pdata->phy, 10000baseCR_Full); in xgbe_phy_sfp_phy_settings()
867 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
868 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
869 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
870 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
874 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
878 XGBE_SET_SUP(&pdata->phy, TP); in xgbe_phy_sfp_phy_settings()
881 XGBE_SET_SUP(&pdata->phy, FIBRE); in xgbe_phy_sfp_phy_settings()
885 XGBE_LM_COPY(&pdata->phy, advertising, &pdata->phy, supported); in xgbe_phy_sfp_phy_settings()
888 "advert 0x%x support 0x%x\n", __func__, pdata->phy.speed, in xgbe_phy_sfp_phy_settings()
889 phy_data->sfp_base, pdata->phy.pause_autoneg, in xgbe_phy_sfp_phy_settings()
890 pdata->phy.advertising, pdata->phy.supported); in xgbe_phy_sfp_phy_settings()
899 sfp_base = sfp_eeprom->base; in xgbe_phy_sfp_bit_rate()
929 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_free_phy_device()
931 if (phy_data->phydev) in xgbe_phy_free_phy_device()
932 phy_data->phydev = 0; in xgbe_phy_free_phy_device()
934 if (pdata->axgbe_miibus != NULL) { in xgbe_phy_free_phy_device()
935 device_delete_child(pdata->dev, pdata->axgbe_miibus); in xgbe_phy_free_phy_device()
936 pdata->axgbe_miibus = NULL; in xgbe_phy_free_phy_device()
943 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_finisar_phy_quirks()
944 unsigned int phy_id = phy_data->phy_id; in xgbe_phy_finisar_phy_quirks()
946 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_finisar_phy_quirks()
952 /* Enable Base-T AN */ in xgbe_phy_finisar_phy_quirks()
953 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x16, 0x0001); in xgbe_phy_finisar_phy_quirks()
954 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x00, 0x9140); in xgbe_phy_finisar_phy_quirks()
955 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x16, 0x0000); in xgbe_phy_finisar_phy_quirks()
957 /* Enable SGMII at 100Base-T/1000Base-T Full Duplex */ in xgbe_phy_finisar_phy_quirks()
958 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1b, 0x9084); in xgbe_phy_finisar_phy_quirks()
959 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x09, 0x0e00); in xgbe_phy_finisar_phy_quirks()
960 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x00, 0x8140); in xgbe_phy_finisar_phy_quirks()
961 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x04, 0x0d01); in xgbe_phy_finisar_phy_quirks()
962 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x00, 0x9140); in xgbe_phy_finisar_phy_quirks()
972 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_belfuse_phy_quirks()
973 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom; in xgbe_phy_belfuse_phy_quirks()
974 unsigned int phy_id = phy_data->phy_id; in xgbe_phy_belfuse_phy_quirks()
977 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_belfuse_phy_quirks()
980 if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME], in xgbe_phy_belfuse_phy_quirks()
984 /* For Bel-Fuse, use the extra AN flag */ in xgbe_phy_belfuse_phy_quirks()
985 pdata->an_again = 1; in xgbe_phy_belfuse_phy_quirks()
987 if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN], in xgbe_phy_belfuse_phy_quirks()
994 /* Disable RGMII mode */ in xgbe_phy_belfuse_phy_quirks()
995 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x18, 0x7007); in xgbe_phy_belfuse_phy_quirks()
996 reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x18); in xgbe_phy_belfuse_phy_quirks()
997 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x18, reg & ~0x0080); in xgbe_phy_belfuse_phy_quirks()
1000 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
1001 reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x1c); in xgbe_phy_belfuse_phy_quirks()
1004 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1c, 0x8000 | 0x7c00 | in xgbe_phy_belfuse_phy_quirks()
1008 reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x00); in xgbe_phy_belfuse_phy_quirks()
1009 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x00, reg | 0x00800); in xgbe_phy_belfuse_phy_quirks()
1011 /* Configure SGMII-to-Copper mode */ in xgbe_phy_belfuse_phy_quirks()
1012 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
1013 reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x1c); in xgbe_phy_belfuse_phy_quirks()
1016 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1c, 0x8000 | 0x7c00 | in xgbe_phy_belfuse_phy_quirks()
1020 reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x00); in xgbe_phy_belfuse_phy_quirks()
1021 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x00, reg & ~0x00800); in xgbe_phy_belfuse_phy_quirks()
1024 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
1025 reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x1c); in xgbe_phy_belfuse_phy_quirks()
1028 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1c, 0x8000 | 0x7c00 | in xgbe_phy_belfuse_phy_quirks()
1032 reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x00); in xgbe_phy_belfuse_phy_quirks()
1033 xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x00, reg & ~0x00800); in xgbe_phy_belfuse_phy_quirks()
1053 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_get_phy_id()
1057 phy_reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x02); in xgbe_get_phy_id()
1059 return (-EIO); in xgbe_get_phy_id()
1062 phy_data->phy_id = (phy_reg & 0xffff) << 16; in xgbe_get_phy_id()
1064 phy_reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x03); in xgbe_get_phy_id()
1066 return (-EIO); in xgbe_get_phy_id()
1069 phy_data->phy_id |= (phy_reg & 0xffff); in xgbe_get_phy_id()
1083 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_find_phy_device()
1087 "0x%08x\n", __func__, phy_data->phydev, phy_data->phydev_mode, in xgbe_phy_find_phy_device()
1088 phy_data->sfp_phy_avail, phy_data->phy_id); in xgbe_phy_find_phy_device()
1091 if (phy_data->phydev) { in xgbe_phy_find_phy_device()
1097 pdata->an_again = 0; in xgbe_phy_find_phy_device()
1100 if (phy_data->phydev_mode == XGBE_MDIO_MODE_NONE) { in xgbe_phy_find_phy_device()
1102 phy_data->phydev_mode); in xgbe_phy_find_phy_device()
1107 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) && in xgbe_phy_find_phy_device()
1108 !phy_data->sfp_phy_avail) { in xgbe_phy_find_phy_device()
1110 phy_data->port_mode, phy_data->sfp_phy_avail); in xgbe_phy_find_phy_device()
1114 /* Set the proper MDIO mode for the PHY */ in xgbe_phy_find_phy_device()
1115 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr, in xgbe_phy_find_phy_device()
1116 phy_data->phydev_mode); in xgbe_phy_find_phy_device()
1119 phy_data->mdio_addr, phy_data->phydev_mode, ret); in xgbe_phy_find_phy_device()
1126 axgbe_printf(2, "Get phy_id 0x%08x\n", phy_data->phy_id); in xgbe_phy_find_phy_device()
1128 phy_data->phydev = 1; in xgbe_phy_find_phy_device()
1137 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_external_phy()
1141 phy_data->sfp_changed); in xgbe_phy_sfp_external_phy()
1142 if (!phy_data->sfp_phy_retries && !phy_data->sfp_changed) in xgbe_phy_sfp_external_phy()
1145 phy_data->sfp_phy_avail = 0; in xgbe_phy_sfp_external_phy()
1147 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_sfp_external_phy()
1153 phy_data->sfp_phy_retries++; in xgbe_phy_sfp_external_phy()
1154 if (phy_data->sfp_phy_retries >= XGBE_SFP_PHY_RETRY_MAX) in xgbe_phy_sfp_external_phy()
1155 phy_data->sfp_phy_retries = 0; in xgbe_phy_sfp_external_phy()
1161 phy_data->sfp_phy_avail = 1; in xgbe_phy_sfp_external_phy()
1165 ret = mii_attach(pdata->dev, &pdata->axgbe_miibus, pdata->netdev, in xgbe_phy_sfp_external_phy()
1168 pdata->mdio_addr, MII_OFFSET_ANY, MIIF_FORCEANEG); in xgbe_phy_sfp_external_phy()
1178 uint8_t *sfp_extd = phy_data->sfp_eeprom.extd; in xgbe_phy_check_sfp_rx_los()
1183 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_RX_LOS) in xgbe_phy_check_sfp_rx_los()
1186 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_rx_los)) in xgbe_phy_check_sfp_rx_los()
1195 uint8_t *sfp_extd = phy_data->sfp_eeprom.extd; in xgbe_phy_check_sfp_tx_fault()
1200 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_TX_FAULT) in xgbe_phy_check_sfp_tx_fault()
1203 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_tx_fault)) in xgbe_phy_check_sfp_tx_fault()
1212 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_MOD_ABSENT) in xgbe_phy_check_sfp_mod_absent()
1215 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_mod_absent)) in xgbe_phy_check_sfp_mod_absent()
1224 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_parse_eeprom()
1225 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom; in xgbe_phy_sfp_parse_eeprom()
1229 sfp_base = sfp_eeprom->base; in xgbe_phy_sfp_parse_eeprom()
1242 phy_data->sfp_tx_fault = xgbe_phy_check_sfp_tx_fault(phy_data); in xgbe_phy_sfp_parse_eeprom()
1243 phy_data->sfp_rx_los = xgbe_phy_check_sfp_rx_los(phy_data); in xgbe_phy_sfp_parse_eeprom()
1247 phy_data->sfp_cable = XGBE_SFP_CABLE_PASSIVE; in xgbe_phy_sfp_parse_eeprom()
1248 phy_data->sfp_cable_len = sfp_base[XGBE_SFP_BASE_CU_CABLE_LEN]; in xgbe_phy_sfp_parse_eeprom()
1250 phy_data->sfp_cable = XGBE_SFP_CABLE_ACTIVE; in xgbe_phy_sfp_parse_eeprom()
1256 * 1000BASE-CX. To prevent 10G DAC cables to be recognized as in xgbe_phy_sfp_parse_eeprom()
1262 (phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE)) && in xgbe_phy_sfp_parse_eeprom()
1265 phy_data->sfp_base = XGBE_SFP_BASE_10000_CR; in xgbe_phy_sfp_parse_eeprom()
1267 phy_data->sfp_base = XGBE_SFP_BASE_10000_SR; in xgbe_phy_sfp_parse_eeprom()
1269 phy_data->sfp_base = XGBE_SFP_BASE_10000_LR; in xgbe_phy_sfp_parse_eeprom()
1271 phy_data->sfp_base = XGBE_SFP_BASE_10000_LRM; in xgbe_phy_sfp_parse_eeprom()
1273 phy_data->sfp_base = XGBE_SFP_BASE_10000_ER; in xgbe_phy_sfp_parse_eeprom()
1275 phy_data->sfp_base = XGBE_SFP_BASE_1000_SX; in xgbe_phy_sfp_parse_eeprom()
1277 phy_data->sfp_base = XGBE_SFP_BASE_1000_LX; in xgbe_phy_sfp_parse_eeprom()
1279 phy_data->sfp_base = XGBE_SFP_BASE_1000_CX; in xgbe_phy_sfp_parse_eeprom()
1281 phy_data->sfp_base = XGBE_SFP_BASE_1000_T; in xgbe_phy_sfp_parse_eeprom()
1283 phy_data->sfp_base = XGBE_SFP_BASE_100_LX10; in xgbe_phy_sfp_parse_eeprom()
1285 phy_data->sfp_base = XGBE_SFP_BASE_100_FX; in xgbe_phy_sfp_parse_eeprom()
1289 phy_data->sfp_base = XGBE_SFP_BASE_100_BX; in xgbe_phy_sfp_parse_eeprom()
1292 phy_data->sfp_base = XGBE_SFP_BASE_1000_BX; in xgbe_phy_sfp_parse_eeprom()
1295 phy_data->sfp_base = XGBE_SFP_BASE_PX; in xgbe_phy_sfp_parse_eeprom()
1300 phy_data->sfp_base = XGBE_SFP_BASE_1000_BX; in xgbe_phy_sfp_parse_eeprom()
1305 phy_data->sfp_base = XGBE_SFP_BASE_100_BX; in xgbe_phy_sfp_parse_eeprom()
1307 switch (phy_data->sfp_base) { in xgbe_phy_sfp_parse_eeprom()
1311 phy_data->sfp_speed = XGBE_SFP_SPEED_100; in xgbe_phy_sfp_parse_eeprom()
1313 phy_data->sfp_speed = XGBE_SFP_SPEED_100_1000; in xgbe_phy_sfp_parse_eeprom()
1320 phy_data->sfp_speed = XGBE_SFP_SPEED_1000; in xgbe_phy_sfp_parse_eeprom()
1327 phy_data->sfp_speed = XGBE_SFP_SPEED_10000; in xgbe_phy_sfp_parse_eeprom()
1333 "rx_los 0x%x tx_fault 0x%x\n", __func__, phy_data->sfp_base, in xgbe_phy_sfp_parse_eeprom()
1334 phy_data->sfp_speed, phy_data->sfp_cable, phy_data->sfp_rx_los, in xgbe_phy_sfp_parse_eeprom()
1335 phy_data->sfp_tx_fault); in xgbe_phy_sfp_parse_eeprom()
1346 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME], in xgbe_phy_sfp_eeprom_info()
1352 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN], in xgbe_phy_sfp_eeprom_info()
1358 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_REV], in xgbe_phy_sfp_eeprom_info()
1364 memcpy(sfp_data, &sfp_eeprom->extd[XGBE_SFP_BASE_VENDOR_SN], in xgbe_phy_sfp_eeprom_info()
1376 for (cc = 0; len; buf++, len--) in xgbe_phy_sfp_verify_eeprom()
1396 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_read_eeprom()
1419 base = eeprom->base; in xgbe_phy_sfp_read_eeprom()
1424 sfp_eeprom.base, sizeof(sfp_eeprom.base) - 1)) { in xgbe_phy_sfp_read_eeprom()
1426 ret = -EINVAL; in xgbe_phy_sfp_read_eeprom()
1431 sfp_eeprom.extd, sizeof(sfp_eeprom.extd) - 1)) { in xgbe_phy_sfp_read_eeprom()
1433 ret = -EINVAL; in xgbe_phy_sfp_read_eeprom()
1438 if (memcmp(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom))) { in xgbe_phy_sfp_read_eeprom()
1439 phy_data->sfp_changed = 1; in xgbe_phy_sfp_read_eeprom()
1443 memcpy(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom)); in xgbe_phy_sfp_read_eeprom()
1447 phy_data->sfp_changed = 0; in xgbe_phy_sfp_read_eeprom()
1458 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_signals()
1460 int ret, prev_sfp_inputs = phy_data->port_sfp_inputs; in xgbe_phy_sfp_signals()
1461 int shift = GPIO_MASK_WIDTH * (3 - phy_data->port_id); in xgbe_phy_sfp_signals()
1465 __func__, phy_data->sfp_mod_absent, phy_data->sfp_gpio_address); in xgbe_phy_sfp_signals()
1474 ret = xgbe_phy_i2c_read(pdata, phy_data->sfp_gpio_address, &gpio_reg, in xgbe_phy_sfp_signals()
1478 __func__, phy_data->sfp_gpio_address); in xgbe_phy_sfp_signals()
1482 phy_data->sfp_gpio_inputs = (gpio_ports[1] << 8) | gpio_ports[0]; in xgbe_phy_sfp_signals()
1483 phy_data->port_sfp_inputs = (phy_data->sfp_gpio_inputs >> shift) & 0x0F; in xgbe_phy_sfp_signals()
1485 if (prev_sfp_inputs != phy_data->port_sfp_inputs) in xgbe_phy_sfp_signals()
1487 phy_data->port_sfp_inputs); in xgbe_phy_sfp_signals()
1489 phy_data->sfp_mod_absent = xgbe_phy_check_sfp_mod_absent(phy_data); in xgbe_phy_sfp_signals()
1492 __func__, phy_data->sfp_mod_absent, phy_data->sfp_gpio_inputs); in xgbe_phy_sfp_signals()
1501 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_read_gpio_expander()
1513 ret = xgbe_phy_i2c_read(pdata, phy_data->sfp_gpio_address, in xgbe_read_gpio_expander()
1523 phy_data->sfp_gpio_outputs = (gpio_ports[1] << 8) | gpio_ports[0]; in xgbe_read_gpio_expander()
1525 phy_data->sfp_gpio_polarity = (gpio_ports[1] << 8) | gpio_ports[0]; in xgbe_read_gpio_expander()
1527 phy_data->sfp_gpio_configuration = (gpio_ports[1] << 8) | gpio_ports[0]; in xgbe_read_gpio_expander()
1542 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_log_gpio_expander()
1544 axgbe_printf(1, "Input port registers: 0x%x\n", phy_data->sfp_gpio_inputs); in xgbe_log_gpio_expander()
1545 axgbe_printf(1, "Output port registers: 0x%x\n", phy_data->sfp_gpio_outputs); in xgbe_log_gpio_expander()
1546 axgbe_printf(1, "Polarity port registers: 0x%x\n", phy_data->sfp_gpio_polarity); in xgbe_log_gpio_expander()
1547 axgbe_printf(1, "Configuration port registers: 0x%x\n", phy_data->sfp_gpio_configuration); in xgbe_log_gpio_expander()
1553 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_validate_gpio_expander()
1555 int shift = GPIO_MASK_WIDTH * (3 - phy_data->port_id); in xgbe_phy_validate_gpio_expander()
1556 int rx_los_pos = (1 << phy_data->sfp_gpio_rx_los); in xgbe_phy_validate_gpio_expander()
1557 int tx_fault_pos = (1 << phy_data->sfp_gpio_tx_fault); in xgbe_phy_validate_gpio_expander()
1558 int mod_abs_pos = (1 << phy_data->sfp_gpio_mod_absent); in xgbe_phy_validate_gpio_expander()
1577 if (phy_data->sfp_gpio_polarity) { in xgbe_phy_validate_gpio_expander()
1583 ret = xgbe_phy_i2c_write(pdata, phy_data->sfp_gpio_address, in xgbe_phy_validate_gpio_expander()
1593 config = phy_data->sfp_gpio_configuration; in xgbe_phy_validate_gpio_expander()
1605 ret = xgbe_phy_i2c_write(pdata, phy_data->sfp_gpio_address, in xgbe_phy_validate_gpio_expander()
1628 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_mod_absent()
1632 phy_data->sfp_mod_absent = 1; in xgbe_phy_sfp_mod_absent()
1633 phy_data->sfp_phy_avail = 0; in xgbe_phy_sfp_mod_absent()
1634 memset(&phy_data->sfp_eeprom, 0, sizeof(phy_data->sfp_eeprom)); in xgbe_phy_sfp_mod_absent()
1640 phy_data->sfp_rx_los = 0; in xgbe_phy_sfp_reset()
1641 phy_data->sfp_tx_fault = 0; in xgbe_phy_sfp_reset()
1642 phy_data->sfp_mod_absent = 1; in xgbe_phy_sfp_reset()
1643 phy_data->sfp_base = XGBE_SFP_BASE_UNKNOWN; in xgbe_phy_sfp_reset()
1644 phy_data->sfp_cable = XGBE_SFP_CABLE_UNKNOWN; in xgbe_phy_sfp_reset()
1645 phy_data->sfp_speed = XGBE_SFP_SPEED_UNKNOWN; in xgbe_phy_sfp_reset()
1651 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_detect()
1652 int ret, prev_sfp_state = phy_data->sfp_mod_absent; in xgbe_phy_sfp_detect()
1660 if (phy_data->sfp_mod_absent) { in xgbe_phy_sfp_detect()
1661 if (prev_sfp_state != phy_data->sfp_mod_absent) in xgbe_phy_sfp_detect()
1689 "pause_autoneg: 0x%x\n", __func__, pdata->phy.speed, in xgbe_phy_sfp_detect()
1690 pdata->phy.duplex, pdata->phy.autoneg, pdata->phy.pause_autoneg); in xgbe_phy_sfp_detect()
1698 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_module_eeprom()
1703 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) { in xgbe_phy_module_eeprom()
1704 ret = -ENXIO; in xgbe_phy_module_eeprom()
1708 if (phy_data->sfp_mod_absent) { in xgbe_phy_module_eeprom()
1709 ret = -EIO; in xgbe_phy_module_eeprom()
1715 ret = -EIO; in xgbe_phy_module_eeprom()
1722 ret = -EIO; in xgbe_phy_module_eeprom()
1733 ret = -EIO; in xgbe_phy_module_eeprom()
1748 ret = -EIO; in xgbe_phy_module_eeprom()
1766 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_module_info()
1768 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_module_info()
1769 return (-ENXIO); in xgbe_phy_module_info()
1771 if (phy_data->sfp_mod_absent) in xgbe_phy_module_info()
1772 return (-EIO); in xgbe_phy_module_info()
1780 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_phydev_flowctrl()
1782 pdata->phy.tx_pause = 0; in xgbe_phy_phydev_flowctrl()
1783 pdata->phy.rx_pause = 0; in xgbe_phy_phydev_flowctrl()
1785 if (!phy_data->phydev) in xgbe_phy_phydev_flowctrl()
1788 if (pdata->phy.pause) in xgbe_phy_phydev_flowctrl()
1789 XGBE_SET_LP_ADV(&pdata->phy, Pause); in xgbe_phy_phydev_flowctrl()
1791 if (pdata->phy.asym_pause) in xgbe_phy_phydev_flowctrl()
1792 XGBE_SET_LP_ADV(&pdata->phy, Asym_Pause); in xgbe_phy_phydev_flowctrl()
1795 pdata->phy.tx_pause, pdata->phy.rx_pause); in xgbe_phy_phydev_flowctrl()
1801 enum xgbe_mode mode; in xgbe_phy_an37_sgmii_outcome() local
1803 XGBE_SET_LP_ADV(&pdata->phy, Autoneg); in xgbe_phy_an37_sgmii_outcome()
1804 XGBE_SET_LP_ADV(&pdata->phy, TP); in xgbe_phy_an37_sgmii_outcome()
1807 pdata->phy.pause_autoneg); in xgbe_phy_an37_sgmii_outcome()
1810 if (pdata->phy.pause_autoneg) in xgbe_phy_an37_sgmii_outcome()
1813 switch (pdata->an_status & XGBE_SGMII_AN_LINK_SPEED) { in xgbe_phy_an37_sgmii_outcome()
1815 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1816 XGBE_SET_LP_ADV(&pdata->phy, 100baseT_Full); in xgbe_phy_an37_sgmii_outcome()
1817 mode = XGBE_MODE_SGMII_100; in xgbe_phy_an37_sgmii_outcome()
1819 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1820 XGBE_SET_LP_ADV(&pdata->phy, 100baseT_Half); in xgbe_phy_an37_sgmii_outcome()
1821 mode = XGBE_MODE_UNKNOWN; in xgbe_phy_an37_sgmii_outcome()
1827 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1828 XGBE_SET_LP_ADV(&pdata->phy, 1000baseT_Full); in xgbe_phy_an37_sgmii_outcome()
1829 mode = XGBE_MODE_SGMII_1000; in xgbe_phy_an37_sgmii_outcome()
1831 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1832 XGBE_SET_LP_ADV(&pdata->phy, 1000baseT_Half); in xgbe_phy_an37_sgmii_outcome()
1833 mode = XGBE_MODE_SGMII_1000; in xgbe_phy_an37_sgmii_outcome()
1838 return (mode); in xgbe_phy_an37_sgmii_outcome()
1844 enum xgbe_mode mode; in xgbe_phy_an37_outcome() local
1847 XGBE_SET_LP_ADV(&pdata->phy, Autoneg); in xgbe_phy_an37_outcome()
1848 XGBE_SET_LP_ADV(&pdata->phy, FIBRE); in xgbe_phy_an37_outcome()
1854 XGBE_SET_LP_ADV(&pdata->phy, Pause); in xgbe_phy_an37_outcome()
1856 XGBE_SET_LP_ADV(&pdata->phy, Asym_Pause); in xgbe_phy_an37_outcome()
1859 __func__, pdata->phy.pause_autoneg, ad_reg, lp_reg); in xgbe_phy_an37_outcome()
1861 if (pdata->phy.pause_autoneg) { in xgbe_phy_an37_outcome()
1862 /* Set flow control based on auto-negotiation result */ in xgbe_phy_an37_outcome()
1863 pdata->phy.tx_pause = 0; in xgbe_phy_an37_outcome()
1864 pdata->phy.rx_pause = 0; in xgbe_phy_an37_outcome()
1867 pdata->phy.tx_pause = 1; in xgbe_phy_an37_outcome()
1868 pdata->phy.rx_pause = 1; in xgbe_phy_an37_outcome()
1871 pdata->phy.rx_pause = 1; in xgbe_phy_an37_outcome()
1873 pdata->phy.tx_pause = 1; in xgbe_phy_an37_outcome()
1877 axgbe_printf(1, "%s: pause tx/rx %d/%d\n", __func__, pdata->phy.tx_pause, in xgbe_phy_an37_outcome()
1878 pdata->phy.rx_pause); in xgbe_phy_an37_outcome()
1881 XGBE_SET_LP_ADV(&pdata->phy, 1000baseX_Full); in xgbe_phy_an37_outcome()
1885 mode = (ad_reg & 0x20) ? XGBE_MODE_X : XGBE_MODE_UNKNOWN; in xgbe_phy_an37_outcome()
1887 return (mode); in xgbe_phy_an37_outcome()
1893 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an73_redrv_outcome()
1894 enum xgbe_mode mode; in xgbe_phy_an73_redrv_outcome() local
1897 XGBE_SET_LP_ADV(&pdata->phy, Autoneg); in xgbe_phy_an73_redrv_outcome()
1898 XGBE_SET_LP_ADV(&pdata->phy, Backplane); in xgbe_phy_an73_redrv_outcome()
1901 pdata->phy.pause_autoneg); in xgbe_phy_an73_redrv_outcome()
1904 if (pdata->phy.pause_autoneg) in xgbe_phy_an73_redrv_outcome()
1911 XGBE_SET_LP_ADV(&pdata->phy, 10000baseKR_Full); in xgbe_phy_an73_redrv_outcome()
1913 XGBE_SET_LP_ADV(&pdata->phy, 1000baseKX_Full); in xgbe_phy_an73_redrv_outcome()
1917 switch (phy_data->port_mode) { in xgbe_phy_an73_redrv_outcome()
1919 mode = XGBE_MODE_KR; in xgbe_phy_an73_redrv_outcome()
1922 mode = XGBE_MODE_SFI; in xgbe_phy_an73_redrv_outcome()
1926 switch (phy_data->port_mode) { in xgbe_phy_an73_redrv_outcome()
1928 mode = XGBE_MODE_KX_1000; in xgbe_phy_an73_redrv_outcome()
1931 mode = XGBE_MODE_X; in xgbe_phy_an73_redrv_outcome()
1934 switch (phy_data->sfp_base) { in xgbe_phy_an73_redrv_outcome()
1936 if ((phy_data->phydev) && in xgbe_phy_an73_redrv_outcome()
1937 (pdata->phy.speed == SPEED_100)) in xgbe_phy_an73_redrv_outcome()
1938 mode = XGBE_MODE_SGMII_100; in xgbe_phy_an73_redrv_outcome()
1940 mode = XGBE_MODE_SGMII_1000; in xgbe_phy_an73_redrv_outcome()
1946 mode = XGBE_MODE_X; in xgbe_phy_an73_redrv_outcome()
1951 if ((phy_data->phydev) && in xgbe_phy_an73_redrv_outcome()
1952 (pdata->phy.speed == SPEED_100)) in xgbe_phy_an73_redrv_outcome()
1953 mode = XGBE_MODE_SGMII_100; in xgbe_phy_an73_redrv_outcome()
1955 mode = XGBE_MODE_SGMII_1000; in xgbe_phy_an73_redrv_outcome()
1959 mode = XGBE_MODE_UNKNOWN; in xgbe_phy_an73_redrv_outcome()
1966 XGBE_SET_LP_ADV(&pdata->phy, 10000baseR_FEC); in xgbe_phy_an73_redrv_outcome()
1968 return (mode); in xgbe_phy_an73_redrv_outcome()
1974 enum xgbe_mode mode; in xgbe_phy_an73_outcome() local
1977 XGBE_SET_LP_ADV(&pdata->phy, Autoneg); in xgbe_phy_an73_outcome()
1978 XGBE_SET_LP_ADV(&pdata->phy, Backplane); in xgbe_phy_an73_outcome()
1984 XGBE_SET_LP_ADV(&pdata->phy, Pause); in xgbe_phy_an73_outcome()
1986 XGBE_SET_LP_ADV(&pdata->phy, Asym_Pause); in xgbe_phy_an73_outcome()
1989 __func__, pdata->phy.pause_autoneg, ad_reg, lp_reg); in xgbe_phy_an73_outcome()
1991 if (pdata->phy.pause_autoneg) { in xgbe_phy_an73_outcome()
1992 /* Set flow control based on auto-negotiation result */ in xgbe_phy_an73_outcome()
1993 pdata->phy.tx_pause = 0; in xgbe_phy_an73_outcome()
1994 pdata->phy.rx_pause = 0; in xgbe_phy_an73_outcome()
1997 pdata->phy.tx_pause = 1; in xgbe_phy_an73_outcome()
1998 pdata->phy.rx_pause = 1; in xgbe_phy_an73_outcome()
2001 pdata->phy.rx_pause = 1; in xgbe_phy_an73_outcome()
2003 pdata->phy.tx_pause = 1; in xgbe_phy_an73_outcome()
2007 axgbe_printf(1, "%s: pause tx/rx %d/%d\n", __func__, pdata->phy.tx_pause, in xgbe_phy_an73_outcome()
2008 pdata->phy.rx_pause); in xgbe_phy_an73_outcome()
2014 XGBE_SET_LP_ADV(&pdata->phy, 10000baseKR_Full); in xgbe_phy_an73_outcome()
2016 XGBE_SET_LP_ADV(&pdata->phy, 1000baseKX_Full); in xgbe_phy_an73_outcome()
2020 mode = XGBE_MODE_KR; in xgbe_phy_an73_outcome()
2022 mode = XGBE_MODE_KX_1000; in xgbe_phy_an73_outcome()
2024 mode = XGBE_MODE_UNKNOWN; in xgbe_phy_an73_outcome()
2030 XGBE_SET_LP_ADV(&pdata->phy, 10000baseR_FEC); in xgbe_phy_an73_outcome()
2032 return (mode); in xgbe_phy_an73_outcome()
2038 switch (pdata->an_mode) { in xgbe_phy_an_outcome()
2055 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_advertising()
2057 XGBE_LM_COPY(dphy, advertising, &pdata->phy, advertising); in xgbe_phy_an_advertising()
2059 /* Without a re-driver, just return current advertising */ in xgbe_phy_an_advertising()
2060 if (!phy_data->redrv) in xgbe_phy_an_advertising()
2063 /* With the KR re-driver we need to advertise a single speed */ in xgbe_phy_an_advertising()
2068 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_an_advertising()
2071 switch (phy_data->port_mode) { in xgbe_phy_an_advertising()
2084 if ((phy_data->phydev) && in xgbe_phy_an_advertising()
2085 (pdata->phy.speed == SPEED_10000)) in xgbe_phy_an_advertising()
2094 switch (phy_data->sfp_base) { in xgbe_phy_an_advertising()
2115 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_config()
2125 if (!phy_data->phydev) in xgbe_phy_an_config()
2134 switch (phy_data->sfp_base) { in xgbe_phy_an_sfp_mode()
2149 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_mode()
2151 /* A KR re-driver will always require CL73 AN */ in xgbe_phy_an_mode()
2152 if (phy_data->redrv) in xgbe_phy_an_mode()
2155 switch (phy_data->port_mode) { in xgbe_phy_an_mode()
2179 enum xgbe_phy_redrv_mode mode) in xgbe_phy_set_redrv_mode_mdio() argument
2181 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode_mdio()
2184 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000); in xgbe_phy_set_redrv_mode_mdio()
2185 redrv_val = (uint16_t)mode; in xgbe_phy_set_redrv_mode_mdio()
2187 return (pdata->hw_if.write_ext_mii_regs(pdata, phy_data->redrv_addr, in xgbe_phy_set_redrv_mode_mdio()
2193 enum xgbe_phy_redrv_mode mode) in xgbe_phy_set_redrv_mode_i2c() argument
2195 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode_i2c()
2200 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000); in xgbe_phy_set_redrv_mode_i2c()
2202 ret = xgbe_phy_redrv_write(pdata, redrv_reg, mode); in xgbe_phy_set_redrv_mode_i2c()
2210 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode()
2211 enum xgbe_phy_redrv_mode mode; in xgbe_phy_set_redrv_mode() local
2214 if (!phy_data->redrv) in xgbe_phy_set_redrv_mode()
2217 mode = XGBE_PHY_REDRV_MODE_CX; in xgbe_phy_set_redrv_mode()
2218 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) && in xgbe_phy_set_redrv_mode()
2219 (phy_data->sfp_base != XGBE_SFP_BASE_1000_CX) && in xgbe_phy_set_redrv_mode()
2220 (phy_data->sfp_base != XGBE_SFP_BASE_10000_CR)) in xgbe_phy_set_redrv_mode()
2221 mode = XGBE_PHY_REDRV_MODE_SR; in xgbe_phy_set_redrv_mode()
2227 axgbe_printf(2, "%s: redrv_if set: %d\n", __func__, phy_data->redrv_if); in xgbe_phy_set_redrv_mode()
2228 if (phy_data->redrv_if) in xgbe_phy_set_redrv_mode()
2229 xgbe_phy_set_redrv_mode_i2c(pdata, mode); in xgbe_phy_set_redrv_mode()
2231 xgbe_phy_set_redrv_mode_mdio(pdata, mode); in xgbe_phy_set_redrv_mode()
2296 while (wait--) { in xgbe_phy_perform_ratechange()
2323 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_power_off()
2328 phy_data->cur_mode = XGBE_MODE_UNKNOWN; in xgbe_phy_power_off()
2336 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfi_mode()
2341 axgbe_printf(3, "%s: cable %d len %d\n", __func__, phy_data->sfp_cable, in xgbe_phy_sfi_mode()
2342 phy_data->sfp_cable_len); in xgbe_phy_sfi_mode()
2344 if (phy_data->sfp_cable != XGBE_SFP_CABLE_PASSIVE) in xgbe_phy_sfi_mode()
2347 if (phy_data->sfp_cable_len <= 1) in xgbe_phy_sfi_mode()
2349 else if (phy_data->sfp_cable_len <= 3) in xgbe_phy_sfi_mode()
2355 phy_data->cur_mode = XGBE_MODE_SFI; in xgbe_phy_sfi_mode()
2357 axgbe_printf(3, "10GbE SFI mode set\n"); in xgbe_phy_sfi_mode()
2363 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_x_mode()
2370 phy_data->cur_mode = XGBE_MODE_X; in xgbe_phy_x_mode()
2372 axgbe_printf(3, "1GbE X mode set\n"); in xgbe_phy_x_mode()
2378 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_1000_mode()
2385 phy_data->cur_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_sgmii_1000_mode()
2387 axgbe_printf(2, "1GbE SGMII mode set\n"); in xgbe_phy_sgmii_1000_mode()
2393 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_100_mode()
2400 phy_data->cur_mode = XGBE_MODE_SGMII_100; in xgbe_phy_sgmii_100_mode()
2402 axgbe_printf(3, "100MbE SGMII mode set\n"); in xgbe_phy_sgmii_100_mode()
2408 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kr_mode()
2415 phy_data->cur_mode = XGBE_MODE_KR; in xgbe_phy_kr_mode()
2417 axgbe_printf(3, "10GbE KR mode set\n"); in xgbe_phy_kr_mode()
2423 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_2500_mode()
2430 phy_data->cur_mode = XGBE_MODE_KX_2500; in xgbe_phy_kx_2500_mode()
2432 axgbe_printf(3, "2.5GbE KX mode set\n"); in xgbe_phy_kx_2500_mode()
2438 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_1000_mode()
2445 phy_data->cur_mode = XGBE_MODE_KX_1000; in xgbe_phy_kx_1000_mode()
2447 axgbe_printf(3, "1GbE KX mode set\n"); in xgbe_phy_kx_1000_mode()
2453 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cur_mode()
2455 return (phy_data->cur_mode); in xgbe_phy_cur_mode()
2461 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_switch_baset_mode()
2463 /* No switching if not 10GBase-T */ in xgbe_phy_switch_baset_mode()
2464 if (phy_data->port_mode != XGBE_PORT_MODE_10GBASE_T) in xgbe_phy_switch_baset_mode()
2486 /* If we are in KR switch to KX, and vice-versa */ in xgbe_phy_switch_bp_mode()
2499 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_switch_mode()
2501 switch (phy_data->port_mode) { in xgbe_phy_switch_mode()
2513 /* No switching, so just return current mode */ in xgbe_phy_switch_mode()
2557 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) in xgbe_phy_get_sfp_mode()
2596 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_mode()
2598 switch (phy_data->port_mode) { in xgbe_phy_get_mode()
2618 xgbe_phy_set_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode) in xgbe_phy_set_mode() argument
2620 switch (mode) { in xgbe_phy_set_mode()
2650 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_type()
2652 switch (pdata->phy.speed) { in xgbe_phy_get_type()
2654 if (phy_data->port_mode == XGBE_PORT_MODE_BACKPLANE) in xgbe_phy_get_type()
2655 ifmr->ifm_active |= IFM_10G_KR; in xgbe_phy_get_type()
2656 else if(phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T) in xgbe_phy_get_type()
2657 ifmr->ifm_active |= IFM_10G_T; in xgbe_phy_get_type()
2658 else if(phy_data->port_mode == XGBE_PORT_MODE_10GBASE_R) in xgbe_phy_get_type()
2659 ifmr->ifm_active |= IFM_10G_KR; in xgbe_phy_get_type()
2660 else if(phy_data->port_mode == XGBE_PORT_MODE_SFP) in xgbe_phy_get_type()
2661 ifmr->ifm_active |= IFM_10G_SFI; in xgbe_phy_get_type()
2663 ifmr->ifm_active |= IFM_OTHER; in xgbe_phy_get_type()
2666 if (phy_data->port_mode == XGBE_PORT_MODE_BACKPLANE_2500) in xgbe_phy_get_type()
2667 ifmr->ifm_active |= IFM_2500_KX; in xgbe_phy_get_type()
2669 ifmr->ifm_active |= IFM_OTHER; in xgbe_phy_get_type()
2672 if (phy_data->port_mode == XGBE_PORT_MODE_BACKPLANE) in xgbe_phy_get_type()
2673 ifmr->ifm_active |= IFM_1000_KX; in xgbe_phy_get_type()
2674 else if(phy_data->port_mode == XGBE_PORT_MODE_1000BASE_T) in xgbe_phy_get_type()
2675 ifmr->ifm_active |= IFM_1000_T; in xgbe_phy_get_type()
2677 else if(phy_data->port_mode == XGBE_PORT_MODE_1000BASE_X) in xgbe_phy_get_type()
2678 ifmr->ifm_active |= IFM_1000_SX; in xgbe_phy_get_type()
2679 ifmr->ifm_active |= IFM_1000_LX; in xgbe_phy_get_type()
2680 ifmr->ifm_active |= IFM_1000_CX; in xgbe_phy_get_type()
2682 else if(phy_data->port_mode == XGBE_PORT_MODE_SFP) in xgbe_phy_get_type()
2683 ifmr->ifm_active |= IFM_1000_SGMII; in xgbe_phy_get_type()
2685 ifmr->ifm_active |= IFM_OTHER; in xgbe_phy_get_type()
2688 if(phy_data->port_mode == XGBE_PORT_MODE_NBASE_T) in xgbe_phy_get_type()
2689 ifmr->ifm_active |= IFM_100_T; in xgbe_phy_get_type()
2690 else if(phy_data->port_mode == XGBE_PORT_MODE_SFP) in xgbe_phy_get_type()
2691 ifmr->ifm_active |= IFM_100_SGMII; in xgbe_phy_get_type()
2693 ifmr->ifm_active |= IFM_OTHER; in xgbe_phy_get_type()
2696 ifmr->ifm_active |= IFM_OTHER; in xgbe_phy_get_type()
2697 axgbe_printf(1, "Unknown mode detected\n"); in xgbe_phy_get_type()
2703 xgbe_phy_check_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode, in xgbe_phy_check_mode() argument
2707 if (pdata->phy.autoneg == AUTONEG_ENABLE) in xgbe_phy_check_mode()
2712 cur_mode = xgbe_phy_get_mode(pdata, pdata->phy.speed); in xgbe_phy_check_mode()
2713 if (cur_mode == mode) in xgbe_phy_check_mode()
2721 xgbe_phy_use_basex_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode) in xgbe_phy_use_basex_mode() argument
2724 switch (mode) { in xgbe_phy_use_basex_mode()
2726 return (xgbe_phy_check_mode(pdata, mode, XGBE_ADV(&pdata->phy, in xgbe_phy_use_basex_mode()
2729 return (xgbe_phy_check_mode(pdata, mode, XGBE_ADV(&pdata->phy, in xgbe_phy_use_basex_mode()
2737 xgbe_phy_use_baset_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode) in xgbe_phy_use_baset_mode() argument
2740 axgbe_printf(3, "%s: check mode %d\n", __func__, mode); in xgbe_phy_use_baset_mode()
2741 switch (mode) { in xgbe_phy_use_baset_mode()
2743 return (xgbe_phy_check_mode(pdata, mode, XGBE_ADV(&pdata->phy, in xgbe_phy_use_baset_mode()
2746 return (xgbe_phy_check_mode(pdata, mode, XGBE_ADV(&pdata->phy, in xgbe_phy_use_baset_mode()
2749 return (xgbe_phy_check_mode(pdata, mode, XGBE_ADV(&pdata->phy, in xgbe_phy_use_baset_mode()
2752 return (xgbe_phy_check_mode(pdata, mode, XGBE_ADV(&pdata->phy, in xgbe_phy_use_baset_mode()
2760 xgbe_phy_use_sfp_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode) in xgbe_phy_use_sfp_mode() argument
2762 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_use_sfp_mode()
2764 switch (mode) { in xgbe_phy_use_sfp_mode()
2766 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2768 return (xgbe_phy_check_mode(pdata, mode, in xgbe_phy_use_sfp_mode()
2769 XGBE_ADV(&pdata->phy, 1000baseX_Full))); in xgbe_phy_use_sfp_mode()
2771 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2773 return (xgbe_phy_check_mode(pdata, mode, in xgbe_phy_use_sfp_mode()
2774 XGBE_ADV(&pdata->phy, 100baseT_Full))); in xgbe_phy_use_sfp_mode()
2776 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2778 return (xgbe_phy_check_mode(pdata, mode, in xgbe_phy_use_sfp_mode()
2779 XGBE_ADV(&pdata->phy, 1000baseT_Full))); in xgbe_phy_use_sfp_mode()
2781 if (phy_data->sfp_mod_absent) in xgbe_phy_use_sfp_mode()
2783 return (xgbe_phy_check_mode(pdata, mode, in xgbe_phy_use_sfp_mode()
2784 XGBE_ADV(&pdata->phy, 10000baseSR_Full) || in xgbe_phy_use_sfp_mode()
2785 XGBE_ADV(&pdata->phy, 10000baseLR_Full) || in xgbe_phy_use_sfp_mode()
2786 XGBE_ADV(&pdata->phy, 10000baseLRM_Full) || in xgbe_phy_use_sfp_mode()
2787 XGBE_ADV(&pdata->phy, 10000baseER_Full) || in xgbe_phy_use_sfp_mode()
2788 XGBE_ADV(&pdata->phy, 10000baseCR_Full))); in xgbe_phy_use_sfp_mode()
2795 xgbe_phy_use_bp_2500_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode) in xgbe_phy_use_bp_2500_mode() argument
2798 switch (mode) { in xgbe_phy_use_bp_2500_mode()
2800 return (xgbe_phy_check_mode(pdata, mode, in xgbe_phy_use_bp_2500_mode()
2801 XGBE_ADV(&pdata->phy, 2500baseX_Full))); in xgbe_phy_use_bp_2500_mode()
2808 xgbe_phy_use_bp_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode) in xgbe_phy_use_bp_mode() argument
2811 switch (mode) { in xgbe_phy_use_bp_mode()
2813 return (xgbe_phy_check_mode(pdata, mode, in xgbe_phy_use_bp_mode()
2814 XGBE_ADV(&pdata->phy, 1000baseKX_Full))); in xgbe_phy_use_bp_mode()
2816 return (xgbe_phy_check_mode(pdata, mode, in xgbe_phy_use_bp_mode()
2817 XGBE_ADV(&pdata->phy, 10000baseKR_Full))); in xgbe_phy_use_bp_mode()
2824 xgbe_phy_use_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode) in xgbe_phy_use_mode() argument
2826 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_use_mode()
2828 switch (phy_data->port_mode) { in xgbe_phy_use_mode()
2830 return (xgbe_phy_use_bp_mode(pdata, mode)); in xgbe_phy_use_mode()
2832 return (xgbe_phy_use_bp_2500_mode(pdata, mode)); in xgbe_phy_use_mode()
2835 xgbe_phy_use_baset_mode(pdata, mode) ? "found" : "Not found"); in xgbe_phy_use_mode()
2838 return (xgbe_phy_use_baset_mode(pdata, mode)); in xgbe_phy_use_mode()
2841 return (xgbe_phy_use_basex_mode(pdata, mode)); in xgbe_phy_use_mode()
2843 return (xgbe_phy_use_sfp_mode(pdata, mode)); in xgbe_phy_use_mode()
2855 return (phy_data->port_mode == XGBE_PORT_MODE_1000BASE_X); in xgbe_phy_valid_speed_basex_mode()
2857 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_R); in xgbe_phy_valid_speed_basex_mode()
2872 return (phy_data->port_mode == XGBE_PORT_MODE_NBASE_T); in xgbe_phy_valid_speed_baset_mode()
2874 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T); in xgbe_phy_valid_speed_baset_mode()
2886 return ((phy_data->sfp_speed == XGBE_SFP_SPEED_100) || in xgbe_phy_valid_speed_sfp_mode()
2887 (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000)); in xgbe_phy_valid_speed_sfp_mode()
2889 return ((phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000) || in xgbe_phy_valid_speed_sfp_mode()
2890 (phy_data->sfp_speed == XGBE_SFP_SPEED_1000)); in xgbe_phy_valid_speed_sfp_mode()
2892 return (phy_data->sfp_speed == XGBE_SFP_SPEED_10000); in xgbe_phy_valid_speed_sfp_mode()
2926 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_valid_speed()
2928 switch (phy_data->port_mode) { in xgbe_phy_valid_speed()
2952 axgbe_printf(2, "%s: Link %d\n", __func__, pdata->phy.link); in xgbe_upd_link()
2953 reg = xgbe_phy_mii_read(pdata, pdata->mdio_addr, MII_BMSR); in xgbe_upd_link()
2954 reg = xgbe_phy_mii_read(pdata, pdata->mdio_addr, MII_BMSR); in xgbe_upd_link()
2959 pdata->phy.link = 0; in xgbe_upd_link()
2961 pdata->phy.link = 1; in xgbe_upd_link()
2963 axgbe_printf(2, "Link: %d updated reg %#x\n", pdata->phy.link, reg); in xgbe_upd_link()
2982 if (AUTONEG_ENABLE == pdata->phy.autoneg) { in xgbe_phy_read_status()
2983 if (pdata->phy.supported == SUPPORTED_1000baseT_Half || in xgbe_phy_read_status()
2984 pdata->phy.supported == SUPPORTED_1000baseT_Full) { in xgbe_phy_read_status()
2985 lpagb = xgbe_phy_mii_read(pdata, pdata->mdio_addr, in xgbe_phy_read_status()
2990 adv = xgbe_phy_mii_read(pdata, pdata->mdio_addr, in xgbe_phy_read_status()
3001 return (-ENOLINK); in xgbe_phy_read_status()
3004 if (pdata->phy.supported == SUPPORTED_1000baseT_Half) in xgbe_phy_read_status()
3005 XGBE_SET_ADV(&pdata->phy, 1000baseT_Half); in xgbe_phy_read_status()
3006 else if (pdata->phy.supported == SUPPORTED_1000baseT_Full) in xgbe_phy_read_status()
3007 XGBE_SET_ADV(&pdata->phy, 1000baseT_Full); in xgbe_phy_read_status()
3012 lpa = xgbe_phy_mii_read(pdata, pdata->mdio_addr, MII_ANLPAR); in xgbe_phy_read_status()
3016 if (pdata->phy.supported == SUPPORTED_Autoneg) in xgbe_phy_read_status()
3017 XGBE_SET_ADV(&pdata->phy, Autoneg); in xgbe_phy_read_status()
3019 adv = xgbe_phy_mii_read(pdata, pdata->mdio_addr, MII_ANAR); in xgbe_phy_read_status()
3025 pdata->phy.speed = SPEED_10; in xgbe_phy_read_status()
3026 pdata->phy.duplex = DUPLEX_HALF; in xgbe_phy_read_status()
3027 pdata->phy.pause = 0; in xgbe_phy_read_status()
3028 pdata->phy.asym_pause = 0; in xgbe_phy_read_status()
3035 pdata->phy.speed = SPEED_1000; in xgbe_phy_read_status()
3038 pdata->phy.duplex = DUPLEX_FULL; in xgbe_phy_read_status()
3041 pdata->phy.speed = SPEED_100; in xgbe_phy_read_status()
3044 pdata->phy.duplex = DUPLEX_FULL; in xgbe_phy_read_status()
3047 pdata->phy.duplex = DUPLEX_FULL; in xgbe_phy_read_status()
3049 if (pdata->phy.duplex == DUPLEX_FULL) { in xgbe_phy_read_status()
3050 pdata->phy.pause = lpa & ANLPAR_FC ? 1 : 0; in xgbe_phy_read_status()
3051 pdata->phy.asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; in xgbe_phy_read_status()
3054 int bmcr = xgbe_phy_mii_read(pdata, pdata->mdio_addr, MII_BMCR); in xgbe_phy_read_status()
3059 pdata->phy.duplex = DUPLEX_FULL; in xgbe_phy_read_status()
3061 pdata->phy.duplex = DUPLEX_HALF; in xgbe_phy_read_status()
3064 pdata->phy.speed = SPEED_1000; in xgbe_phy_read_status()
3066 pdata->phy.speed = SPEED_100; in xgbe_phy_read_status()
3068 pdata->phy.speed = SPEED_10; in xgbe_phy_read_status()
3070 pdata->phy.pause = 0; in xgbe_phy_read_status()
3071 pdata->phy.asym_pause = 0; in xgbe_phy_read_status()
3073 "autoneg %#x\n", __func__, pdata->phy.speed, in xgbe_phy_read_status()
3074 pdata->phy.duplex, pdata->phy.link, pdata->phy.autoneg); in xgbe_phy_read_status()
3083 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_rrc()
3086 if (phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) { in xgbe_rrc()
3088 phy_data->rrc_count); in xgbe_rrc()
3089 phy_data->rrc_count = 0; in xgbe_rrc()
3090 if (pdata->link_workaround) { in xgbe_rrc()
3102 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_link_status()
3109 if (phy_data->port_mode == XGBE_PORT_MODE_SFP) { in xgbe_phy_link_status()
3114 if (phy_data->sfp_changed) { in xgbe_phy_link_status()
3120 if (phy_data->sfp_mod_absent || phy_data->sfp_rx_los) { in xgbe_phy_link_status()
3122 __func__, phy_data->sfp_mod_absent, in xgbe_phy_link_status()
3123 phy_data->sfp_rx_los); in xgbe_phy_link_status()
3125 if (!phy_data->sfp_mod_absent) { in xgbe_phy_link_status()
3133 if (phy_data->phydev || phy_data->port_mode != XGBE_PORT_MODE_SFP) { in xgbe_phy_link_status()
3134 if (pdata->axgbe_miibus == NULL) { in xgbe_phy_link_status()
3139 mii = device_get_softc(pdata->axgbe_miibus); in xgbe_phy_link_status()
3149 "autoneg %#x\n", __func__, pdata->phy.speed, in xgbe_phy_link_status()
3150 pdata->phy.duplex, pdata->phy.link, pdata->phy.autoneg); in xgbe_phy_link_status()
3151 ret = xgbe_phy_mii_read(pdata, pdata->mdio_addr, MII_BMSR); in xgbe_phy_link_status()
3154 if ((pdata->phy.autoneg == AUTONEG_ENABLE) && !ret) in xgbe_phy_link_status()
3157 if (pdata->phy.link) in xgbe_phy_link_status()
3183 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_gpio_setup()
3185 phy_data->sfp_gpio_address = XGBE_GPIO_ADDRESS_PCA9555 + in xgbe_phy_sfp_gpio_setup()
3186 XP_GET_BITS(pdata->pp3, XP_PROP_3, GPIO_ADDR); in xgbe_phy_sfp_gpio_setup()
3187 phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
3189 phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
3191 phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
3193 phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
3195 phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
3198 DBGPR("SFP: gpio_address=%#x\n", phy_data->sfp_gpio_address); in xgbe_phy_sfp_gpio_setup()
3199 DBGPR("SFP: gpio_mask=%#x\n", phy_data->sfp_gpio_mask); in xgbe_phy_sfp_gpio_setup()
3200 DBGPR("SFP: gpio_rx_los=%u\n", phy_data->sfp_gpio_rx_los); in xgbe_phy_sfp_gpio_setup()
3201 DBGPR("SFP: gpio_tx_fault=%u\n", phy_data->sfp_gpio_tx_fault); in xgbe_phy_sfp_gpio_setup()
3203 phy_data->sfp_gpio_mod_absent); in xgbe_phy_sfp_gpio_setup()
3205 phy_data->sfp_gpio_rate_select); in xgbe_phy_sfp_gpio_setup()
3211 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_comm_setup()
3214 mux_addr_hi = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_HI); in xgbe_phy_sfp_comm_setup()
3215 mux_addr_lo = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_LO); in xgbe_phy_sfp_comm_setup()
3219 phy_data->sfp_comm = XGBE_SFP_COMM_PCA9545; in xgbe_phy_sfp_comm_setup()
3220 phy_data->sfp_mux_address = (mux_addr_hi << 2) + mux_addr_lo; in xgbe_phy_sfp_comm_setup()
3221 phy_data->sfp_mux_channel = XP_GET_BITS(pdata->pp4, XP_PROP_4, in xgbe_phy_sfp_comm_setup()
3224 DBGPR("SFP: mux_address=%#x\n", phy_data->sfp_mux_address); in xgbe_phy_sfp_comm_setup()
3225 DBGPR("SFP: mux_channel=%u\n", phy_data->sfp_mux_channel); in xgbe_phy_sfp_comm_setup()
3238 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_int_mdio_reset()
3241 ret = pdata->hw_if.set_gpio(pdata, phy_data->mdio_reset_gpio); in xgbe_phy_int_mdio_reset()
3245 ret = pdata->hw_if.clr_gpio(pdata, phy_data->mdio_reset_gpio); in xgbe_phy_int_mdio_reset()
3253 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_i2c_mdio_reset()
3259 ret = xgbe_phy_i2c_read(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
3271 if (phy_data->mdio_reset_gpio < 8) in xgbe_phy_i2c_mdio_reset()
3272 gpio_data[1] |= (1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
3274 gpio_data[2] |= (1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
3277 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
3283 if (phy_data->mdio_reset_gpio < 8) in xgbe_phy_i2c_mdio_reset()
3284 gpio_data[1] &= ~(1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
3286 gpio_data[2] &= ~(1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
3289 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
3298 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_reset()
3301 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) in xgbe_phy_mdio_reset()
3308 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) in xgbe_phy_mdio_reset()
3310 else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) in xgbe_phy_mdio_reset()
3321 if (!phy_data->redrv) in xgbe_phy_redrv_error()
3324 if (phy_data->redrv_if >= XGBE_PHY_REDRV_IF_MAX) in xgbe_phy_redrv_error()
3327 switch (phy_data->redrv_model) { in xgbe_phy_redrv_error()
3329 if (phy_data->redrv_lane > 3) in xgbe_phy_redrv_error()
3333 if (phy_data->redrv_lane > 1) in xgbe_phy_redrv_error()
3346 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_reset_setup()
3348 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) in xgbe_phy_mdio_reset_setup()
3351 phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET); in xgbe_phy_mdio_reset_setup()
3352 switch (phy_data->mdio_reset) { in xgbe_phy_mdio_reset_setup()
3359 phy_data->mdio_reset); in xgbe_phy_mdio_reset_setup()
3360 return (-EINVAL); in xgbe_phy_mdio_reset_setup()
3363 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) { in xgbe_phy_mdio_reset_setup()
3364 phy_data->mdio_reset_addr = XGBE_GPIO_ADDRESS_PCA9555 + in xgbe_phy_mdio_reset_setup()
3365 XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET_I2C_ADDR); in xgbe_phy_mdio_reset_setup()
3366 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
3368 } else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) in xgbe_phy_mdio_reset_setup()
3369 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
3378 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_port_mode_mismatch()
3380 switch (phy_data->port_mode) { in xgbe_phy_port_mode_mismatch()
3382 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3383 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
3387 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) in xgbe_phy_port_mode_mismatch()
3391 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3392 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)) in xgbe_phy_port_mode_mismatch()
3396 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_port_mode_mismatch()
3400 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3401 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3402 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500)) in xgbe_phy_port_mode_mismatch()
3406 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3407 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3408 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
3412 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) in xgbe_phy_port_mode_mismatch()
3416 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3417 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3418 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
3431 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_conn_type_mismatch()
3433 switch (phy_data->port_mode) { in xgbe_phy_conn_type_mismatch()
3436 if (phy_data->conn_type == XGBE_CONN_TYPE_BACKPLANE) in xgbe_phy_conn_type_mismatch()
3444 if (phy_data->conn_type == XGBE_CONN_TYPE_MDIO) in xgbe_phy_conn_type_mismatch()
3448 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_conn_type_mismatch()
3462 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS)) in xgbe_phy_port_enabled()
3464 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE)) in xgbe_phy_port_enabled()
3473 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cdr_track()
3476 __func__, pdata->sysctl_an_cdr_workaround, phy_data->phy_cdr_notrack); in xgbe_phy_cdr_track()
3478 if (!pdata->sysctl_an_cdr_workaround) in xgbe_phy_cdr_track()
3481 if (!phy_data->phy_cdr_notrack) in xgbe_phy_cdr_track()
3484 DELAY(phy_data->phy_cdr_delay + 500); in xgbe_phy_cdr_track()
3489 phy_data->phy_cdr_notrack = 0; in xgbe_phy_cdr_track()
3491 axgbe_printf(2, "CDR TRACK DONE\n"); in xgbe_phy_cdr_track()
3497 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cdr_notrack()
3500 __func__, pdata->sysctl_an_cdr_workaround, phy_data->phy_cdr_notrack); in xgbe_phy_cdr_notrack()
3502 if (!pdata->sysctl_an_cdr_workaround) in xgbe_phy_cdr_notrack()
3505 if (phy_data->phy_cdr_notrack) in xgbe_phy_cdr_notrack()
3513 phy_data->phy_cdr_notrack = 1; in xgbe_phy_cdr_notrack()
3519 if (!pdata->sysctl_an_cdr_track_early) in xgbe_phy_kr_training_post()
3526 if (pdata->sysctl_an_cdr_track_early) in xgbe_phy_kr_training_pre()
3533 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_post()
3535 switch (pdata->an_mode) { in xgbe_phy_an_post()
3538 if (phy_data->cur_mode != XGBE_MODE_KR) in xgbe_phy_an_post()
3543 switch (pdata->an_result) { in xgbe_phy_an_post()
3548 if (phy_data->phy_cdr_delay < XGBE_CDR_DELAY_MAX) in xgbe_phy_an_post()
3549 phy_data->phy_cdr_delay += XGBE_CDR_DELAY_INC; in xgbe_phy_an_post()
3551 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT; in xgbe_phy_an_post()
3563 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_pre()
3565 switch (pdata->an_mode) { in xgbe_phy_an_pre()
3568 if (phy_data->cur_mode != XGBE_MODE_KR) in xgbe_phy_an_pre()
3581 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_stop()
3590 /* Reset CDR support */ in xgbe_phy_stop()
3597 pdata->i2c_if.i2c_stop(pdata); in xgbe_phy_stop()
3603 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_start()
3607 phy_data->redrv, phy_data->redrv_if, phy_data->start_mode); in xgbe_phy_start()
3610 ret = pdata->i2c_if.i2c_start(pdata); in xgbe_phy_start()
3616 /* Set the proper MDIO mode for the re-driver */ in xgbe_phy_start()
3617 if (phy_data->redrv && !phy_data->redrv_if) { in xgbe_phy_start()
3618 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr, in xgbe_phy_start()
3622 phy_data->redrv_addr); in xgbe_phy_start()
3627 /* Start in highest supported mode */ in xgbe_phy_start()
3628 xgbe_phy_set_mode(pdata, phy_data->start_mode); in xgbe_phy_start()
3630 /* Reset CDR support */ in xgbe_phy_start()
3634 switch (phy_data->port_mode) { in xgbe_phy_start()
3645 phy_data->sfp_phy_retries = 0; in xgbe_phy_start()
3663 pdata->i2c_if.i2c_stop(pdata); in xgbe_phy_start()
3671 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_reset()
3676 cur_mode = phy_data->cur_mode; in xgbe_phy_reset()
3680 axgbe_printf(3, "%s: mode %d\n", __func__, cur_mode); in xgbe_phy_reset()
3681 if (!phy_data->phydev) { in xgbe_phy_reset()
3706 pdata = &sc->pdata; in axgbe_ifmedia_sts()
3709 mtx_lock_spin(&pdata->mdio_mutex); in axgbe_ifmedia_sts()
3710 mii = device_get_softc(pdata->axgbe_miibus); in axgbe_ifmedia_sts()
3712 mii->mii_media_active, mii->mii_media_status); in axgbe_ifmedia_sts()
3714 ifmr->ifm_active = mii->mii_media_active; in axgbe_ifmedia_sts()
3715 ifmr->ifm_status = mii->mii_media_status; in axgbe_ifmedia_sts()
3716 mtx_unlock_spin(&pdata->mdio_mutex); in axgbe_ifmedia_sts()
3729 pdata = &sc->pdata; in axgbe_ifmedia_upd()
3732 mtx_lock_spin(&pdata->mdio_mutex); in axgbe_ifmedia_upd()
3733 mii = device_get_softc(pdata->axgbe_miibus); in axgbe_ifmedia_upd()
3734 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) in axgbe_ifmedia_upd()
3737 mtx_unlock_spin(&pdata->mdio_mutex); in axgbe_ifmedia_upd()
3745 if (pdata->axgbe_miibus != NULL) in xgbe_phy_exit()
3746 device_delete_child(pdata->dev, pdata->axgbe_miibus); in xgbe_phy_exit()
3749 free(pdata->phy_data, M_AXGBE); in xgbe_phy_exit()
3765 return (-ENODEV); in xgbe_phy_init()
3769 ret = pdata->i2c_if.i2c_init(pdata); in xgbe_phy_init()
3774 pdata->phy_data = phy_data; in xgbe_phy_init()
3776 phy_data->port_mode = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_MODE); in xgbe_phy_init()
3777 phy_data->port_id = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_ID); in xgbe_phy_init()
3778 phy_data->port_speeds = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS); in xgbe_phy_init()
3779 phy_data->conn_type = XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE); in xgbe_phy_init()
3780 phy_data->mdio_addr = XP_GET_BITS(pdata->pp0, XP_PROP_0, MDIO_ADDR); in xgbe_phy_init()
3782 pdata->mdio_addr = phy_data->mdio_addr; in xgbe_phy_init()
3783 DBGPR("port mode=%u\n", phy_data->port_mode); in xgbe_phy_init()
3784 DBGPR("port id=%u\n", phy_data->port_id); in xgbe_phy_init()
3785 DBGPR("port speeds=%#x\n", phy_data->port_speeds); in xgbe_phy_init()
3786 DBGPR("conn type=%u\n", phy_data->conn_type); in xgbe_phy_init()
3787 DBGPR("mdio addr=%u\n", phy_data->mdio_addr); in xgbe_phy_init()
3789 phy_data->redrv = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_PRESENT); in xgbe_phy_init()
3790 phy_data->redrv_if = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_IF); in xgbe_phy_init()
3791 phy_data->redrv_addr = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_ADDR); in xgbe_phy_init()
3792 phy_data->redrv_lane = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_LANE); in xgbe_phy_init()
3793 phy_data->redrv_model = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_MODEL); in xgbe_phy_init()
3795 if (phy_data->redrv) { in xgbe_phy_init()
3797 DBGPR("redrv i/f=%u\n", phy_data->redrv_if); in xgbe_phy_init()
3798 DBGPR("redrv addr=%#x\n", phy_data->redrv_addr); in xgbe_phy_init()
3799 DBGPR("redrv lane=%u\n", phy_data->redrv_lane); in xgbe_phy_init()
3800 DBGPR("redrv model=%u\n", phy_data->redrv_model); in xgbe_phy_init()
3804 phy_data->redrv_addr, phy_data->redrv_if); in xgbe_phy_init()
3807 axgbe_error("phy mode/connection mismatch " in xgbe_phy_init()
3808 "(%#x/%#x)\n", phy_data->port_mode, phy_data->conn_type); in xgbe_phy_init()
3809 return (-EINVAL); in xgbe_phy_init()
3812 /* Validate the mode requested */ in xgbe_phy_init()
3814 axgbe_error("phy mode/speed mismatch " in xgbe_phy_init()
3815 "(%#x/%#x)\n", phy_data->port_mode, phy_data->port_speeds); in xgbe_phy_init()
3816 return (-EINVAL); in xgbe_phy_init()
3826 /* Validate the re-driver information */ in xgbe_phy_init()
3828 axgbe_error("phy re-driver settings error\n"); in xgbe_phy_init()
3829 return (-EINVAL); in xgbe_phy_init()
3831 pdata->kr_redrv = phy_data->redrv; in xgbe_phy_init()
3833 /* Indicate current mode is unknown */ in xgbe_phy_init()
3834 phy_data->cur_mode = XGBE_MODE_UNKNOWN; in xgbe_phy_init()
3837 XGBE_ZERO_SUP(&pdata->phy); in xgbe_phy_init()
3839 DBGPR("%s: port mode %d\n", __func__, phy_data->port_mode); in xgbe_phy_init()
3840 switch (phy_data->port_mode) { in xgbe_phy_init()
3843 XGBE_SET_SUP(&pdata->phy, Autoneg); in xgbe_phy_init()
3844 XGBE_SET_SUP(&pdata->phy, Pause); in xgbe_phy_init()
3845 XGBE_SET_SUP(&pdata->phy, Asym_Pause); in xgbe_phy_init()
3846 XGBE_SET_SUP(&pdata->phy, Backplane); in xgbe_phy_init()
3847 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3848 XGBE_SET_SUP(&pdata->phy, 1000baseKX_Full); in xgbe_phy_init()
3849 phy_data->start_mode = XGBE_MODE_KX_1000; in xgbe_phy_init()
3851 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_init()
3852 XGBE_SET_SUP(&pdata->phy, 10000baseKR_Full); in xgbe_phy_init()
3853 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_init()
3854 XGBE_SET_SUP(&pdata->phy, 10000baseR_FEC); in xgbe_phy_init()
3855 phy_data->start_mode = XGBE_MODE_KR; in xgbe_phy_init()
3858 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3861 XGBE_SET_SUP(&pdata->phy, Pause); in xgbe_phy_init()
3862 XGBE_SET_SUP(&pdata->phy, Asym_Pause); in xgbe_phy_init()
3863 XGBE_SET_SUP(&pdata->phy, Backplane); in xgbe_phy_init()
3864 XGBE_SET_SUP(&pdata->phy, 2500baseX_Full); in xgbe_phy_init()
3865 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3867 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3870 /* MDIO 1GBase-T support */ in xgbe_phy_init()
3872 XGBE_SET_SUP(&pdata->phy, Autoneg); in xgbe_phy_init()
3873 XGBE_SET_SUP(&pdata->phy, Pause); in xgbe_phy_init()
3874 XGBE_SET_SUP(&pdata->phy, Asym_Pause); in xgbe_phy_init()
3875 XGBE_SET_SUP(&pdata->phy, TP); in xgbe_phy_init()
3876 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3877 XGBE_SET_SUP(&pdata->phy, 100baseT_Full); in xgbe_phy_init()
3878 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3880 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3881 XGBE_SET_SUP(&pdata->phy, 1000baseT_Full); in xgbe_phy_init()
3882 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3885 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3888 /* MDIO Base-X support */ in xgbe_phy_init()
3890 XGBE_SET_SUP(&pdata->phy, Autoneg); in xgbe_phy_init()
3891 XGBE_SET_SUP(&pdata->phy, Pause); in xgbe_phy_init()
3892 XGBE_SET_SUP(&pdata->phy, Asym_Pause); in xgbe_phy_init()
3893 XGBE_SET_SUP(&pdata->phy, FIBRE); in xgbe_phy_init()
3894 XGBE_SET_SUP(&pdata->phy, 1000baseX_Full); in xgbe_phy_init()
3895 phy_data->start_mode = XGBE_MODE_X; in xgbe_phy_init()
3897 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3900 /* MDIO NBase-T support */ in xgbe_phy_init()
3902 XGBE_SET_SUP(&pdata->phy, Autoneg); in xgbe_phy_init()
3903 XGBE_SET_SUP(&pdata->phy, Pause); in xgbe_phy_init()
3904 XGBE_SET_SUP(&pdata->phy, Asym_Pause); in xgbe_phy_init()
3905 XGBE_SET_SUP(&pdata->phy, TP); in xgbe_phy_init()
3906 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3907 XGBE_SET_SUP(&pdata->phy, 100baseT_Full); in xgbe_phy_init()
3908 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3910 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3911 XGBE_SET_SUP(&pdata->phy, 1000baseT_Full); in xgbe_phy_init()
3912 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3914 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) { in xgbe_phy_init()
3915 XGBE_SET_SUP(&pdata->phy, 2500baseT_Full); in xgbe_phy_init()
3916 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3919 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; in xgbe_phy_init()
3922 /* 10GBase-T support */ in xgbe_phy_init()
3924 XGBE_SET_SUP(&pdata->phy, Autoneg); in xgbe_phy_init()
3925 XGBE_SET_SUP(&pdata->phy, Pause); in xgbe_phy_init()
3926 XGBE_SET_SUP(&pdata->phy, Asym_Pause); in xgbe_phy_init()
3927 XGBE_SET_SUP(&pdata->phy, TP); in xgbe_phy_init()
3928 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3929 XGBE_SET_SUP(&pdata->phy, 100baseT_Full); in xgbe_phy_init()
3930 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3932 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3933 XGBE_SET_SUP(&pdata->phy, 1000baseT_Full); in xgbe_phy_init()
3934 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3936 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_init()
3937 XGBE_SET_SUP(&pdata->phy, 10000baseT_Full); in xgbe_phy_init()
3938 phy_data->start_mode = XGBE_MODE_KR; in xgbe_phy_init()
3941 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; in xgbe_phy_init()
3944 /* 10GBase-R support */ in xgbe_phy_init()
3946 XGBE_SET_SUP(&pdata->phy, Autoneg); in xgbe_phy_init()
3947 XGBE_SET_SUP(&pdata->phy, Pause); in xgbe_phy_init()
3948 XGBE_SET_SUP(&pdata->phy, Asym_Pause); in xgbe_phy_init()
3949 XGBE_SET_SUP(&pdata->phy, FIBRE); in xgbe_phy_init()
3950 XGBE_SET_SUP(&pdata->phy, 10000baseSR_Full); in xgbe_phy_init()
3951 XGBE_SET_SUP(&pdata->phy, 10000baseLR_Full); in xgbe_phy_init()
3952 XGBE_SET_SUP(&pdata->phy, 10000baseLRM_Full); in xgbe_phy_init()
3953 XGBE_SET_SUP(&pdata->phy, 10000baseER_Full); in xgbe_phy_init()
3954 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_init()
3955 XGBE_SET_SUP(&pdata->phy, 10000baseR_FEC); in xgbe_phy_init()
3956 phy_data->start_mode = XGBE_MODE_SFI; in xgbe_phy_init()
3958 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3963 XGBE_SET_SUP(&pdata->phy, Autoneg); in xgbe_phy_init()
3964 XGBE_SET_SUP(&pdata->phy, Pause); in xgbe_phy_init()
3965 XGBE_SET_SUP(&pdata->phy, Asym_Pause); in xgbe_phy_init()
3966 XGBE_SET_SUP(&pdata->phy, TP); in xgbe_phy_init()
3967 XGBE_SET_SUP(&pdata->phy, FIBRE); in xgbe_phy_init()
3968 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) in xgbe_phy_init()
3969 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3970 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_init()
3971 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3972 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) in xgbe_phy_init()
3973 phy_data->start_mode = XGBE_MODE_SFI; in xgbe_phy_init()
3975 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3978 DBGPR("%s: start %d mode %d adv 0x%x\n", __func__, in xgbe_phy_init()
3979 phy_data->start_mode, phy_data->phydev_mode, in xgbe_phy_init()
3980 pdata->phy.advertising); in xgbe_phy_init()
3983 return (-EINVAL); in xgbe_phy_init()
3986 axgbe_printf(2, "%s: start %d mode %d adv 0x%x\n", __func__, in xgbe_phy_init()
3987 phy_data->start_mode, phy_data->phydev_mode, pdata->phy.advertising); in xgbe_phy_init()
3989 DBGPR("%s: conn type %d mode %d\n", __func__, in xgbe_phy_init()
3990 phy_data->conn_type, phy_data->phydev_mode); in xgbe_phy_init()
3991 if ((phy_data->conn_type & XGBE_CONN_TYPE_MDIO) && in xgbe_phy_init()
3992 (phy_data->phydev_mode != XGBE_MDIO_MODE_NONE)) { in xgbe_phy_init()
3993 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr, in xgbe_phy_init()
3994 phy_data->phydev_mode); in xgbe_phy_init()
3997 phy_data->mdio_addr, phy_data->phydev_mode); in xgbe_phy_init()
3998 return (-EINVAL); in xgbe_phy_init()
4002 if (phy_data->redrv && !phy_data->redrv_if) { in xgbe_phy_init()
4003 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr, in xgbe_phy_init()
4007 phy_data->redrv_addr); in xgbe_phy_init()
4008 return (-EINVAL); in xgbe_phy_init()
4012 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT; in xgbe_phy_init()
4014 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) { in xgbe_phy_init()
4015 ret = mii_attach(pdata->dev, &pdata->axgbe_miibus, pdata->netdev, in xgbe_phy_init()
4018 pdata->mdio_addr, MII_OFFSET_ANY, MIIF_FORCEANEG); in xgbe_phy_init()
4022 return (-EINVAL); in xgbe_phy_init()
4034 struct xgbe_phy_impl_if *phy_impl = &phy_if->phy_impl; in xgbe_init_function_ptrs_phy_v2()
4036 phy_impl->init = xgbe_phy_init; in xgbe_init_function_ptrs_phy_v2()
4037 phy_impl->exit = xgbe_phy_exit; in xgbe_init_function_ptrs_phy_v2()
4039 phy_impl->reset = xgbe_phy_reset; in xgbe_init_function_ptrs_phy_v2()
4040 phy_impl->start = xgbe_phy_start; in xgbe_init_function_ptrs_phy_v2()
4041 phy_impl->stop = xgbe_phy_stop; in xgbe_init_function_ptrs_phy_v2()
4043 phy_impl->link_status = xgbe_phy_link_status; in xgbe_init_function_ptrs_phy_v2()
4045 phy_impl->valid_speed = xgbe_phy_valid_speed; in xgbe_init_function_ptrs_phy_v2()
4047 phy_impl->use_mode = xgbe_phy_use_mode; in xgbe_init_function_ptrs_phy_v2()
4048 phy_impl->set_mode = xgbe_phy_set_mode; in xgbe_init_function_ptrs_phy_v2()
4049 phy_impl->get_mode = xgbe_phy_get_mode; in xgbe_init_function_ptrs_phy_v2()
4050 phy_impl->switch_mode = xgbe_phy_switch_mode; in xgbe_init_function_ptrs_phy_v2()
4051 phy_impl->cur_mode = xgbe_phy_cur_mode; in xgbe_init_function_ptrs_phy_v2()
4052 phy_impl->get_type = xgbe_phy_get_type; in xgbe_init_function_ptrs_phy_v2()
4054 phy_impl->an_mode = xgbe_phy_an_mode; in xgbe_init_function_ptrs_phy_v2()
4056 phy_impl->an_config = xgbe_phy_an_config; in xgbe_init_function_ptrs_phy_v2()
4058 phy_impl->an_advertising = xgbe_phy_an_advertising; in xgbe_init_function_ptrs_phy_v2()
4060 phy_impl->an_outcome = xgbe_phy_an_outcome; in xgbe_init_function_ptrs_phy_v2()
4062 phy_impl->an_pre = xgbe_phy_an_pre; in xgbe_init_function_ptrs_phy_v2()
4063 phy_impl->an_post = xgbe_phy_an_post; in xgbe_init_function_ptrs_phy_v2()
4065 phy_impl->kr_training_pre = xgbe_phy_kr_training_pre; in xgbe_init_function_ptrs_phy_v2()
4066 phy_impl->kr_training_post = xgbe_phy_kr_training_post; in xgbe_init_function_ptrs_phy_v2()
4068 phy_impl->module_info = xgbe_phy_module_info; in xgbe_init_function_ptrs_phy_v2()
4069 phy_impl->module_eeprom = xgbe_phy_module_eeprom; in xgbe_init_function_ptrs_phy_v2()