Lines Matching +full:re +full:-
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
44 * by the driver - eg, calls to ath_hal_gettsf32().
129 #define INCR(_l, _sz) (_l) ++; (_l) &= ((_sz) - 1)
130 #define DECR(_l, _sz) (_l) --; (_l) &= ((_sz) - 1)
139 * + Verify multi-descriptor frames work!
146 * XXX shuffle the function orders so these pre-declarations aren't
161 struct ath_hal *ah = sc->sc_ah; in ath_edma_stoprecv()
175 sc->sc_rx_stopped = 1; in ath_edma_stoprecv()
184 /* XXX should generic-ify this */ in ath_edma_stoprecv()
185 if (sc->sc_rxedma[HAL_RX_QUEUE_HP].m_rxpending) { in ath_edma_stoprecv()
186 m_freem(sc->sc_rxedma[HAL_RX_QUEUE_HP].m_rxpending); in ath_edma_stoprecv()
187 sc->sc_rxedma[HAL_RX_QUEUE_HP].m_rxpending = NULL; in ath_edma_stoprecv()
190 if (sc->sc_rxedma[HAL_RX_QUEUE_LP].m_rxpending) { in ath_edma_stoprecv()
191 m_freem(sc->sc_rxedma[HAL_RX_QUEUE_LP].m_rxpending); in ath_edma_stoprecv()
192 sc->sc_rxedma[HAL_RX_QUEUE_LP].m_rxpending = NULL; in ath_edma_stoprecv()
200 * Re-initialise the FIFO given the current buffer contents.
201 * Specifically, walk from head -> tail, pushing the FIFO contents
207 struct ath_rx_edma *re = &sc->sc_rxedma[qtype]; in ath_edma_reinit_fifo() local
215 i = re->m_fifo_head; in ath_edma_reinit_fifo()
216 for (j = 0; j < re->m_fifo_depth; j++) { in ath_edma_reinit_fifo()
217 bf = re->m_fifo[i]; in ath_edma_reinit_fifo()
223 (uintmax_t)bf->bf_daddr); in ath_edma_reinit_fifo()
224 ath_hal_putrxbuf(sc->sc_ah, bf->bf_daddr, qtype); in ath_edma_reinit_fifo()
225 INCR(i, re->m_fifolen); in ath_edma_reinit_fifo()
229 if (i != re->m_fifo_tail) { in ath_edma_reinit_fifo()
230 device_printf(sc->sc_dev, "%s: i (%d) != tail! (%d)\n", in ath_edma_reinit_fifo()
233 re->m_fifo_tail); in ath_edma_reinit_fifo()
244 struct ath_hal *ah = sc->sc_ah; in ath_edma_startrecv()
248 sc->sc_rx_resetted, sc->sc_rx_stopped); in ath_edma_startrecv()
253 * Sanity check - are we being called whilst RX in ath_edma_startrecv()
265 if (sc->sc_rx_resetted == 1 || sc->sc_rx_stopped == 1) { in ath_edma_startrecv()
267 "%s: Re-initing HP FIFO\n", __func__); in ath_edma_startrecv()
270 "%s: Re-initing LP FIFO\n", __func__); in ath_edma_startrecv()
272 sc->sc_rx_resetted = 0; in ath_edma_startrecv()
274 device_printf(sc->sc_dev, in ath_edma_startrecv()
278 sc->sc_rx_resetted, in ath_edma_startrecv()
279 sc->sc_rx_stopped); in ath_edma_startrecv()
289 * the hardware already and reinitialised it, so it's a no-op. in ath_edma_startrecv()
292 sc->sc_rxedma[HAL_RX_QUEUE_HP].m_fifolen); in ath_edma_startrecv()
295 sc->sc_rxedma[HAL_RX_QUEUE_LP].m_fifolen); in ath_edma_startrecv()
298 ath_hal_startpcurecv(ah, (!! sc->sc_scanning)); in ath_edma_startrecv()
301 * We're now doing RX DMA! in ath_edma_startrecv()
303 sc->sc_rx_stopped = 0; in ath_edma_startrecv()
329 taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask); in ath_edma_recv_sched_queue()
353 taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask); in ath_edma_recv_sched()
365 sc->sc_rxproc_cnt++; in ath_edma_recv_flush()
369 while (taskqueue_cancel(sc->sc_tq, &sc->sc_rxtask, NULL) != 0) { in ath_edma_recv_flush()
370 taskqueue_drain(sc->sc_tq, &sc->sc_rxtask); in ath_edma_recv_flush()
378 * Flush any active frames from FIFO -> deferred list in ath_edma_recv_flush()
399 sc->sc_rxproc_cnt--; in ath_edma_recv_flush()
412 struct ath_rx_edma *re = &sc->sc_rxedma[qtype]; in ath_edma_recv_proc_queue() local
417 struct ath_hal *ah = sc->sc_ah; in ath_edma_recv_proc_queue()
423 nf = ath_hal_getchannoise(ah, sc->sc_curchan); in ath_edma_recv_proc_queue()
424 sc->sc_stats.ast_rx_noise = nf; in ath_edma_recv_proc_queue()
431 if (sc->sc_rx_resetted == 1) { in ath_edma_recv_proc_queue()
434 * receive has been stopped - so complain in ath_edma_recv_proc_queue()
437 device_printf(sc->sc_dev, in ath_edma_recv_proc_queue()
446 bf = re->m_fifo[re->m_fifo_head]; in ath_edma_recv_proc_queue()
449 device_printf(sc->sc_dev, "%s: Q%d: NULL bf?\n", in ath_edma_recv_proc_queue()
454 m = bf->bf_m; in ath_edma_recv_proc_queue()
455 ds = bf->bf_desc; in ath_edma_recv_proc_queue()
458 * Sync descriptor memory - this also syncs the buffer for us. in ath_edma_recv_proc_queue()
461 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, in ath_edma_recv_proc_queue()
463 rs = &bf->bf_status.ds_rxstat; in ath_edma_recv_proc_queue()
464 bf->bf_rxstatus = ath_hal_rxprocdesc(ah, ds, bf->bf_daddr, in ath_edma_recv_proc_queue()
466 if (bf->bf_rxstatus == HAL_EINPROGRESS) in ath_edma_recv_proc_queue()
469 if (sc->sc_debug & ATH_DEBUG_RECV_DESC) in ath_edma_recv_proc_queue()
470 ath_printrxbuf(sc, bf, 0, bf->bf_rxstatus == HAL_OK); in ath_edma_recv_proc_queue()
473 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_RXSTATUS)) in ath_edma_recv_proc_queue()
474 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_EDMA_RXSTATUS, in ath_edma_recv_proc_queue()
475 sc->sc_rx_statuslen, (char *) ds); in ath_edma_recv_proc_queue()
488 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); in ath_edma_recv_proc_queue()
494 re->m_fifo[re->m_fifo_head] = NULL; in ath_edma_recv_proc_queue()
495 TAILQ_INSERT_TAIL(&sc->sc_rx_rxlist[qtype], bf, bf_list); in ath_edma_recv_proc_queue()
498 INCR(re->m_fifo_head, re->m_fifolen); in ath_edma_recv_proc_queue()
499 re->m_fifo_depth--; in ath_edma_recv_proc_queue()
501 } while (re->m_fifo_depth > 0); in ath_edma_recv_proc_queue()
505 ath_edma_rxfifo_alloc(sc, qtype, re->m_fifolen); in ath_edma_recv_proc_queue()
510 ath_hal_rxmonitor(ah, &sc->sc_halstats, sc->sc_curchan); in ath_edma_recv_proc_queue()
522 * This destructively flushes the deferred queue - it doesn't
533 while (! TAILQ_EMPTY(&sc->sc_rx_rxlist[HAL_RX_QUEUE_LP])) { in ath_edma_flush_deferred_queue()
534 bf = TAILQ_FIRST(&sc->sc_rx_rxlist[HAL_RX_QUEUE_LP]); in ath_edma_flush_deferred_queue()
535 TAILQ_REMOVE(&sc->sc_rx_rxlist[HAL_RX_QUEUE_LP], bf, bf_list); in ath_edma_flush_deferred_queue()
539 while (! TAILQ_EMPTY(&sc->sc_rx_rxlist[HAL_RX_QUEUE_HP])) { in ath_edma_flush_deferred_queue()
540 bf = TAILQ_FIRST(&sc->sc_rx_rxlist[HAL_RX_QUEUE_HP]); in ath_edma_flush_deferred_queue()
541 TAILQ_REMOVE(&sc->sc_rx_rxlist[HAL_RX_QUEUE_HP], bf, bf_list); in ath_edma_flush_deferred_queue()
561 nf = ath_hal_getchannoise(sc->sc_ah, sc->sc_curchan); in ath_edma_recv_proc_deferred_queue()
567 tsf = ath_hal_gettsf64(sc->sc_ah); in ath_edma_recv_proc_deferred_queue()
571 TAILQ_CONCAT(&rxlist, &sc->sc_rx_rxlist[qtype], bf_list); in ath_edma_recv_proc_deferred_queue()
581 * Skip the RX descriptor status - start at the data offset in ath_edma_recv_proc_deferred_queue()
583 m_adj(bf->bf_m, sc->sc_rx_statuslen); in ath_edma_recv_proc_deferred_queue()
587 rs = &bf->bf_status.ds_rxstat; in ath_edma_recv_proc_deferred_queue()
588 m = bf->bf_m; in ath_edma_recv_proc_deferred_queue()
589 bf->bf_m = NULL; in ath_edma_recv_proc_deferred_queue()
590 if (ath_rx_pkt(sc, rs, bf->bf_rxstatus, tsf, nf, qtype, bf, m)) in ath_edma_recv_proc_deferred_queue()
595 sc->sc_lastrx = tsf; in ath_edma_recv_proc_deferred_queue()
620 struct ieee80211com *ic = &sc->sc_ic; in ath_edma_recv_tasklet()
628 if (sc->sc_inreset_cnt > 0) { in ath_edma_recv_tasklet()
629 device_printf(sc->sc_dev, "%s: sc_inreset_cnt > 0; skipping\n", in ath_edma_recv_tasklet()
634 sc->sc_rxproc_cnt++; in ath_edma_recv_tasklet()
656 if (ath_dfs_tasklet_needed(sc, sc->sc_curchan)) in ath_edma_recv_tasklet()
657 taskqueue_enqueue(sc->sc_tq, &sc->sc_dfstask); in ath_edma_recv_tasklet()
660 sc->sc_rxproc_cnt--; in ath_edma_recv_tasklet()
684 m = m_getm(NULL, sc->sc_edma_bufsize, M_NOWAIT, MT_DATA); in ath_edma_rxbuf_init()
690 len = m->m_ext.ext_size; in ath_edma_rxbuf_init()
692 device_printf(sc->sc_dev, "%s: called: m=%p, size=%d, mtod=%p\n", in ath_edma_rxbuf_init()
699 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; in ath_edma_rxbuf_init()
704 bf->bf_desc = mtod(m, struct ath_desc *); in ath_edma_rxbuf_init()
705 bf->bf_lastds = bf->bf_desc; /* XXX only really for TX? */ in ath_edma_rxbuf_init()
706 bf->bf_m = m; in ath_edma_rxbuf_init()
715 memset(bf->bf_desc, '\0', sc->sc_rx_statuslen); in ath_edma_rxbuf_init()
720 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, in ath_edma_rxbuf_init()
721 bf->bf_dmamap, m, bf->bf_segs, &bf->bf_nseg, BUS_DMA_NOWAIT); in ath_edma_rxbuf_init()
724 device_printf(sc->sc_dev, "%s: failed; error=%d\n", in ath_edma_rxbuf_init()
734 bf->bf_daddr = bf->bf_segs[0].ds_addr; in ath_edma_rxbuf_init()
743 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, in ath_edma_rxbuf_init()
762 bf = TAILQ_FIRST(&sc->sc_rxbuf); in ath_edma_rxbuf_alloc()
771 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); in ath_edma_rxbuf_alloc()
776 device_printf(sc->sc_dev, in ath_edma_rxbuf_alloc()
781 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); in ath_edma_rxbuf_alloc()
798 if (bf->bf_m) { in ath_edma_rxbuf_free()
799 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); in ath_edma_rxbuf_free()
800 m_freem(bf->bf_m); in ath_edma_rxbuf_free()
801 bf->bf_m = NULL; in ath_edma_rxbuf_free()
805 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); in ath_edma_rxbuf_free()
817 struct ath_rx_edma *re = &sc->sc_rxedma[qtype]; in ath_edma_rxfifo_alloc() local
826 for (i = 0; i < nbufs && re->m_fifo_depth < re->m_fifolen; i++) { in ath_edma_rxfifo_alloc()
828 if (re->m_fifo[re->m_fifo_tail] != NULL) { in ath_edma_rxfifo_alloc()
829 device_printf(sc->sc_dev, in ath_edma_rxfifo_alloc()
833 re->m_fifo_tail, in ath_edma_rxfifo_alloc()
834 re->m_fifo[re->m_fifo_tail]); in ath_edma_rxfifo_alloc()
837 ath_edma_rxbuf_free(sc, re->m_fifo[re->m_fifo_tail]); in ath_edma_rxfifo_alloc()
838 re->m_fifo_depth--; in ath_edma_rxfifo_alloc()
840 re->m_fifo[re->m_fifo_tail] = NULL; in ath_edma_rxfifo_alloc()
855 re->m_fifo[re->m_fifo_tail] = bf; in ath_edma_rxfifo_alloc()
862 bf->bf_desc, in ath_edma_rxfifo_alloc()
863 (uintmax_t) bf->bf_daddr); in ath_edma_rxfifo_alloc()
864 ath_hal_putrxbuf(sc->sc_ah, bf->bf_daddr, qtype); in ath_edma_rxfifo_alloc()
866 re->m_fifo_depth++; in ath_edma_rxfifo_alloc()
867 INCR(re->m_fifo_tail, re->m_fifolen); in ath_edma_rxfifo_alloc()
884 struct ath_rx_edma *re = &sc->sc_rxedma[qtype]; in ath_edma_rxfifo_flush() local
889 for (i = 0; i < re->m_fifolen; i++) { in ath_edma_rxfifo_flush()
890 if (re->m_fifo[i] != NULL) { in ath_edma_rxfifo_flush()
892 struct ath_buf *bf = re->m_fifo[i]; in ath_edma_rxfifo_flush()
894 if (sc->sc_debug & ATH_DEBUG_RECV_DESC) in ath_edma_rxfifo_flush()
897 ath_edma_rxbuf_free(sc, re->m_fifo[i]); in ath_edma_rxfifo_flush()
898 re->m_fifo[i] = NULL; in ath_edma_rxfifo_flush()
899 re->m_fifo_depth--; in ath_edma_rxfifo_flush()
903 if (re->m_rxpending != NULL) { in ath_edma_rxfifo_flush()
904 m_freem(re->m_rxpending); in ath_edma_rxfifo_flush()
905 re->m_rxpending = NULL; in ath_edma_rxfifo_flush()
907 re->m_fifo_head = re->m_fifo_tail = re->m_fifo_depth = 0; in ath_edma_rxfifo_flush()
918 struct ath_rx_edma *re = &sc->sc_rxedma[qtype]; in ath_edma_setup_rxfifo() local
922 if (! ath_hal_getrxfifodepth(sc->sc_ah, qtype, &re->m_fifolen)) { in ath_edma_setup_rxfifo()
923 device_printf(sc->sc_dev, "%s: qtype=%d, failed\n", in ath_edma_setup_rxfifo()
926 return (-EINVAL); in ath_edma_setup_rxfifo()
930 device_printf(sc->sc_dev, in ath_edma_setup_rxfifo()
934 re->m_fifolen); in ath_edma_setup_rxfifo()
936 /* Allocate ath_buf FIFO array, pre-zero'ed */ in ath_edma_setup_rxfifo()
937 re->m_fifo = malloc(sizeof(struct ath_buf *) * re->m_fifolen, in ath_edma_setup_rxfifo()
940 if (re->m_fifo == NULL) { in ath_edma_setup_rxfifo()
941 device_printf(sc->sc_dev, "%s: malloc failed\n", in ath_edma_setup_rxfifo()
943 return (-ENOMEM); in ath_edma_setup_rxfifo()
949 re->m_rxpending = NULL; in ath_edma_setup_rxfifo()
950 re->m_fifo_head = re->m_fifo_tail = re->m_fifo_depth = 0; in ath_edma_setup_rxfifo()
958 struct ath_rx_edma *re = &sc->sc_rxedma[qtype]; in ath_edma_rxfifo_free() local
960 device_printf(sc->sc_dev, "%s: called; qtype=%d\n", in ath_edma_rxfifo_free()
964 free(re->m_fifo, M_ATHDEV); in ath_edma_rxfifo_free()
977 error = ath_descdma_setup_rx_edma(sc, &sc->sc_rxdma, &sc->sc_rxbuf, in ath_edma_dma_rxsetup()
978 "rx", ath_rxbuf, sc->sc_rx_statuslen); in ath_edma_dma_rxsetup()
1005 if (sc->sc_rxdma.dd_desc_len != 0) in ath_edma_dma_rxteardown()
1006 ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf); in ath_edma_dma_rxteardown()
1016 sc->sc_edma_bufsize = 4096; in ath_recv_setup_edma()
1019 (void) ath_hal_getrxstatuslen(sc->sc_ah, &sc->sc_rx_statuslen); in ath_recv_setup_edma()
1022 (void) ath_hal_setrxbufsize(sc->sc_ah, sc->sc_edma_bufsize - in ath_recv_setup_edma()
1023 sc->sc_rx_statuslen); in ath_recv_setup_edma()
1026 device_printf(sc->sc_dev, "RX status length: %d\n", in ath_recv_setup_edma()
1027 sc->sc_rx_statuslen); in ath_recv_setup_edma()
1028 device_printf(sc->sc_dev, "RX buffer size: %d\n", in ath_recv_setup_edma()
1029 sc->sc_edma_bufsize); in ath_recv_setup_edma()
1032 sc->sc_rx.recv_stop = ath_edma_stoprecv; in ath_recv_setup_edma()
1033 sc->sc_rx.recv_start = ath_edma_startrecv; in ath_recv_setup_edma()
1034 sc->sc_rx.recv_flush = ath_edma_recv_flush; in ath_recv_setup_edma()
1035 sc->sc_rx.recv_tasklet = ath_edma_recv_tasklet; in ath_recv_setup_edma()
1036 sc->sc_rx.recv_rxbuf_init = ath_edma_rxbuf_init; in ath_recv_setup_edma()
1038 sc->sc_rx.recv_setup = ath_edma_dma_rxsetup; in ath_recv_setup_edma()
1039 sc->sc_rx.recv_teardown = ath_edma_dma_rxteardown; in ath_recv_setup_edma()
1041 sc->sc_rx.recv_sched = ath_edma_recv_sched; in ath_recv_setup_edma()
1042 sc->sc_rx.recv_sched_queue = ath_edma_recv_sched_queue; in ath_recv_setup_edma()