Lines Matching +full:eeprom +full:- +full:merge +full:- +full:otp
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
44 * by the driver - eg, calls to ath_hal_gettsf32().
132 * Only enable this if you're working on PS-POLL support.
240 static int ath_anicalinterval = 100; /* ANI calibration - 100 msec */
269 switch (sc->sc_txqsetup &~ (1<<sc->sc_cabq->axq_qnum)) { in ath_legacy_attach_comp_func()
271 TASK_INIT(&sc->sc_txtask, 0, ath_tx_proc_q0, sc); in ath_legacy_attach_comp_func()
274 TASK_INIT(&sc->sc_txtask, 0, ath_tx_proc_q0123, sc); in ath_legacy_attach_comp_func()
277 TASK_INIT(&sc->sc_txtask, 0, ath_tx_proc, sc); in ath_legacy_attach_comp_func()
294 * If the chip is being programmed full-awake, then immediately
295 * program it full-awake so we can actually stay awake rather than
309 sc->sc_powersave_refcnt, in _ath_power_setpower()
310 sc->sc_target_powerstate, in _ath_power_setpower()
311 sc->sc_cur_powerstate); in _ath_power_setpower()
313 sc->sc_target_powerstate = power_state; in _ath_power_setpower()
322 if ((sc->sc_powersave_refcnt == 0 || power_state == HAL_PM_AWAKE) && in _ath_power_setpower()
323 power_state != sc->sc_cur_powerstate) { in _ath_power_setpower()
324 sc->sc_cur_powerstate = power_state; in _ath_power_setpower()
325 ath_hal_setpower(sc->sc_ah, power_state); in _ath_power_setpower()
328 * If the NIC is force-awake, then set the in _ath_power_setpower()
329 * self-gen frame state appropriately. in _ath_power_setpower()
331 * If the nic is in network sleep or full-sleep, in _ath_power_setpower()
332 * we let the above call leave the self-gen in _ath_power_setpower()
336 sc->sc_cur_powerstate == HAL_PM_AWAKE && in _ath_power_setpower()
337 sc->sc_target_selfgen_state != HAL_PM_AWAKE) { in _ath_power_setpower()
338 ath_hal_setselfgenpower(sc->sc_ah, in _ath_power_setpower()
339 sc->sc_target_selfgen_state); in _ath_power_setpower()
345 * Set the current self-generated frames state.
350 * needs to know to set PWRMGT=1 in self-generated frames.
363 sc->sc_target_selfgen_state); in _ath_power_set_selfgen()
365 sc->sc_target_selfgen_state = power_state; in _ath_power_set_selfgen()
368 * If the NIC is force-awake, then set the power state. in _ath_power_set_selfgen()
369 * Network-state and full-sleep will already transition it to in _ath_power_set_selfgen()
370 * mark self-gen frames as sleeping - and we can't in _ath_power_set_selfgen()
371 * guarantee the NIC is awake to program the self-gen frame in _ath_power_set_selfgen()
374 if (sc->sc_cur_powerstate == HAL_PM_AWAKE) { in _ath_power_set_selfgen()
375 ath_hal_setselfgenpower(sc->sc_ah, power_state); in _ath_power_set_selfgen()
398 sc->sc_powersave_refcnt); in _ath_power_set_power_state()
400 sc->sc_powersave_refcnt++; in _ath_power_set_power_state()
406 if (power_state != sc->sc_cur_powerstate) { in _ath_power_set_power_state()
407 ath_hal_setpower(sc->sc_ah, power_state); in _ath_power_set_power_state()
408 sc->sc_cur_powerstate = power_state; in _ath_power_set_power_state()
410 * Adjust the self-gen powerstate if appropriate. in _ath_power_set_power_state()
412 if (sc->sc_cur_powerstate == HAL_PM_AWAKE && in _ath_power_set_power_state()
413 sc->sc_target_selfgen_state != HAL_PM_AWAKE) { in _ath_power_set_power_state()
414 ath_hal_setselfgenpower(sc->sc_ah, in _ath_power_set_power_state()
415 sc->sc_target_selfgen_state); in _ath_power_set_power_state()
436 sc->sc_powersave_refcnt, in _ath_power_restore_power_state()
437 sc->sc_target_powerstate); in _ath_power_restore_power_state()
439 if (sc->sc_powersave_refcnt == 0) in _ath_power_restore_power_state()
440 device_printf(sc->sc_dev, "%s: refcnt=0?\n", __func__); in _ath_power_restore_power_state()
442 sc->sc_powersave_refcnt--; in _ath_power_restore_power_state()
444 if (sc->sc_powersave_refcnt == 0 && in _ath_power_restore_power_state()
445 sc->sc_target_powerstate != sc->sc_cur_powerstate) { in _ath_power_restore_power_state()
446 sc->sc_cur_powerstate = sc->sc_target_powerstate; in _ath_power_restore_power_state()
447 ath_hal_setpower(sc->sc_ah, sc->sc_target_powerstate); in _ath_power_restore_power_state()
451 * Adjust the self-gen powerstate if appropriate. in _ath_power_restore_power_state()
453 if (sc->sc_cur_powerstate == HAL_PM_AWAKE && in _ath_power_restore_power_state()
454 sc->sc_target_selfgen_state != HAL_PM_AWAKE) { in _ath_power_restore_power_state()
455 ath_hal_setselfgenpower(sc->sc_ah, in _ath_power_restore_power_state()
456 sc->sc_target_selfgen_state); in _ath_power_restore_power_state()
477 if (sc->sc_pci_devinfo & (ATH_PCI_CUS198 | ATH_PCI_CUS230)) { in ath_setup_hal_config()
478 ah_config->ath_hal_ext_lna_ctl_gpio = 0x200; /* bit 9 */ in ath_setup_hal_config()
479 ah_config->ath_hal_ext_atten_margin_cfg = AH_TRUE; in ath_setup_hal_config()
480 ah_config->ath_hal_min_gainidx = AH_TRUE; in ath_setup_hal_config()
481 ah_config->ath_hal_ant_ctrl_comm2g_switch_enable = 0x000bbb88; in ath_setup_hal_config()
484 device_printf(sc->sc_dev, "configuring for %s\n", in ath_setup_hal_config()
485 (sc->sc_pci_devinfo & ATH_PCI_CUS198) ? in ath_setup_hal_config()
489 if (sc->sc_pci_devinfo & ATH_PCI_CUS217) in ath_setup_hal_config()
490 device_printf(sc->sc_dev, "CUS217 card detected\n"); in ath_setup_hal_config()
492 if (sc->sc_pci_devinfo & ATH_PCI_CUS252) in ath_setup_hal_config()
493 device_printf(sc->sc_dev, "CUS252 card detected\n"); in ath_setup_hal_config()
495 if (sc->sc_pci_devinfo & ATH_PCI_AR9565_1ANT) in ath_setup_hal_config()
496 device_printf(sc->sc_dev, "WB335 1-ANT card detected\n"); in ath_setup_hal_config()
498 if (sc->sc_pci_devinfo & ATH_PCI_AR9565_2ANT) in ath_setup_hal_config()
499 device_printf(sc->sc_dev, "WB335 2-ANT card detected\n"); in ath_setup_hal_config()
501 if (sc->sc_pci_devinfo & ATH_PCI_BT_ANT_DIV) in ath_setup_hal_config()
502 device_printf(sc->sc_dev, in ath_setup_hal_config()
505 if (sc->sc_pci_devinfo & ATH_PCI_KILLER) in ath_setup_hal_config()
506 device_printf(sc->sc_dev, "Killer Wireless card detected\n"); in ath_setup_hal_config()
512 * EEPROM/OTP data, remove the combining feature from in ath_setup_hal_config()
515 if (sc->sc_pci_devinfo & (ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_AR9565_2ANT)) { in ath_setup_hal_config()
516 if (!(sc->sc_pci_devinfo & ATH9K_PCI_BT_ANT_DIV)) in ath_setup_hal_config()
517 pCap->hw_caps &= ~ATH9K_HW_CAP_ANT_DIV_COMB; in ath_setup_hal_config()
520 if (sc->sc_pci_devinfo & ATH9K_PCI_BT_ANT_DIV) { in ath_setup_hal_config()
521 pCap->hw_caps |= ATH9K_HW_CAP_BT_ANT_DIV; in ath_setup_hal_config()
522 device_printf(sc->sc_dev, "Set BT/WLAN RX diversity capability\n"); in ath_setup_hal_config()
526 if (sc->sc_pci_devinfo & ATH_PCI_D3_L1_WAR) { in ath_setup_hal_config()
527 ah_config->ath_hal_pcie_waen = 0x0040473b; in ath_setup_hal_config()
528 device_printf(sc->sc_dev, "Enable WAR for ASPM D3/L1\n"); in ath_setup_hal_config()
532 if (sc->sc_pci_devinfo & ATH9K_PCI_NO_PLL_PWRSAVE) { in ath_setup_hal_config()
533 ah->config.no_pll_pwrsave = true; in ath_setup_hal_config()
534 device_printf(sc->sc_dev, "Disable PLL PowerSave\n"); in ath_setup_hal_config()
543 * Returns 0, macaddr in macaddr if successful; -1 otherwise.
560 device_get_name(sc->sc_dev), in ath_fetch_mac_kenv()
561 device_get_unit(sc->sc_dev)); in ath_fetch_mac_kenv()
569 device_printf(sc->sc_dev, in ath_fetch_mac_kenv()
591 return (-1); in ath_fetch_mac_kenv()
601 struct ieee80211com *ic = &sc->sc_ic; in ath_attach()
611 ic->ic_softc = sc; in ath_attach()
612 ic->ic_name = device_get_nameunit(sc->sc_dev); in ath_attach()
623 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, in ath_attach()
624 sc->sc_eepromdata, &ah_config, &status); in ath_attach()
626 device_printf(sc->sc_dev, in ath_attach()
631 sc->sc_ah = ah; in ath_attach()
632 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */ in ath_attach()
634 sc->sc_debug = ath_debug; in ath_attach()
654 if (ath_hal_hasedma(sc->sc_ah)) { in ath_attach()
655 sc->sc_isedma = 1; in ath_attach()
663 if (ath_hal_hasmybeacon(sc->sc_ah)) { in ath_attach()
664 sc->sc_do_mybeacon = 1; in ath_attach()
668 * Check if the MAC has multi-rate retry support. in ath_attach()
674 sc->sc_mrretry = ath_hal_setupxtxdesc(ah, NULL, 0,0, 0,0, 0,0); in ath_attach()
682 sc->sc_needmib = 1; in ath_attach()
687 sc->sc_keymax = ath_hal_keycachesize(ah); in ath_attach()
688 if (sc->sc_keymax > ATH_KEYMAX) { in ath_attach()
689 device_printf(sc->sc_dev, in ath_attach()
691 ATH_KEYMAX, sc->sc_keymax); in ath_attach()
692 sc->sc_keymax = ATH_KEYMAX; in ath_attach()
698 for (i = 0; i < sc->sc_keymax; i++) in ath_attach()
730 device_printf(sc->sc_dev, in ath_attach()
736 device_printf(sc->sc_dev, in ath_attach()
746 device_printf(sc->sc_dev, in ath_attach()
751 callout_init_mtx(&sc->sc_cal_ch, &sc->sc_mtx, 0); in ath_attach()
752 callout_init_mtx(&sc->sc_wd_ch, &sc->sc_mtx, 0); in ath_attach()
756 sc->sc_tq = taskqueue_create("ath_taskq", M_NOWAIT, in ath_attach()
757 taskqueue_thread_enqueue, &sc->sc_tq); in ath_attach()
758 taskqueue_start_threads(&sc->sc_tq, 1, PI_NET, "%s taskq", in ath_attach()
759 device_get_nameunit(sc->sc_dev)); in ath_attach()
761 TASK_INIT(&sc->sc_rxtask, 0, sc->sc_rx.recv_tasklet, sc); in ath_attach()
762 TASK_INIT(&sc->sc_bmisstask, 0, ath_bmiss_proc, sc); in ath_attach()
763 TASK_INIT(&sc->sc_tsfoortask, 0, ath_tsfoor_proc, sc); in ath_attach()
764 TASK_INIT(&sc->sc_bstucktask,0, ath_bstuck_proc, sc); in ath_attach()
765 TASK_INIT(&sc->sc_resettask,0, ath_reset_proc, sc); in ath_attach()
766 TASK_INIT(&sc->sc_txqtask, 0, ath_txq_sched_tasklet, sc); in ath_attach()
767 TASK_INIT(&sc->sc_fataltask, 0, ath_fatal_proc, sc); in ath_attach()
775 * XXX PS-Poll in ath_attach()
777 sc->sc_bhalq = ath_beaconq_setup(sc); in ath_attach()
778 if (sc->sc_bhalq == (u_int) -1) { in ath_attach()
779 device_printf(sc->sc_dev, in ath_attach()
784 sc->sc_cabq = ath_txq_setup(sc, HAL_TX_QUEUE_CAB, 0); in ath_attach()
785 if (sc->sc_cabq == NULL) { in ath_attach()
786 device_printf(sc->sc_dev, "unable to setup CAB xmit queue!\n"); in ath_attach()
792 device_printf(sc->sc_dev, in ath_attach()
808 if (sc->sc_ac2q[WME_AC_VI] != NULL) in ath_attach()
809 ath_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_VI]); in ath_attach()
810 if (sc->sc_ac2q[WME_AC_BE] != NULL) in ath_attach()
811 ath_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_BE]); in ath_attach()
812 sc->sc_ac2q[WME_AC_BE] = sc->sc_ac2q[WME_AC_BK]; in ath_attach()
813 sc->sc_ac2q[WME_AC_VI] = sc->sc_ac2q[WME_AC_BK]; in ath_attach()
814 sc->sc_ac2q[WME_AC_VO] = sc->sc_ac2q[WME_AC_BK]; in ath_attach()
820 * The non-EDMA chips may have some special case optimisations; in ath_attach()
823 sc->sc_tx.xmit_attach_comp_func(sc); in ath_attach()
831 sc->sc_setdefantenna = ath_setdefantenna; in ath_attach()
832 sc->sc_rc = ath_rate_attach(sc); in ath_attach()
833 if (sc->sc_rc == NULL) { in ath_attach()
840 device_printf(sc->sc_dev, in ath_attach()
848 device_printf(sc->sc_dev, in ath_attach()
856 device_printf(sc->sc_dev, in ath_attach()
864 device_printf(sc->sc_dev, in ath_attach()
871 TASK_INIT(&sc->sc_dfstask, 0, ath_dfs_tasklet, sc); in ath_attach()
874 sc->sc_blinking = 0; in ath_attach()
875 sc->sc_ledstate = 1; in ath_attach()
876 sc->sc_ledon = 0; /* low true */ in ath_attach()
877 sc->sc_ledidle = (2700*hz)/1000; /* 2.7sec */ in ath_attach()
878 callout_init(&sc->sc_ledtimer, 1); in ath_attach()
881 * Don't setup hardware-based blinking. in ath_attach()
888 * the MAC power LED to GPIO2. However, the DWA-552 cardbus in ath_attach()
891 sc->sc_hardled = (1 == 0); in ath_attach()
892 sc->sc_led_net_pin = -1; in ath_attach()
893 sc->sc_led_pwr_pin = -1; in ath_attach()
895 * Auto-enable soft led processing for IBM cards and for in ath_attach()
899 sc->sc_softled = (devid == AR5212_DEVID_IBM || devid == AR5211_DEVID); in ath_attach()
904 ic->ic_phytype = IEEE80211_T_OFDM; in ath_attach()
905 ic->ic_opmode = IEEE80211_M_STA; in ath_attach()
906 ic->ic_caps = in ath_attach()
912 | IEEE80211_C_WDS /* 4-address traffic works */ in ath_attach()
931 ic->ic_cryptocaps |= IEEE80211_CRYPTO_WEP; in ath_attach()
933 ic->ic_cryptocaps |= IEEE80211_CRYPTO_AES_OCB; in ath_attach()
935 ic->ic_cryptocaps |= IEEE80211_CRYPTO_AES_CCM; in ath_attach()
937 ic->ic_cryptocaps |= IEEE80211_CRYPTO_CKIP; in ath_attach()
939 ic->ic_cryptocaps |= IEEE80211_CRYPTO_TKIP; in ath_attach()
946 ic->ic_cryptocaps |= IEEE80211_CRYPTO_TKIPMIC; in ath_attach()
953 sc->sc_splitmic = 1; in ath_attach()
960 sc->sc_wmetkipmic = 1; in ath_attach()
962 sc->sc_hasclrkey = ath_hal_ciphersupported(ah, HAL_CIPHER_CLR); in ath_attach()
966 if (ath_hal_hasmcastkeysearch(sc->sc_ah) && in ath_attach()
967 !ath_hal_getmcastkeysearch(sc->sc_ah)) { in ath_attach()
968 ath_hal_setmcastkeysearch(sc->sc_ah, 1); in ath_attach()
970 sc->sc_mcastkey = ath_hal_getmcastkeysearch(ah); in ath_attach()
977 setbit(sc->sc_keymap, i); in ath_attach()
978 setbit(sc->sc_keymap, i+64); in ath_attach()
979 if (sc->sc_splitmic) { in ath_attach()
980 setbit(sc->sc_keymap, i+32); in ath_attach()
981 setbit(sc->sc_keymap, i+32+64); in ath_attach()
986 * per-packet support. The latter is not available on in ath_attach()
991 ic->ic_caps |= IEEE80211_C_TXPMGT; in ath_attach()
997 if (sc->sc_ac2q[WME_AC_BE] != sc->sc_ac2q[WME_AC_BK]) in ath_attach()
998 ic->ic_caps |= IEEE80211_C_WME; in ath_attach()
1003 ic->ic_caps |= IEEE80211_C_BURST; in ath_attach()
1004 sc->sc_hasbmask = ath_hal_hasbssidmask(ah); in ath_attach()
1005 sc->sc_hasbmatch = ath_hal_hasbssidmatch(ah); in ath_attach()
1006 sc->sc_hastsfadd = ath_hal_hastsfadjust(ah); in ath_attach()
1007 sc->sc_rxslink = ath_hal_self_linked_final_rxdesc(ah); in ath_attach()
1012 sc->sc_rxtsf32 = 1; in ath_attach()
1015 device_printf(sc->sc_dev, "RX timestamp: %d bits\n", i); in ath_attach()
1019 device_printf(sc->sc_dev, "TX timestamp: %d bits\n", i); in ath_attach()
1022 sc->sc_hasenforcetxop = ath_hal_hasenforcetxop(ah); in ath_attach()
1023 sc->sc_rx_lnamixer = ath_hal_hasrxlnamixer(ah); in ath_attach()
1024 sc->sc_hasdivcomb = ath_hal_hasdivantcomb(ah); in ath_attach()
1029 * EEPROM/OTP data, remove the combining feature from in ath_attach()
1041 if (sc->sc_pci_devinfo & (ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_AR9565_2ANT)) { in ath_attach()
1042 device_printf(sc->sc_dev, "%s: WB335: disabling LNA mixer diversity\n", in ath_attach()
1044 sc->sc_dolnadiv = 0; in ath_attach()
1049 ic->ic_caps |= IEEE80211_C_FF; in ath_attach()
1052 ic->ic_caps |= IEEE80211_C_TURBOP; in ath_attach()
1055 ic->ic_caps |= IEEE80211_C_TDMA; /* capable of TDMA */ in ath_attach()
1056 ic->ic_tdma_update = ath_tdma_update; in ath_attach()
1065 sc->sc_txq_data_minfree = 10; in ath_attach()
1075 sc->sc_txq_mcastq_maxdepth = MIN(64, ath_txbuf / 4); in ath_attach()
1080 sc->sc_txq_node_psq_maxdepth = 16; in ath_attach()
1087 * at 64, two full A-MPDU subframes of 32 frames each is in ath_attach()
1091 * to begin making A-MPDU frames out of. in ath_attach()
1093 sc->sc_txq_node_maxdepth = MIN(128, ath_txbuf / 4); in ath_attach()
1096 sc->sc_cabq_enable = 1; in ath_attach()
1102 * This must be done early - before the hardware is in ath_attach()
1106 if (resource_int_value(device_get_name(sc->sc_dev), in ath_attach()
1107 device_get_unit(sc->sc_dev), "rx_chainmask", in ath_attach()
1109 device_printf(sc->sc_dev, "Setting RX chainmask to 0x%x\n", in ath_attach()
1111 (void) ath_hal_setrxchainmask(sc->sc_ah, rx_chainmask); in ath_attach()
1113 if (resource_int_value(device_get_name(sc->sc_dev), in ath_attach()
1114 device_get_unit(sc->sc_dev), "tx_chainmask", in ath_attach()
1116 device_printf(sc->sc_dev, "Setting TX chainmask to 0x%x\n", in ath_attach()
1118 (void) ath_hal_settxchainmask(sc->sc_ah, tx_chainmask); in ath_attach()
1126 ath_hal_getrxchainmask(ah, &sc->sc_rxchainmask); in ath_attach()
1127 ath_hal_gettxchainmask(ah, &sc->sc_txchainmask); in ath_attach()
1133 sc->sc_mrrprot = 0; /* XXX should be a capability */ in ath_attach()
1139 &sc->sc_ent_cfg) == HAL_OK) in ath_attach()
1140 sc->sc_use_ent = 1; in ath_attach()
1151 device_printf(sc->sc_dev, "[HT] enabling HT modes\n"); in ath_attach()
1153 sc->sc_mrrprot = 1; /* XXX should be a capability */ in ath_attach()
1155 ic->ic_htcaps = IEEE80211_HTC_HT /* HT operation */ in ath_attach()
1156 | IEEE80211_HTC_AMPDU /* A-MPDU tx/rx */ in ath_attach()
1157 | IEEE80211_HTC_AMSDU /* A-MSDU tx/rx */ in ath_attach()
1159 /* max A-MSDU length */ in ath_attach()
1163 * Enable short-GI for HT20 only if the hardware in ath_attach()
1170 device_printf(sc->sc_dev, in ath_attach()
1171 "[HT] enabling short-GI in 20MHz mode\n"); in ath_attach()
1172 ic->ic_htcaps |= IEEE80211_HTCAP_SHORTGI20; in ath_attach()
1176 ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40 in ath_attach()
1186 ic->ic_txstream = txs; in ath_attach()
1187 ic->ic_rxstream = rxs; in ath_attach()
1192 * Ie - don't enable STBC TX if only one chain is enabled. in ath_attach()
1198 sc->sc_rx_stbc = 1; in ath_attach()
1199 device_printf(sc->sc_dev, in ath_attach()
1201 ic->ic_htcaps |= IEEE80211_HTCAP_RXSTBC_1STREAM; in ath_attach()
1205 sc->sc_tx_stbc = 1; in ath_attach()
1206 device_printf(sc->sc_dev, in ath_attach()
1208 ic->ic_htcaps |= IEEE80211_HTCAP_TXSTBC; in ath_attach()
1212 &sc->sc_rts_aggr_limit); in ath_attach()
1213 if (sc->sc_rts_aggr_limit != (64 * 1024)) in ath_attach()
1214 device_printf(sc->sc_dev, in ath_attach()
1216 sc->sc_rts_aggr_limit / 1024); in ath_attach()
1223 sc->sc_has_ldpc = 1; in ath_attach()
1224 device_printf(sc->sc_dev, in ath_attach()
1226 ic->ic_htcaps |= IEEE80211_HTCAP_LDPC | in ath_attach()
1230 device_printf(sc->sc_dev, in ath_attach()
1238 sc->sc_hwq_limit_aggr = ATH_AGGR_MIN_QDEPTH; in ath_attach()
1239 sc->sc_hwq_limit_nonaggr = ATH_NONAGGR_MIN_QDEPTH; in ath_attach()
1240 sc->sc_tid_hwq_lo = ATH_AGGR_SCHED_LOW; in ath_attach()
1241 sc->sc_tid_hwq_hi = ATH_AGGR_SCHED_HIGH; in ath_attach()
1242 sc->sc_aggr_limit = ATH_AGGR_MAXSIZE; in ath_attach()
1243 sc->sc_delim_min_pad = 0; in ath_attach()
1252 sc->sc_ah->ah_config.ah_serialise_reg_war = 1; in ath_attach()
1253 device_printf(sc->sc_dev, in ath_attach()
1260 TAILQ_INIT(&sc->sc_rx_rxlist[HAL_RX_QUEUE_HP]); in ath_attach()
1261 TAILQ_INIT(&sc->sc_rx_rxlist[HAL_RX_QUEUE_LP]); in ath_attach()
1265 * 32-bit boundary for 4-address and QoS frames. in ath_attach()
1267 ic->ic_flags |= IEEE80211_F_DATAPAD; in ath_attach()
1272 sc->sc_defant = ath_hal_getdefantenna(ah); in ath_attach()
1278 sc->sc_hasveol = ath_hal_hasveol(ah); in ath_attach()
1281 if (ath_fetch_mac_kenv(sc, ic->ic_macaddr) == 0) { in ath_attach()
1283 ath_hal_setmac(ah, ic->ic_macaddr); in ath_attach()
1285 ath_hal_getmac(ah, ic->ic_macaddr); in ath_attach()
1288 if (sc->sc_hasbmask) in ath_attach()
1289 ath_hal_getbssidmask(ah, sc->sc_hwbssidmask); in ath_attach()
1292 ic->ic_max_keyix = sc->sc_keymax; in ath_attach()
1295 ic->ic_setregdomain = ath_setregdomain; in ath_attach()
1296 ic->ic_getradiocaps = ath_getradiocaps; in ath_attach()
1297 sc->sc_opmode = HAL_M_STA; in ath_attach()
1300 ic->ic_ioctl = ath_ioctl; in ath_attach()
1301 ic->ic_parent = ath_parent; in ath_attach()
1302 ic->ic_transmit = ath_transmit; in ath_attach()
1303 ic->ic_newassoc = ath_newassoc; in ath_attach()
1304 ic->ic_updateslot = ath_updateslot; in ath_attach()
1305 ic->ic_wme.wme_update = ath_wme_update; in ath_attach()
1306 ic->ic_vap_create = ath_vap_create; in ath_attach()
1307 ic->ic_vap_delete = ath_vap_delete; in ath_attach()
1308 ic->ic_raw_xmit = ath_raw_xmit; in ath_attach()
1309 ic->ic_update_mcast = ath_update_mcast; in ath_attach()
1310 ic->ic_update_promisc = ath_update_promisc; in ath_attach()
1311 ic->ic_node_alloc = ath_node_alloc; in ath_attach()
1312 sc->sc_node_free = ic->ic_node_free; in ath_attach()
1313 ic->ic_node_free = ath_node_free; in ath_attach()
1314 sc->sc_node_cleanup = ic->ic_node_cleanup; in ath_attach()
1315 ic->ic_node_cleanup = ath_node_cleanup; in ath_attach()
1316 ic->ic_node_getsignal = ath_node_getsignal; in ath_attach()
1317 ic->ic_scan_start = ath_scan_start; in ath_attach()
1318 ic->ic_scan_end = ath_scan_end; in ath_attach()
1319 ic->ic_set_channel = ath_set_channel; in ath_attach()
1321 /* 802.11n specific - but just override anyway */ in ath_attach()
1322 sc->sc_addba_request = ic->ic_addba_request; in ath_attach()
1323 sc->sc_addba_response = ic->ic_addba_response; in ath_attach()
1324 sc->sc_addba_stop = ic->ic_addba_stop; in ath_attach()
1325 sc->sc_bar_response = ic->ic_bar_response; in ath_attach()
1326 sc->sc_addba_response_timeout = ic->ic_addba_response_timeout; in ath_attach()
1328 ic->ic_addba_request = ath_addba_request; in ath_attach()
1329 ic->ic_addba_response = ath_addba_response; in ath_attach()
1330 ic->ic_addba_response_timeout = ath_addba_response_timeout; in ath_attach()
1331 ic->ic_addba_stop = ath_addba_stop; in ath_attach()
1332 ic->ic_bar_response = ath_bar_response; in ath_attach()
1334 ic->ic_update_chw = ath_update_chw; in ath_attach()
1336 ic->ic_set_quiet = ath_set_quiet_ie; in ath_attach()
1344 &sc->sc_tx_th.wt_ihdr, sizeof(sc->sc_tx_th), 0, in ath_attach()
1346 &sc->sc_rx_th.wr_ihdr, sizeof(sc->sc_rx_th), 1, in ath_attach()
1353 &sc->sc_tx_th.wt_ihdr, sizeof(sc->sc_tx_th), in ath_attach()
1355 &sc->sc_rx_th.wr_ihdr, sizeof(sc->sc_rx_th), in ath_attach()
1363 if_ath_alq_init(&sc->sc_alq, device_get_nameunit(sc->sc_dev)); in ath_attach()
1364 if_ath_alq_setcfg(&sc->sc_alq, in ath_attach()
1365 sc->sc_ah->ah_macVersion, in ath_attach()
1366 sc->sc_ah->ah_macRev, in ath_attach()
1367 sc->sc_ah->ah_phyRev, in ath_attach()
1368 sc->sc_ah->ah_magic); in ath_attach()
1400 sc->sc_invalid = 1; in ath_attach()
1438 ieee80211_ifdetach(&sc->sc_ic); in ath_detach()
1439 taskqueue_free(sc->sc_tq); in ath_detach()
1441 if (sc->sc_tx99 != NULL) in ath_detach()
1442 sc->sc_tx99->detach(sc->sc_tx99); in ath_detach()
1444 ath_rate_detach(sc->sc_rc); in ath_detach()
1446 if_ath_alq_tidyup(&sc->sc_alq); in ath_detach()
1456 ath_hal_detach(sc->sc_ah); /* NB: sets chip in full sleep */ in ath_detach()
1463 * The first vap uses the MAC address from the EEPROM. For
1472 if (clone && sc->sc_hasbmask) { in assign_address()
1475 if ((sc->sc_bssidmask & (1<<i)) == 0) in assign_address()
1481 sc->sc_bssidmask |= 1<<i; in assign_address()
1482 sc->sc_hwbssidmask[0] &= ~mac[0]; in assign_address()
1484 sc->sc_nbssid0++; in assign_address()
1493 if (i != 0 || --sc->sc_nbssid0 == 0) { in reclaim_address()
1494 sc->sc_bssidmask &= ~(1<<i); in reclaim_address()
1498 if (sc->sc_bssidmask & (1<<i)) in reclaim_address()
1500 sc->sc_hwbssidmask[0] |= mask; in reclaim_address()
1517 if (sc->sc_bslot[slot] == NULL) { in assign_bslot()
1518 if (sc->sc_bslot[(slot+1)%ATH_BCBUF] == NULL && in assign_bslot()
1519 sc->sc_bslot[(slot-1)%ATH_BCBUF] == NULL) in assign_bslot()
1533 struct ath_softc *sc = ic->ic_softc; in ath_vap_create()
1548 if (sc->sc_nstavaps != 0) { /* XXX only 1 for now */ in ath_vap_create()
1549 device_printf(sc->sc_dev, "only 1 sta vap supported\n"); in ath_vap_create()
1552 if (sc->sc_nvaps) { in ath_vap_create()
1567 if (sc->sc_nvaps != 0) { /* XXX only 1 for now */ in ath_vap_create()
1568 device_printf(sc->sc_dev, in ath_vap_create()
1577 if (sc->sc_nvaps != 0) { in ath_vap_create()
1578 device_printf(sc->sc_dev, in ath_vap_create()
1588 if (sc->sc_nvaps != 0 && ic->ic_opmode != opmode) { in ath_vap_create()
1595 ic_opmode = ic->ic_opmode; in ath_vap_create()
1603 if (sc->sc_nvaps != 0 && ic->ic_opmode == IEEE80211_M_STA) { in ath_vap_create()
1604 device_printf(sc->sc_dev, in ath_vap_create()
1614 if (sc->sc_nvaps == 0) in ath_vap_create()
1617 ic_opmode = ic->ic_opmode; in ath_vap_create()
1620 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode); in ath_vap_create()
1626 if (needbeacon & TAILQ_EMPTY(&sc->sc_bbuf)) { in ath_vap_create()
1627 device_printf(sc->sc_dev, "no beacon buffer available\n"); in ath_vap_create()
1634 ath_hal_setbssidmask(sc->sc_ah, sc->sc_hwbssidmask); in ath_vap_create()
1637 vap = &avp->av_vap; in ath_vap_create()
1643 device_printf(sc->sc_dev, "%s: error %d creating vap\n", in ath_vap_create()
1649 vap->iv_key_alloc = ath_key_alloc; in ath_vap_create()
1650 vap->iv_key_delete = ath_key_delete; in ath_vap_create()
1651 vap->iv_key_set = ath_key_set; in ath_vap_create()
1652 vap->iv_key_update_begin = ath_key_update_begin; in ath_vap_create()
1653 vap->iv_key_update_end = ath_key_update_end; in ath_vap_create()
1656 avp->av_recv_mgmt = vap->iv_recv_mgmt; in ath_vap_create()
1657 vap->iv_recv_mgmt = ath_recv_mgmt; in ath_vap_create()
1658 vap->iv_reset = ath_reset_vap; in ath_vap_create()
1659 vap->iv_update_beacon = ath_beacon_update; in ath_vap_create()
1660 avp->av_newstate = vap->iv_newstate; in ath_vap_create()
1661 vap->iv_newstate = ath_newstate; in ath_vap_create()
1662 avp->av_bmiss = vap->iv_bmiss; in ath_vap_create()
1663 vap->iv_bmiss = ath_bmiss_vap; in ath_vap_create()
1665 avp->av_node_ps = vap->iv_node_ps; in ath_vap_create()
1666 vap->iv_node_ps = ath_node_powersave; in ath_vap_create()
1668 avp->av_set_tim = vap->iv_set_tim; in ath_vap_create()
1669 vap->iv_set_tim = ath_node_set_tim; in ath_vap_create()
1671 avp->av_recv_pspoll = vap->iv_recv_pspoll; in ath_vap_create()
1672 vap->iv_recv_pspoll = ath_node_recv_pspoll; in ath_vap_create()
1680 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_8; in ath_vap_create()
1687 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K; in ath_vap_create()
1688 vap->iv_ampdu_limit = IEEE80211_HTCAP_MAXRXAMPDU_64K; in ath_vap_create()
1690 avp->av_bslot = -1; in ath_vap_create()
1697 avp->av_bcbuf = TAILQ_FIRST(&sc->sc_bbuf); in ath_vap_create()
1698 TAILQ_REMOVE(&sc->sc_bbuf, avp->av_bcbuf, bf_list); in ath_vap_create()
1699 if (opmode != IEEE80211_M_IBSS || !sc->sc_hasveol) { in ath_vap_create()
1704 avp->av_bslot = assign_bslot(sc); in ath_vap_create()
1705 KASSERT(sc->sc_bslot[avp->av_bslot] == NULL, in ath_vap_create()
1706 ("beacon slot %u not empty", avp->av_bslot)); in ath_vap_create()
1707 sc->sc_bslot[avp->av_bslot] = vap; in ath_vap_create()
1708 sc->sc_nbcnvaps++; in ath_vap_create()
1710 if (sc->sc_hastsfadd && sc->sc_nbcnvaps > 0) { in ath_vap_create()
1716 sc->sc_stagbeacons = 1; in ath_vap_create()
1718 ath_txq_init(sc, &avp->av_mcastq, ATH_TXQ_SWQ); in ath_vap_create()
1721 ic->ic_opmode = ic_opmode; in ath_vap_create()
1723 sc->sc_nvaps++; in ath_vap_create()
1725 sc->sc_nstavaps++; in ath_vap_create()
1727 sc->sc_nmeshvaps++; in ath_vap_create()
1731 sc->sc_opmode = HAL_M_IBSS; in ath_vap_create()
1734 sc->sc_opmode = HAL_M_STA; in ath_vap_create()
1738 if (vap->iv_caps & IEEE80211_C_TDMA) { in ath_vap_create()
1739 sc->sc_tdma = 1; in ath_vap_create()
1741 sc->sc_stagbeacons = 0; in ath_vap_create()
1751 sc->sc_opmode = HAL_M_HOSTAP; in ath_vap_create()
1754 sc->sc_opmode = HAL_M_MONITOR; in ath_vap_create()
1760 if (sc->sc_hastsfadd) { in ath_vap_create()
1764 ath_hal_settsfadjust(sc->sc_ah, sc->sc_stagbeacons); in ath_vap_create()
1770 sc->sc_swbmiss = 1; in ath_vap_create()
1780 ath_hal_setbssidmask(sc->sc_ah, sc->sc_hwbssidmask); in ath_vap_create()
1790 struct ieee80211com *ic = vap->iv_ic; in ath_vap_delete()
1791 struct ath_softc *sc = ic->ic_softc; in ath_vap_delete()
1792 struct ath_hal *ah = sc->sc_ah; in ath_vap_delete()
1800 if (sc->sc_running) { in ath_vap_delete()
1826 * This may be racy - the ath task may be running and the packet in ath_vap_delete()
1827 * may be being scheduled between sw->hw txq. Tsk. in ath_vap_delete()
1842 if (avp->av_bcbuf != NULL) { in ath_vap_delete()
1843 if (avp->av_bslot != -1) { in ath_vap_delete()
1844 sc->sc_bslot[avp->av_bslot] = NULL; in ath_vap_delete()
1845 sc->sc_nbcnvaps--; in ath_vap_delete()
1847 ath_beacon_return(sc, avp->av_bcbuf); in ath_vap_delete()
1848 avp->av_bcbuf = NULL; in ath_vap_delete()
1849 if (sc->sc_nbcnvaps == 0) { in ath_vap_delete()
1850 sc->sc_stagbeacons = 0; in ath_vap_delete()
1851 if (sc->sc_hastsfadd) in ath_vap_delete()
1852 ath_hal_settsfadjust(sc->sc_ah, 0); in ath_vap_delete()
1857 ath_tx_draintxq(sc, &avp->av_mcastq); in ath_vap_delete()
1862 if (vap->iv_opmode == IEEE80211_M_STA) { in ath_vap_delete()
1863 sc->sc_nstavaps--; in ath_vap_delete()
1864 if (sc->sc_nstavaps == 0 && sc->sc_swbmiss) in ath_vap_delete()
1865 sc->sc_swbmiss = 0; in ath_vap_delete()
1866 } else if (vap->iv_opmode == IEEE80211_M_HOSTAP || in ath_vap_delete()
1867 vap->iv_opmode == IEEE80211_M_STA || in ath_vap_delete()
1868 vap->iv_opmode == IEEE80211_M_MBSS) { in ath_vap_delete()
1869 reclaim_address(sc, vap->iv_myaddr); in ath_vap_delete()
1870 ath_hal_setbssidmask(ah, sc->sc_hwbssidmask); in ath_vap_delete()
1871 if (vap->iv_opmode == IEEE80211_M_MBSS) in ath_vap_delete()
1872 sc->sc_nmeshvaps--; in ath_vap_delete()
1874 if (vap->iv_opmode != IEEE80211_M_WDS) in ath_vap_delete()
1875 sc->sc_nvaps--; in ath_vap_delete()
1878 if (sc->sc_tdma && sc->sc_nvaps == 0) { in ath_vap_delete()
1879 sc->sc_tdma = 0; in ath_vap_delete()
1880 sc->sc_swbmiss = 0; in ath_vap_delete()
1885 if (sc->sc_running) { in ath_vap_delete()
1891 device_printf(sc->sc_dev, in ath_vap_delete()
1893 if (sc->sc_beacons) { /* restart beacons */ in ath_vap_delete()
1895 if (sc->sc_tdma) in ath_vap_delete()
1901 ath_hal_intrset(ah, sc->sc_imask); in ath_vap_delete()
1912 struct ieee80211com *ic = &sc->sc_ic; in ath_suspend()
1914 sc->sc_resume_up = ic->ic_nrunning != 0; in ath_suspend()
1922 * XXX TODO: well, that's great, except for non-cardbus in ath_suspend()
1931 ath_hal_intrset(sc->sc_ah, 0); in ath_suspend()
1932 taskqueue_block(sc->sc_tq); in ath_suspend()
1935 callout_stop(&sc->sc_cal_ch); in ath_suspend()
1943 ath_hal_enablepcie(sc->sc_ah, 1, 1); in ath_suspend()
1949 * re-load keys that the 802.11 layer assumes are setup
1955 struct ieee80211com *ic = &sc->sc_ic; in ath_reset_keycache()
1956 struct ath_hal *ah = sc->sc_ah; in ath_reset_keycache()
1961 for (i = 0; i < sc->sc_keymax; i++) in ath_reset_keycache()
1980 sc->sc_cur_rxchainmask = sc->sc_rxchainmask; in ath_update_chainmasks()
1982 sc->sc_cur_txchainmask = sc->sc_txchainmask; in ath_update_chainmasks()
1984 sc->sc_cur_txchainmask = 1; in ath_update_chainmasks()
1990 sc->sc_cur_txchainmask, in ath_update_chainmasks()
1991 sc->sc_cur_rxchainmask); in ath_update_chainmasks()
1997 struct ieee80211com *ic = &sc->sc_ic; in ath_resume()
1998 struct ath_hal *ah = sc->sc_ah; in ath_resume()
2008 sc->sc_curchan != NULL ? sc->sc_curchan : ic->ic_curchan); in ath_resume()
2009 ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask, in ath_resume()
2010 sc->sc_cur_rxchainmask); in ath_resume()
2019 ath_hal_reset(ah, sc->sc_opmode, in ath_resume()
2020 sc->sc_curchan != NULL ? sc->sc_curchan : ic->ic_curchan, in ath_resume()
2025 sc->sc_rx_stopped = 1; in ath_resume()
2026 sc->sc_rx_resetted = 1; in ath_resume()
2030 ath_dfs_radar_enable(sc, ic->ic_curchan); in ath_resume()
2033 ath_spectral_enable(sc, ic->ic_curchan); in ath_resume()
2038 ath_btcoex_enable(sc, ic->ic_curchan); in ath_resume()
2044 if (sc->sc_hasenforcetxop && sc->sc_tdma) in ath_resume()
2045 ath_hal_setenforcetxop(sc->sc_ah, 1); in ath_resume()
2047 ath_hal_setenforcetxop(sc->sc_ah, 0); in ath_resume()
2053 if (sc->sc_resume_up) in ath_resume()
2080 struct ath_hal *ah = sc->sc_ah; in ath_intr()
2089 if (sc->sc_inreset_cnt) { in ath_intr()
2100 if (sc->sc_invalid) { in ath_intr()
2118 if (sc->sc_ic.ic_nrunning == 0 && sc->sc_running == 0) { in ath_intr()
2122 __func__, sc->sc_ic.ic_nrunning, sc->sc_running); in ath_intr()
2135 * that the hal returns a pseudo-ISR that may include in ath_intr()
2143 if_ath_alq_post_intr(&sc->sc_alq, status, ah->ah_intrstate, in ath_intr()
2144 ah->ah_syncstate); in ath_intr()
2149 ah->ah_intrstate[0], in ath_intr()
2150 ah->ah_intrstate[1], in ath_intr()
2151 ah->ah_intrstate[2], in ath_intr()
2152 ah->ah_intrstate[3], in ath_intr()
2153 ah->ah_intrstate[6]); in ath_intr()
2157 if (ah->ah_syncstate != 0) { in ath_intr()
2160 if (ah->ah_syncstate & (1 << i)) in ath_intr()
2161 sc->sc_intr_stats.sync_intr[i]++; in ath_intr()
2164 status &= sc->sc_imask; /* discard unasked for bits */ in ath_intr()
2166 /* Short-circuit un-handled interrupts */ in ath_intr()
2181 sc->sc_intr_cnt++; in ath_intr()
2190 sc->sc_stats.ast_hardware++; in ath_intr()
2192 taskqueue_enqueue(sc->sc_tq, &sc->sc_fataltask); in ath_intr()
2196 * Software beacon alert--time to send a beacon. in ath_intr()
2202 if (sc->sc_tdma) { in ath_intr()
2203 if (sc->sc_tdmaswba == 0) { in ath_intr()
2204 struct ieee80211com *ic = &sc->sc_ic; in ath_intr()
2206 TAILQ_FIRST(&ic->ic_vaps); in ath_intr()
2208 sc->sc_tdmaswba = in ath_intr()
2209 vap->iv_tdma->tdma_bintval; in ath_intr()
2211 sc->sc_tdmaswba--; in ath_intr()
2222 sc->sc_rx.recv_sched(sc, 1); in ath_intr()
2229 if (! sc->sc_isedma) { in ath_intr()
2232 * NB: the hardware should re-read the link when in ath_intr()
2236 sc->sc_stats.ast_rxeol++; in ath_intr()
2238 * Disable RXEOL/RXORN - prevent an interrupt in ath_intr()
2242 * modify sc_imask - that way if it is reset in ath_intr()
2246 imask = sc->sc_imask; in ath_intr()
2253 * This isn't entirely correct - the correct solution in ath_intr()
2260 if (! sc->sc_kickpcu) in ath_intr()
2261 sc->sc_rxlink = NULL; in ath_intr()
2262 sc->sc_kickpcu = 1; in ath_intr()
2270 sc->sc_rx.recv_sched(sc, 1); in ath_intr()
2273 sc->sc_stats.ast_txurn++; in ath_intr()
2282 sc->sc_stats.ast_rx_intr++; in ath_intr()
2283 sc->sc_rx.recv_sched(sc, 1); in ath_intr()
2286 sc->sc_stats.ast_tx_intr++; in ath_intr()
2292 if (! sc->sc_isedma) { in ath_intr()
2295 ath_hal_gettxintrtxqs(sc->sc_ah, &txqs); in ath_intr()
2299 sc->sc_txq_active, in ath_intr()
2300 sc->sc_txq_active | txqs); in ath_intr()
2301 sc->sc_txq_active |= txqs; in ath_intr()
2304 taskqueue_enqueue(sc->sc_tq, &sc->sc_txtask); in ath_intr()
2307 sc->sc_stats.ast_bmiss++; in ath_intr()
2308 taskqueue_enqueue(sc->sc_tq, &sc->sc_bmisstask); in ath_intr()
2311 sc->sc_stats.ast_tx_timeout++; in ath_intr()
2313 sc->sc_stats.ast_tx_cst++; in ath_intr()
2315 sc->sc_stats.ast_mib++; in ath_intr()
2326 ath_hal_mibevent(ah, &sc->sc_halstats); in ath_intr()
2333 if (sc->sc_kickpcu == 0) in ath_intr()
2334 ath_hal_intrset(ah, sc->sc_imask); in ath_intr()
2340 sc->sc_stats.ast_rxorn++; in ath_intr()
2344 * out of range beacon - wake the chip up, in ath_intr()
2345 * but don't modify self-gen frame config. in ath_intr()
2349 sc->sc_stats.ast_tsfoor++; in ath_intr()
2353 taskqueue_enqueue(sc->sc_tq, &sc->sc_tsfoortask); in ath_intr()
2354 device_printf(sc->sc_dev, "%s: TSFOOR\n", __func__); in ath_intr()
2361 sc->sc_intr_cnt--; in ath_intr()
2377 if (sc->sc_invalid) in ath_fatal_proc()
2380 device_printf(sc->sc_dev, "hardware error; resetting\n"); in ath_fatal_proc()
2386 if (ath_hal_getfatalstate(sc->sc_ah, &sp, &len)) { in ath_fatal_proc()
2389 device_printf(sc->sc_dev, in ath_fatal_proc()
2399 struct ath_softc *sc = vap->iv_ic->ic_softc; in ath_bmiss_vap()
2402 * Workaround phantom bmiss interrupts by sanity-checking in ath_bmiss_vap()
2419 if ((vap->iv_flags_ext & IEEE80211_FEXT_SWBMISS) == 0) { in ath_bmiss_vap()
2420 u_int64_t lastrx = sc->sc_lastrx; in ath_bmiss_vap()
2421 u_int64_t tsf = ath_hal_gettsf64(sc->sc_ah); in ath_bmiss_vap()
2424 vap->iv_bmissthreshold * vap->iv_bss->ni_intval * 1024; in ath_bmiss_vap()
2429 (unsigned long long)(tsf - lastrx), in ath_bmiss_vap()
2432 if (tsf - lastrx <= bmisstimeout) { in ath_bmiss_vap()
2433 sc->sc_stats.ast_bmiss_phantom++; in ath_bmiss_vap()
2444 * Keep the hardware awake if it's asleep (and leave self-gen in ath_bmiss_vap()
2448 * This handles three common beacon miss cases in STA powersave mode - in ath_bmiss_vap()
2461 if ((vap->iv_flags_ext & IEEE80211_FEXT_SWBMISS) == 0) { in ath_bmiss_vap()
2465 sc->sc_syncbeacon = 1; in ath_bmiss_vap()
2468 ATH_VAP(vap)->av_bmiss(vap); in ath_bmiss_vap()
2502 * It may be a non-recognised RX clear hang which needs a reset in ath_bmiss_proc()
2505 if (ath_hal_gethangstate(sc->sc_ah, 0xff, &hangs) && hangs != 0) { in ath_bmiss_proc()
2507 device_printf(sc->sc_dev, in ath_bmiss_proc()
2511 ieee80211_beacon_miss(&sc->sc_ic); in ath_bmiss_proc()
2515 sc->sc_syncbeacon = 1; in ath_bmiss_proc()
2548 sc->sc_syncbeacon = 1; in ath_tsfoor_proc()
2564 struct ieee80211com *ic = &sc->sc_ic; in ath_settkipmic()
2566 if ((ic->ic_cryptocaps & IEEE80211_CRYPTO_TKIP) && !sc->sc_wmetkipmic) { in ath_settkipmic()
2567 if (ic->ic_flags & IEEE80211_F_WME) { in ath_settkipmic()
2568 ath_hal_settkipmic(sc->sc_ah, AH_FALSE); in ath_settkipmic()
2569 ic->ic_cryptocaps &= ~IEEE80211_CRYPTO_TKIPMIC; in ath_settkipmic()
2571 ath_hal_settkipmic(sc->sc_ah, AH_TRUE); in ath_settkipmic()
2572 ic->ic_cryptocaps |= IEEE80211_CRYPTO_TKIPMIC; in ath_settkipmic()
2580 struct ieee80211com *ic = &sc->sc_ic; in ath_vap_clear_quiet_ie()
2584 TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { in ath_vap_clear_quiet_ie()
2586 /* Quiet time handling - ensure we resync */ in ath_vap_clear_quiet_ie()
2587 memset(&avp->quiet_ie, 0, sizeof(avp->quiet_ie)); in ath_vap_clear_quiet_ie()
2594 struct ieee80211com *ic = &sc->sc_ic; in ath_init()
2595 struct ath_hal *ah = sc->sc_ah; in ath_init()
2621 ath_update_chainmasks(sc, ic->ic_curchan); in ath_init()
2622 ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask, in ath_init()
2623 sc->sc_cur_rxchainmask); in ath_init()
2625 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_FALSE, in ath_init()
2627 device_printf(sc->sc_dev, in ath_init()
2633 sc->sc_rx_stopped = 1; in ath_init()
2634 sc->sc_rx_resetted = 1; in ath_init()
2640 ath_chan_change(sc, ic->ic_curchan); in ath_init()
2643 ath_dfs_radar_enable(sc, ic->ic_curchan); in ath_init()
2646 ath_spectral_enable(sc, ic->ic_curchan); in ath_init()
2651 ath_btcoex_enable(sc, ic->ic_curchan); in ath_init()
2657 if (sc->sc_hasenforcetxop && sc->sc_tdma) in ath_init()
2658 ath_hal_setenforcetxop(sc->sc_ah, 1); in ath_init()
2660 ath_hal_setenforcetxop(sc->sc_ah, 0); in ath_init()
2666 sc->sc_diversity = ath_hal_getdiversity(ah); in ath_init()
2667 sc->sc_lastlongcal = ticks; in ath_init()
2668 sc->sc_resetcal = 1; in ath_init()
2669 sc->sc_lastcalreset = 0; in ath_init()
2670 sc->sc_lastani = ticks; in ath_init()
2671 sc->sc_lastshortcal = ticks; in ath_init()
2672 sc->sc_doresetcal = AH_FALSE; in ath_init()
2678 sc->sc_beacons = 0; in ath_init()
2688 device_printf(sc->sc_dev, "unable to start recv logic\n"); in ath_init()
2696 sc->sc_imask = HAL_INT_RX | HAL_INT_TX in ath_init()
2704 if (sc->sc_isedma) in ath_init()
2705 sc->sc_imask |= (HAL_INT_RXHP | HAL_INT_RXLP); in ath_init()
2712 if (! sc->sc_isedma) in ath_init()
2713 sc->sc_imask |= HAL_INT_RXEOL; in ath_init()
2718 if (sc->sc_btcoex_mci) in ath_init()
2719 sc->sc_imask |= HAL_INT_MCI; in ath_init()
2725 if (sc->sc_needmib && ic->ic_opmode == IEEE80211_M_STA) in ath_init()
2726 sc->sc_imask |= HAL_INT_MIB; in ath_init()
2734 if (ic->ic_opmode == IEEE80211_M_STA) in ath_init()
2735 sc->sc_imask |= HAL_INT_TSFOOR; in ath_init()
2739 sc->sc_imask |= HAL_INT_GTT; in ath_init()
2742 __func__, sc->sc_imask); in ath_init()
2744 sc->sc_running = 1; in ath_init()
2745 callout_reset(&sc->sc_wd_ch, hz, ath_watchdog, sc); in ath_init()
2746 ath_hal_intrset(ah, sc->sc_imask); in ath_init()
2756 struct ath_hal *ah = sc->sc_ah; in ath_stop()
2765 if (sc->sc_running) { in ath_stop()
2782 if (sc->sc_tx99 != NULL) in ath_stop()
2783 sc->sc_tx99->stop(sc->sc_tx99); in ath_stop()
2785 callout_stop(&sc->sc_wd_ch); in ath_stop()
2786 sc->sc_wd_timer = 0; in ath_stop()
2787 sc->sc_running = 0; in ath_stop()
2788 if (!sc->sc_invalid) { in ath_stop()
2789 if (sc->sc_softled) { in ath_stop()
2790 callout_stop(&sc->sc_ledtimer); in ath_stop()
2791 ath_hal_gpioset(ah, sc->sc_ledpin, in ath_stop()
2792 !sc->sc_ledon); in ath_stop()
2793 sc->sc_blinking = 0; in ath_stop()
2798 if (!sc->sc_invalid) { in ath_stop()
2802 sc->sc_rxlink = NULL; in ath_stop()
2834 while (sc->sc_rxproc_cnt || sc->sc_txproc_cnt || in ath_txrx_stop_locked()
2835 sc->sc_txstart_cnt || sc->sc_intr_cnt) { in ath_txrx_stop_locked()
2838 msleep(sc, &sc->sc_pcu_mtx, 0, "ath_txrx_stop", in ath_txrx_stop_locked()
2840 i--; in ath_txrx_stop_locked()
2844 device_printf(sc->sc_dev, in ath_txrx_stop_locked()
2867 taskqueue_unblock(sc->sc_tq); in ath_txrx_start()
2881 * be locking-reentrant enough to behave correctly.
2895 if (sc->sc_inreset_cnt == 0) { in ath_reset_grablock()
2909 i--; in ath_reset_grablock()
2918 sc->sc_inreset_cnt++; in ath_reset_grablock()
2921 device_printf(sc->sc_dev, in ath_reset_grablock()
2926 device_printf(sc->sc_dev, in ath_reset_grablock()
2945 struct ieee80211com *ic = &sc->sc_ic; in ath_reset()
2946 struct ath_hal *ah = sc->sc_ah; in ath_reset()
2957 taskqueue_block(sc->sc_tq); in ath_reset()
2975 device_printf(sc->sc_dev, "%s: concurrent reset! Danger!\n", in ath_reset()
2991 * Regardless of whether we're doing a no-loss flush or in ath_reset()
3007 ath_update_chainmasks(sc, ic->ic_curchan); in ath_reset()
3008 ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask, in ath_reset()
3009 sc->sc_cur_rxchainmask); in ath_reset()
3010 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_TRUE, in ath_reset()
3012 device_printf(sc->sc_dev, in ath_reset()
3015 sc->sc_diversity = ath_hal_getdiversity(ah); in ath_reset()
3018 sc->sc_rx_stopped = 1; in ath_reset()
3019 sc->sc_rx_resetted = 1; in ath_reset()
3022 /* Quiet time handling - ensure we resync */ in ath_reset()
3026 ath_dfs_radar_enable(sc, ic->ic_curchan); in ath_reset()
3029 ath_spectral_enable(sc, ic->ic_curchan); in ath_reset()
3034 ath_btcoex_enable(sc, ic->ic_curchan); in ath_reset()
3040 if (sc->sc_hasenforcetxop && sc->sc_tdma) in ath_reset()
3041 ath_hal_setenforcetxop(sc->sc_ah, 1); in ath_reset()
3043 ath_hal_setenforcetxop(sc->sc_ah, 0); in ath_reset()
3046 device_printf(sc->sc_dev, in ath_reset()
3053 ath_chan_change(sc, ic->ic_curchan); in ath_reset()
3054 if (sc->sc_beacons) { /* restart beacons */ in ath_reset()
3056 if (sc->sc_tdma) in ath_reset()
3064 * Release the reset lock and re-enable interrupts here. in ath_reset()
3068 * reset counter - this way ath_intr() doesn't end up in ath_reset()
3076 sc->sc_inreset_cnt--; in ath_reset()
3077 sc->sc_txstart_cnt++; in ath_reset()
3079 ath_hal_intrset(ah, sc->sc_imask); in ath_reset()
3100 ATH_TXQ_LOCK(&sc->sc_txq[i]); in ath_reset()
3101 ath_txq_restart_dma(sc, &sc->sc_txq[i]); in ath_reset()
3102 ATH_TXQ_UNLOCK(&sc->sc_txq[i]); in ath_reset()
3105 ath_txq_sched(sc, &sc->sc_txq[i]); in ath_reset()
3116 sc->sc_txstart_cnt--; in ath_reset()
3131 struct ieee80211com *ic = vap->iv_ic; in ath_reset_vap()
3132 struct ath_softc *sc = ic->ic_softc; in ath_reset_vap()
3133 struct ath_hal *ah = sc->sc_ah; in ath_reset_vap()
3138 * If per-packet TPC is enabled, then we have nothing in ath_reset_vap()
3143 ath_hal_settxpowlimit(ah, ic->ic_txpowlimit); in ath_reset_vap()
3158 bf = TAILQ_FIRST(&sc->sc_txbuf_mgmt); in _ath_getbuf_locked()
3160 bf = TAILQ_FIRST(&sc->sc_txbuf); in _ath_getbuf_locked()
3163 sc->sc_stats.ast_tx_getnobuf++; in _ath_getbuf_locked()
3165 if (bf->bf_flags & ATH_BUF_BUSY) { in _ath_getbuf_locked()
3166 sc->sc_stats.ast_tx_getbusybuf++; in _ath_getbuf_locked()
3171 if (bf != NULL && (bf->bf_flags & ATH_BUF_BUSY) == 0) { in _ath_getbuf_locked()
3173 TAILQ_REMOVE(&sc->sc_txbuf_mgmt, bf, bf_list); in _ath_getbuf_locked()
3175 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list); in _ath_getbuf_locked()
3176 sc->sc_txbuf_cnt--; in _ath_getbuf_locked()
3183 if (sc->sc_txbuf_cnt < 0) { in _ath_getbuf_locked()
3184 device_printf(sc->sc_dev, in _ath_getbuf_locked()
3187 sc->sc_txbuf_cnt = 0; in _ath_getbuf_locked()
3196 TAILQ_FIRST(&sc->sc_txbuf) == NULL ? in _ath_getbuf_locked()
3203 bf->bf_flags = 0; in _ath_getbuf_locked()
3205 bf->bf_flags |= ATH_BUF_MGMT; in _ath_getbuf_locked()
3207 bf->bf_flags &= (~ATH_BUF_MGMT); in _ath_getbuf_locked()
3210 bf->bf_next = NULL; /* XXX just to be sure */ in _ath_getbuf_locked()
3211 bf->bf_last = NULL; /* XXX again, just to be sure */ in _ath_getbuf_locked()
3212 bf->bf_comp = NULL; /* XXX again, just to be sure */ in _ath_getbuf_locked()
3213 bzero(&bf->bf_state, sizeof(bf->bf_state)); in _ath_getbuf_locked()
3218 if (sc->sc_isedma) { in _ath_getbuf_locked()
3219 bf->bf_descid = sc->sc_txbuf_descid; in _ath_getbuf_locked()
3220 sc->sc_txbuf_descid++; in _ath_getbuf_locked()
3246 (bf->bf_flags & ATH_BUF_MGMT) ? in ath_buf_clone()
3252 tbf->bf_next = NULL; in ath_buf_clone()
3253 tbf->bf_nseg = bf->bf_nseg; in ath_buf_clone()
3254 tbf->bf_flags = bf->bf_flags & ATH_BUF_FLAGS_CLONE; in ath_buf_clone()
3255 tbf->bf_status = bf->bf_status; in ath_buf_clone()
3256 tbf->bf_m = bf->bf_m; in ath_buf_clone()
3257 tbf->bf_node = bf->bf_node; in ath_buf_clone()
3258 KASSERT((bf->bf_node != NULL), ("%s: bf_node=NULL!", __func__)); in ath_buf_clone()
3260 tbf->bf_lastds = NULL; in ath_buf_clone()
3262 tbf->bf_last = tbf; in ath_buf_clone()
3263 tbf->bf_comp = bf->bf_comp; in ath_buf_clone()
3267 /* The caller has to re-init the descriptor + links */ in ath_buf_clone()
3274 if (bf->bf_m != NULL) { in ath_buf_clone()
3278 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, in ath_buf_clone()
3280 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); in ath_buf_clone()
3283 bf->bf_m = NULL; in ath_buf_clone()
3284 bf->bf_node = NULL; in ath_buf_clone()
3287 memcpy(&tbf->bf_state, &bf->bf_state, sizeof(bf->bf_state)); in ath_buf_clone()
3308 sc->sc_stats.ast_tx_qstop++; in ath_getbuf()
3322 struct ath_softc *sc = ic->ic_softc; in ath_transmit()
3333 if (sc->sc_inreset_cnt > 0) { in ath_transmit()
3337 sc->sc_stats.ast_tx_qstop++; in ath_transmit()
3341 sc->sc_txstart_cnt++; in ath_transmit()
3351 * Grab the TX lock - it's ok to do this here; we haven't in ath_transmit()
3359 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; in ath_transmit()
3369 * XXX we should also track the per-node hardware queue in ath_transmit()
3374 if ((!(m->m_flags & M_EAPOL)) && in ath_transmit()
3375 (ATH_NODE(ni)->an_swq_depth > sc->sc_txq_node_maxdepth)) { in ath_transmit()
3376 sc->sc_stats.ast_tx_nodeq_overflow++; in ath_transmit()
3384 * If this is for non-EAPOL traffic, just leave some in ath_transmit()
3397 if ((!(m->m_flags & M_EAPOL)) && in ath_transmit()
3398 (sc->sc_txbuf_cnt <= sc->sc_txq_data_minfree)) { in ath_transmit()
3399 sc->sc_stats.ast_tx_nobuf++; in ath_transmit()
3414 if (m->m_flags & M_EAPOL) in ath_transmit()
3426 sc->sc_stats.ast_tx_nobuf++; in ath_transmit()
3443 if ((m->m_flags & M_FRAG) && in ath_transmit()
3447 sc->sc_stats.ast_tx_nofrag++; in ath_transmit()
3448 if_inc_counter(ni->ni_vap->iv_ifp, IFCOUNTER_OERRORS, 1); in ath_transmit()
3478 if (m->m_flags & M_FRAG) { in ath_transmit()
3481 struct mbuf *fm = m->m_nextpkt; in ath_transmit()
3490 fbf->bf_nextfraglen = fm->m_pkthdr.len; in ath_transmit()
3492 fm = fm->m_nextpkt; in ath_transmit()
3515 next = m->m_nextpkt; in ath_transmit()
3518 if_inc_counter(ni->ni_vap->iv_ifp, IFCOUNTER_OERRORS, 1); in ath_transmit()
3520 bf->bf_m = NULL; in ath_transmit()
3521 bf->bf_node = NULL; in ath_transmit()
3549 * XXX check sta power-save state? in ath_transmit()
3551 if (ni->ni_vap->iv_state != IEEE80211_S_RUN) { in ath_transmit()
3555 ieee80211_state_name[ni->ni_vap->iv_state]); in ath_transmit()
3570 sc->sc_wd_timer = 5; in ath_transmit()
3579 sc->sc_txstart_cnt--; in ath_transmit()
3601 struct ath_softc *sc = vap->iv_ic->ic_softc; in ath_key_update_begin()
3604 taskqueue_block(sc->sc_tq); in ath_key_update_begin()
3610 struct ath_softc *sc = vap->iv_ic->ic_softc; in ath_key_update_end()
3613 taskqueue_unblock(sc->sc_tq); in ath_key_update_end()
3619 struct ath_softc *sc = ic->ic_softc; in ath_update_promisc()
3626 ath_hal_setrxfilter(sc->sc_ah, rfilt); in ath_update_promisc()
3653 * Driver-internal mcast update call.
3660 struct ieee80211com *ic = &sc->sc_ic; in ath_update_mcast_hw()
3664 if (ic->ic_allmulti == 0) { in ath_update_mcast_hw()
3668 * Merge multicast addresses to form the hardware filter. in ath_update_mcast_hw()
3671 TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) in ath_update_mcast_hw()
3672 if_foreach_llmaddr(vap->iv_ifp, ath_hash_maddr, &mfilt); in ath_update_mcast_hw()
3676 ath_hal_setmcastfilter(sc->sc_ah, mfilt[0], mfilt[1]); in ath_update_mcast_hw()
3683 * Called from the net80211 layer - force the hardware
3689 struct ath_softc *sc = ic->ic_softc; in ath_update_mcast()
3705 struct ieee80211com *ic = &sc->sc_ic; in ath_mode_init()
3706 struct ath_hal *ah = sc->sc_ah; in ath_mode_init()
3718 /* handle any link-level address change */ in ath_mode_init()
3719 ath_hal_setmac(ah, ic->ic_macaddr); in ath_mode_init()
3731 struct ieee80211com *ic = &sc->sc_ic; in ath_setslottime()
3732 struct ath_hal *ah = sc->sc_ah; in ath_setslottime()
3735 if (IEEE80211_IS_CHAN_HALF(ic->ic_curchan)) in ath_setslottime()
3737 else if (IEEE80211_IS_CHAN_QUARTER(ic->ic_curchan)) in ath_setslottime()
3739 else if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { in ath_setslottime()
3742 if (ic->ic_flags & IEEE80211_F_SHSLOT) in ath_setslottime()
3751 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, in ath_setslottime()
3752 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", usec); in ath_setslottime()
3759 sc->sc_updateslot = OK; in ath_setslottime()
3770 struct ath_softc *sc = ic->ic_softc; in ath_updateslot()
3779 if (ic->ic_opmode == IEEE80211_M_HOSTAP || in ath_updateslot()
3780 ic->ic_opmode == IEEE80211_M_MBSS) in ath_updateslot()
3781 sc->sc_updateslot = UPDATE; in ath_updateslot()
3797 TAILQ_CONCAT(&dst->axq_q, &src->axq_q, bf_list); in ath_txqmove()
3798 dst->axq_link = src->axq_link; in ath_txqmove()
3799 src->axq_link = NULL; in ath_txqmove()
3800 dst->axq_depth += src->axq_depth; in ath_txqmove()
3801 dst->axq_aggr_depth += src->axq_aggr_depth; in ath_txqmove()
3802 src->axq_depth = 0; in ath_txqmove()
3803 src->axq_aggr_depth = 0; in ath_txqmove()
3817 device_printf(sc->sc_dev, "%s: resetting\n", __func__); in ath_reset_proc()
3831 if (ath_hal_gethangstate(sc->sc_ah, 0xff, &hangs) && hangs != 0) in ath_bstuck_proc()
3832 device_printf(sc->sc_dev, "bb hang detected (0x%x)\n", hangs); in ath_bstuck_proc()
3835 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_STUCK_BEACON)) in ath_bstuck_proc()
3836 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_STUCK_BEACON, 0, NULL); in ath_bstuck_proc()
3839 device_printf(sc->sc_dev, "stuck beacon; resetting (bmiss count %u)\n", in ath_bstuck_proc()
3840 sc->sc_bmisscount); in ath_bstuck_proc()
3841 sc->sc_stats.ast_bstuck++; in ath_bstuck_proc()
3854 error = ath_descdma_setup(sc, &sc->sc_txdma, &sc->sc_txbuf, in ath_desc_alloc()
3855 "tx", sc->sc_tx_desclen, ath_txbuf, ATH_MAX_SCATTER); in ath_desc_alloc()
3859 sc->sc_txbuf_cnt = ath_txbuf; in ath_desc_alloc()
3861 error = ath_descdma_setup(sc, &sc->sc_txdma_mgmt, &sc->sc_txbuf_mgmt, in ath_desc_alloc()
3862 "tx_mgmt", sc->sc_tx_desclen, ath_txbuf_mgmt, in ath_desc_alloc()
3865 ath_descdma_cleanup(sc, &sc->sc_txdma, &sc->sc_txbuf); in ath_desc_alloc()
3874 error = ath_descdma_setup(sc, &sc->sc_bdma, &sc->sc_bbuf, in ath_desc_alloc()
3875 "beacon", sc->sc_tx_desclen, ATH_BCBUF, 1); in ath_desc_alloc()
3877 ath_descdma_cleanup(sc, &sc->sc_txdma, &sc->sc_txbuf); in ath_desc_alloc()
3878 ath_descdma_cleanup(sc, &sc->sc_txdma_mgmt, in ath_desc_alloc()
3879 &sc->sc_txbuf_mgmt); in ath_desc_alloc()
3889 if (sc->sc_bdma.dd_desc_len != 0) in ath_desc_free()
3890 ath_descdma_cleanup(sc, &sc->sc_bdma, &sc->sc_bbuf); in ath_desc_free()
3891 if (sc->sc_txdma.dd_desc_len != 0) in ath_desc_free()
3892 ath_descdma_cleanup(sc, &sc->sc_txdma, &sc->sc_txbuf); in ath_desc_free()
3893 if (sc->sc_txdma_mgmt.dd_desc_len != 0) in ath_desc_free()
3894 ath_descdma_cleanup(sc, &sc->sc_txdma_mgmt, in ath_desc_free()
3895 &sc->sc_txbuf_mgmt); in ath_desc_free()
3901 struct ieee80211com *ic = vap->iv_ic; in ath_node_alloc()
3902 struct ath_softc *sc = ic->ic_softc; in ath_node_alloc()
3903 const size_t space = sizeof(struct ath_node) + sc->sc_rc->arc_space; in ath_node_alloc()
3913 /* Setup the mutex - there's no associd yet so set the name to NULL */ in ath_node_alloc()
3914 snprintf(an->an_name, sizeof(an->an_name), "%s: node %p", in ath_node_alloc()
3915 device_get_nameunit(sc->sc_dev), an); in ath_node_alloc()
3916 mtx_init(&an->an_mtx, an->an_name, NULL, MTX_DEF); in ath_node_alloc()
3921 an->an_node_stats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER; in ath_node_alloc()
3922 an->an_node_stats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER; in ath_node_alloc()
3923 an->an_node_stats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER; in ath_node_alloc()
3926 return &an->an_node; in ath_node_alloc()
3932 struct ieee80211com *ic = ni->ni_ic; in ath_node_cleanup()
3933 struct ath_softc *sc = ic->ic_softc; in ath_node_cleanup()
3936 ni->ni_macaddr, ":", ATH_NODE(ni)); in ath_node_cleanup()
3941 sc->sc_node_cleanup(ni); in ath_node_cleanup()
3947 struct ieee80211com *ic = ni->ni_ic; in ath_node_free()
3948 struct ath_softc *sc = ic->ic_softc; in ath_node_free()
3951 ni->ni_macaddr, ":", ATH_NODE(ni)); in ath_node_free()
3952 mtx_destroy(&ATH_NODE(ni)->an_mtx); in ath_node_free()
3953 sc->sc_node_free(ni); in ath_node_free()
3959 struct ieee80211com *ic = ni->ni_ic; in ath_node_getsignal()
3960 struct ath_softc *sc = ic->ic_softc; in ath_node_getsignal()
3961 struct ath_hal *ah = sc->sc_ah; in ath_node_getsignal()
3963 *rssi = ic->ic_node_getrssi(ni); in ath_node_getsignal()
3964 if (ni->ni_chan != IEEE80211_CHAN_ANYC) in ath_node_getsignal()
3965 *noise = ath_hal_getchannoise(ah, ni->ni_chan); in ath_node_getsignal()
3967 *noise = -95; /* nominally correct */ in ath_node_getsignal()
3976 struct ath_hal *ah = sc->sc_ah; in ath_setdefantenna()
3980 if (sc->sc_defant != antenna) in ath_setdefantenna()
3981 sc->sc_stats.ast_ant_defswitch++; in ath_setdefantenna()
3982 sc->sc_defant = antenna; in ath_setdefantenna()
3983 sc->sc_rxotherant = 0; in ath_setdefantenna()
3989 txq->axq_qnum = qnum; in ath_txq_init()
3990 txq->axq_ac = 0; in ath_txq_init()
3991 txq->axq_depth = 0; in ath_txq_init()
3992 txq->axq_aggr_depth = 0; in ath_txq_init()
3993 txq->axq_intrcnt = 0; in ath_txq_init()
3994 txq->axq_link = NULL; in ath_txq_init()
3995 txq->axq_softc = sc; in ath_txq_init()
3996 TAILQ_INIT(&txq->axq_q); in ath_txq_init()
3997 TAILQ_INIT(&txq->axq_tidq); in ath_txq_init()
3998 TAILQ_INIT(&txq->fifo.axq_q); in ath_txq_init()
4008 struct ath_hal *ah = sc->sc_ah; in ath_txq_setup()
4029 if (sc->sc_isedma) in ath_txq_setup()
4037 if (qnum == -1) { in ath_txq_setup()
4044 if (qnum >= nitems(sc->sc_txq)) { in ath_txq_setup()
4045 device_printf(sc->sc_dev, in ath_txq_setup()
4047 qnum, nitems(sc->sc_txq)); in ath_txq_setup()
4052 ath_txq_init(sc, &sc->sc_txq[qnum], qnum); in ath_txq_setup()
4053 sc->sc_txqsetup |= 1<<qnum; in ath_txq_setup()
4055 return &sc->sc_txq[qnum]; in ath_txq_setup()
4072 if (ac >= nitems(sc->sc_ac2q)) { in ath_tx_setup()
4073 device_printf(sc->sc_dev, "AC %u out of range, max %zu!\n", in ath_tx_setup()
4074 ac, nitems(sc->sc_ac2q)); in ath_tx_setup()
4079 txq->axq_ac = ac; in ath_tx_setup()
4080 sc->sc_ac2q[ac] = txq; in ath_tx_setup()
4092 #define ATH_EXPONENT_TO_VALUE(v) ((1<<v)-1) in ath_txq_update()
4093 struct ieee80211com *ic = &sc->sc_ic; in ath_txq_update()
4094 struct ath_txq *txq = sc->sc_ac2q[ac]; in ath_txq_update()
4097 struct ath_hal *ah = sc->sc_ah; in ath_txq_update()
4103 ath_hal_gettxqueueprops(ah, txq->axq_qnum, &qi); in ath_txq_update()
4105 if (sc->sc_tdma) { in ath_txq_update()
4107 * AIFS is zero so there's no pre-transmit wait. The in ath_txq_update()
4109 * through net80211. The QCU is setup to not do post-xmit in ath_txq_update()
4110 * back off, lockout all lower-priority QCU's, and fire in ath_txq_update()
4124 qi.tqi_readyTime = sc->sc_tdmaslotlen; in ath_txq_update()
4138 qi.tqi_aifs = wmep->wmep_aifsn; in ath_txq_update()
4139 qi.tqi_cwmin = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmin); in ath_txq_update()
4140 qi.tqi_cwmax = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmax); in ath_txq_update()
4142 qi.tqi_burstTime = IEEE80211_TXOP_TO_US(wmep->wmep_txopLimit); in ath_txq_update()
4149 __func__, txq->axq_qnum, qi.tqi_qflags, in ath_txq_update()
4152 if (!ath_hal_settxqueueprops(ah, txq->axq_qnum, &qi)) { in ath_txq_update()
4153 device_printf(sc->sc_dev, "unable to update hardware queue " in ath_txq_update()
4157 ath_hal_resettxqueue(ah, txq->axq_qnum); /* push to h/w */ in ath_txq_update()
4169 struct ath_softc *sc = ic->ic_softc; in ath_wme_update()
4184 ath_hal_releasetxqueue(sc->sc_ah, txq->axq_qnum); in ath_tx_cleanupq()
4185 sc->sc_txqsetup &= ~(1<<txq->axq_qnum); in ath_tx_cleanupq()
4200 ath_tx_cleanupq(sc, &sc->sc_txq[i]); in ath_tx_cleanup()
4210 int rix = sc->sc_rixmap[rate]; in ath_tx_findrix()
4219 struct ieee80211_node *ni = bf->bf_node; in ath_tx_update_stats()
4220 struct ieee80211com *ic = &sc->sc_ic; in ath_tx_update_stats()
4223 if (ts->ts_status == 0) { in ath_tx_update_stats()
4224 u_int8_t txant = ts->ts_antenna; in ath_tx_update_stats()
4230 sc->sc_stats.ast_ant_tx[txant]++; in ath_tx_update_stats()
4231 sc->sc_ant_tx[txant]++; in ath_tx_update_stats()
4232 if (ts->ts_finaltsi != 0) in ath_tx_update_stats()
4233 sc->sc_stats.ast_tx_altrate++; in ath_tx_update_stats()
4235 /* XXX TODO: should do per-pri conuters */ in ath_tx_update_stats()
4236 pri = M_WME_GETAC(bf->bf_m); in ath_tx_update_stats()
4238 ic->ic_wme.wme_hipri_traffic++; in ath_tx_update_stats()
4240 if ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0) in ath_tx_update_stats()
4241 ni->ni_inact = ni->ni_inact_reload; in ath_tx_update_stats()
4243 if (ts->ts_status & HAL_TXERR_XRETRY) in ath_tx_update_stats()
4244 sc->sc_stats.ast_tx_xretries++; in ath_tx_update_stats()
4245 if (ts->ts_status & HAL_TXERR_FIFO) in ath_tx_update_stats()
4246 sc->sc_stats.ast_tx_fifoerr++; in ath_tx_update_stats()
4247 if (ts->ts_status & HAL_TXERR_FILT) in ath_tx_update_stats()
4248 sc->sc_stats.ast_tx_filtered++; in ath_tx_update_stats()
4249 if (ts->ts_status & HAL_TXERR_XTXOP) in ath_tx_update_stats()
4250 sc->sc_stats.ast_tx_xtxop++; in ath_tx_update_stats()
4251 if (ts->ts_status & HAL_TXERR_TIMER_EXPIRED) in ath_tx_update_stats()
4252 sc->sc_stats.ast_tx_timerexpired++; in ath_tx_update_stats()
4254 if (bf->bf_m->m_flags & M_FF) in ath_tx_update_stats()
4255 sc->sc_stats.ast_ff_txerr++; in ath_tx_update_stats()
4258 if (ts->ts_flags & HAL_TX_DESC_CFG_ERR) in ath_tx_update_stats()
4259 sc->sc_stats.ast_tx_desccfgerr++; in ath_tx_update_stats()
4268 if (ts->ts_flags & HAL_TX_DATA_UNDERRUN) in ath_tx_update_stats()
4269 sc->sc_stats.ast_tx_data_underrun++; in ath_tx_update_stats()
4270 if (ts->ts_flags & HAL_TX_DELIM_UNDERRUN) in ath_tx_update_stats()
4271 sc->sc_stats.ast_tx_delim_underrun++; in ath_tx_update_stats()
4273 sr = ts->ts_shortretry; in ath_tx_update_stats()
4274 lr = ts->ts_longretry; in ath_tx_update_stats()
4275 sc->sc_stats.ast_tx_shortretry += sr; in ath_tx_update_stats()
4276 sc->sc_stats.ast_tx_longretry += lr; in ath_tx_update_stats()
4282 * "please don't retry the frame, and just return -1 status
4288 struct ath_tx_status *ts = &bf->bf_status.ds_txstat; in ath_tx_default_comp()
4292 st = -1; in ath_tx_default_comp()
4294 st = ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0) ? in ath_tx_default_comp()
4295 ts->ts_status : HAL_TXERR_XRETRY; in ath_tx_default_comp()
4298 if (bf->bf_state.bfs_dobaw) in ath_tx_default_comp()
4299 device_printf(sc->sc_dev, in ath_tx_default_comp()
4303 SEQNO(bf->bf_state.bfs_seqno)); in ath_tx_default_comp()
4305 if (bf->bf_next != NULL) in ath_tx_default_comp()
4306 device_printf(sc->sc_dev, in ath_tx_default_comp()
4310 SEQNO(bf->bf_state.bfs_seqno)); in ath_tx_default_comp()
4327 if (bf->bf_node) { in ath_tx_default_comp()
4329 ath_tx_update_tim(sc, bf->bf_node, 0); in ath_tx_default_comp()
4365 if ((ts->ts_status & HAL_TXERR_FILT) == 0) { in ath_tx_update_ratectrl()
4384 struct ieee80211_node *ni = bf->bf_node; in ath_tx_process_buf_completion()
4403 if (bf->bf_comp == NULL) { in ath_tx_process_buf_completion()
4404 if ((ts->ts_status & HAL_TXERR_FILT) == 0 && in ath_tx_process_buf_completion()
4405 (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0) { in ath_tx_process_buf_completion()
4414 bf->bf_state.bfs_rc, ts, in ath_tx_process_buf_completion()
4415 bf->bf_state.bfs_pktlen, in ath_tx_process_buf_completion()
4416 bf->bf_state.bfs_pktlen, in ath_tx_process_buf_completion()
4418 (ts->ts_status == 0 ? 0 : 1)); in ath_tx_process_buf_completion()
4422 bf->bf_comp(sc, bf, 0); in ath_tx_process_buf_completion()
4433 struct ath_hal *ah = sc->sc_ah; in ath_tx_processq()
4439 struct ieee80211com *ic = &sc->sc_ic; in ath_tx_processq()
4445 __func__, txq->axq_qnum, in ath_tx_processq()
4446 (caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, txq->axq_qnum), in ath_tx_processq()
4447 txq->axq_link); in ath_tx_processq()
4451 txq->axq_qnum, in ath_tx_processq()
4452 (caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, txq->axq_qnum), in ath_tx_processq()
4453 txq->axq_link, in ath_tx_processq()
4454 txq->axq_depth); in ath_tx_processq()
4459 txq->axq_intrcnt = 0; /* reset periodic desc intr count */ in ath_tx_processq()
4460 bf = TAILQ_FIRST(&txq->axq_q); in ath_tx_processq()
4465 ds = bf->bf_lastds; /* XXX must be setup correctly! */ in ath_tx_processq()
4466 ts = &bf->bf_status.ds_txstat; in ath_tx_processq()
4470 if (sc->sc_debug & ATH_DEBUG_XMIT_DESC) in ath_tx_processq()
4471 ath_printtxbuf(sc, bf, txq->axq_qnum, 0, in ath_tx_processq()
4473 else if ((sc->sc_debug & ATH_DEBUG_RESET) && (dosched == 0)) in ath_tx_processq()
4474 ath_printtxbuf(sc, bf, txq->axq_qnum, 0, in ath_tx_processq()
4478 if (if_ath_alq_checkdebug(&sc->sc_alq, in ath_tx_processq()
4480 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_EDMA_TXSTATUS, in ath_tx_processq()
4481 sc->sc_tx_statuslen, in ath_tx_processq()
4489 txq->axq_qnum, bf, ds); in ath_tx_processq()
4498 if (txq->axq_qnum != bf->bf_state.bfs_tx_queue) { in ath_tx_processq()
4499 device_printf(sc->sc_dev, in ath_tx_processq()
4502 txq->axq_qnum, in ath_tx_processq()
4504 bf->bf_state.bfs_tx_queue); in ath_tx_processq()
4506 if (txq->axq_qnum != bf->bf_last->bf_state.bfs_tx_queue) { in ath_tx_processq()
4507 device_printf(sc->sc_dev, in ath_tx_processq()
4510 txq->axq_qnum, in ath_tx_processq()
4511 bf->bf_last, in ath_tx_processq()
4512 bf->bf_last->bf_state.bfs_tx_queue); in ath_tx_processq()
4516 if (txq->axq_depth > 0) { in ath_tx_processq()
4519 * so it's not re-used while the hardware may in ath_tx_processq()
4520 * still re-read the link field in the descriptor. in ath_tx_processq()
4523 * is where the hardware may be - intermediate in ath_tx_processq()
4526 bf->bf_last->bf_flags |= ATH_BUF_BUSY; in ath_tx_processq()
4528 txq->axq_link = NULL; in ath_tx_processq()
4530 bf->bf_last->bf_flags |= ATH_BUF_BUSY; in ath_tx_processq()
4532 if (bf->bf_state.bfs_aggr) in ath_tx_processq()
4533 txq->axq_aggr_depth--; in ath_tx_processq()
4535 ni = bf->bf_node; in ath_tx_processq()
4539 txq->axq_qnum, bf, ds, ni, ts->ts_status); in ath_tx_processq()
4545 if (ni != NULL && ts->ts_status == 0 && in ath_tx_processq()
4546 ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) { in ath_tx_processq()
4548 sc->sc_stats.ast_tx_rssi = ts->ts_rssi; in ath_tx_processq()
4549 ATH_RSSI_LPF(sc->sc_halstats.ns_avgtxrssi, in ath_tx_processq()
4550 ts->ts_rssi); in ath_tx_processq()
4551 ATH_RSSI_LPF(ATH_NODE(ni)->an_node_stats.ns_avgtxrssi, in ath_tx_processq()
4552 ts->ts_rssi); in ath_tx_processq()
4565 * Flush fast-frame staging queue when traffic slows. in ath_tx_processq()
4567 if (txq->axq_depth <= 1) in ath_tx_processq()
4568 ieee80211_ff_flush(ic, txq->axq_ac); in ath_tx_processq()
4580 txq->axq_qnum); in ath_tx_processq()
4588 * Deferred processing of transmit interrupt; special-cased
4598 sc->sc_txproc_cnt++; in ath_tx_proc_q0()
4599 txqs = sc->sc_txq_active; in ath_tx_proc_q0()
4600 sc->sc_txq_active &= ~txqs; in ath_tx_proc_q0()
4610 if (TXQACTIVE(txqs, 0) && ath_tx_processq(sc, &sc->sc_txq[0], 1)) in ath_tx_proc_q0()
4612 sc->sc_lastrx = ath_hal_gettsf64(sc->sc_ah); in ath_tx_proc_q0()
4613 if (TXQACTIVE(txqs, sc->sc_cabq->axq_qnum)) in ath_tx_proc_q0()
4614 ath_tx_processq(sc, sc->sc_cabq, 1); in ath_tx_proc_q0()
4615 sc->sc_wd_timer = 0; in ath_tx_proc_q0()
4617 if (sc->sc_softled) in ath_tx_proc_q0()
4618 ath_led_event(sc, sc->sc_txrix); in ath_tx_proc_q0()
4621 sc->sc_txproc_cnt--; in ath_tx_proc_q0()
4632 * Deferred processing of transmit interrupt; special-cased
4633 * for four hardware queues, 0-3 (e.g. 5212 w/ WME support).
4643 sc->sc_txproc_cnt++; in ath_tx_proc_q0123()
4644 txqs = sc->sc_txq_active; in ath_tx_proc_q0123()
4645 sc->sc_txq_active &= ~txqs; in ath_tx_proc_q0123()
4660 nacked += ath_tx_processq(sc, &sc->sc_txq[0], 1); in ath_tx_proc_q0123()
4662 nacked += ath_tx_processq(sc, &sc->sc_txq[1], 1); in ath_tx_proc_q0123()
4664 nacked += ath_tx_processq(sc, &sc->sc_txq[2], 1); in ath_tx_proc_q0123()
4666 nacked += ath_tx_processq(sc, &sc->sc_txq[3], 1); in ath_tx_proc_q0123()
4667 if (TXQACTIVE(txqs, sc->sc_cabq->axq_qnum)) in ath_tx_proc_q0123()
4668 ath_tx_processq(sc, sc->sc_cabq, 1); in ath_tx_proc_q0123()
4670 sc->sc_lastrx = ath_hal_gettsf64(sc->sc_ah); in ath_tx_proc_q0123()
4672 sc->sc_wd_timer = 0; in ath_tx_proc_q0123()
4674 if (sc->sc_softled) in ath_tx_proc_q0123()
4675 ath_led_event(sc, sc->sc_txrix); in ath_tx_proc_q0123()
4678 sc->sc_txproc_cnt--; in ath_tx_proc_q0123()
4699 sc->sc_txproc_cnt++; in ath_tx_proc()
4700 txqs = sc->sc_txq_active; in ath_tx_proc()
4701 sc->sc_txq_active &= ~txqs; in ath_tx_proc()
4716 nacked += ath_tx_processq(sc, &sc->sc_txq[i], 1); in ath_tx_proc()
4718 sc->sc_lastrx = ath_hal_gettsf64(sc->sc_ah); in ath_tx_proc()
4720 sc->sc_wd_timer = 0; in ath_tx_proc()
4722 if (sc->sc_softled) in ath_tx_proc()
4723 ath_led_event(sc, sc->sc_txrix); in ath_tx_proc()
4726 sc->sc_txproc_cnt--; in ath_tx_proc()
4749 if (sc->sc_inreset_cnt > 0) { in ath_txq_sched_tasklet()
4750 device_printf(sc->sc_dev, in ath_txq_sched_tasklet()
4756 sc->sc_txproc_cnt++; in ath_txq_sched_tasklet()
4766 ath_txq_sched(sc, &sc->sc_txq[i]); in ath_txq_sched_tasklet()
4776 sc->sc_txproc_cnt--; in ath_txq_sched_tasklet()
4786 if (bf->bf_flags & ATH_BUF_MGMT) in ath_returnbuf_tail()
4787 TAILQ_INSERT_TAIL(&sc->sc_txbuf_mgmt, bf, bf_list); in ath_returnbuf_tail()
4789 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); in ath_returnbuf_tail()
4790 sc->sc_txbuf_cnt++; in ath_returnbuf_tail()
4791 if (sc->sc_txbuf_cnt > ath_txbuf) { in ath_returnbuf_tail()
4792 device_printf(sc->sc_dev, in ath_returnbuf_tail()
4796 sc->sc_txbuf_cnt = ath_txbuf; in ath_returnbuf_tail()
4807 if (bf->bf_flags & ATH_BUF_MGMT) in ath_returnbuf_head()
4808 TAILQ_INSERT_HEAD(&sc->sc_txbuf_mgmt, bf, bf_list); in ath_returnbuf_head()
4810 TAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list); in ath_returnbuf_head()
4811 sc->sc_txbuf_cnt++; in ath_returnbuf_head()
4812 if (sc->sc_txbuf_cnt > ATH_TXBUF) { in ath_returnbuf_head()
4813 device_printf(sc->sc_dev, in ath_returnbuf_head()
4817 sc->sc_txbuf_cnt = ATH_TXBUF; in ath_returnbuf_head()
4831 if (txq->axq_holdingbf == NULL) in ath_txq_freeholdingbuf()
4834 txq->axq_holdingbf->bf_flags &= ~ATH_BUF_BUSY; in ath_txq_freeholdingbuf()
4837 ath_returnbuf_tail(sc, txq->axq_holdingbf); in ath_txq_freeholdingbuf()
4840 txq->axq_holdingbf = NULL; in ath_txq_freeholdingbuf()
4852 txq = &sc->sc_txq[bf->bf_state.bfs_tx_queue]; in ath_txq_addholdingbuf()
4860 if (bf->bf_state.bfs_tx_queue > HAL_NUM_TX_QUEUES) { in ath_txq_addholdingbuf()
4861 device_printf(sc->sc_dev, "%s: bf=%p: invalid tx queue (%d)\n", in ath_txq_addholdingbuf()
4864 bf->bf_state.bfs_tx_queue); in ath_txq_addholdingbuf()
4865 bf->bf_flags &= ~ATH_BUF_BUSY; in ath_txq_addholdingbuf()
4870 txq->axq_holdingbf = bf; in ath_txq_addholdingbuf()
4895 txq = &sc->sc_txq[bf->bf_state.bfs_tx_queue]; in ath_freebuf()
4897 KASSERT((bf->bf_node == NULL), ("%s: bf->bf_node != NULL\n", __func__)); in ath_freebuf()
4898 KASSERT((bf->bf_m == NULL), ("%s: bf->bf_m != NULL\n", __func__)); in ath_freebuf()
4903 if (bf->bf_flags & ATH_BUF_BUSY) { in ath_freebuf()
4927 struct ieee80211_node *ni = bf->bf_node; in ath_tx_freebuf()
4928 struct mbuf *m0 = bf->bf_m; in ath_tx_freebuf()
4935 if (bf->bf_m != NULL) { in ath_tx_freebuf()
4936 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, in ath_tx_freebuf()
4938 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); in ath_tx_freebuf()
4941 bf->bf_node = NULL; in ath_tx_freebuf()
4942 bf->bf_m = NULL; in ath_tx_freebuf()
4947 /* Pass the buffer back to net80211 - completing it */ in ath_tx_freebuf()
4962 bf = TAILQ_FIRST(&txq->fifo.axq_q); in ath_tx_draintxq_get_one()
4968 if (bf->bf_flags & ATH_BUF_FIFOEND) { in ath_tx_draintxq_get_one()
4969 if (txq->axq_fifo_depth == 0) { in ath_tx_draintxq_get_one()
4970 device_printf(sc->sc_dev, in ath_tx_draintxq_get_one()
4973 txq->axq_qnum, in ath_tx_draintxq_get_one()
4974 txq->fifo.axq_depth); in ath_tx_draintxq_get_one()
4976 txq->axq_fifo_depth--; in ath_tx_draintxq_get_one()
4978 ATH_TXQ_REMOVE(&txq->fifo, bf, bf_list); in ath_tx_draintxq_get_one()
4985 if (txq->axq_fifo_depth != 0 || txq->fifo.axq_depth != 0) { in ath_tx_draintxq_get_one()
4986 device_printf(sc->sc_dev, in ath_tx_draintxq_get_one()
4989 txq->axq_qnum, in ath_tx_draintxq_get_one()
4990 txq->axq_fifo_depth, in ath_tx_draintxq_get_one()
4991 txq->fifo.axq_depth); in ath_tx_draintxq_get_one()
4997 bf = TAILQ_FIRST(&txq->axq_q); in ath_tx_draintxq_get_one()
4999 txq->axq_link = NULL; in ath_tx_draintxq_get_one()
5010 struct ath_hal *ah = sc->sc_ah; in ath_tx_draintxq()
5026 if (bf->bf_state.bfs_aggr) in ath_tx_draintxq()
5027 txq->axq_aggr_depth--; in ath_tx_draintxq()
5029 if (sc->sc_debug & ATH_DEBUG_RESET) { in ath_tx_draintxq()
5030 struct ieee80211com *ic = &sc->sc_ic; in ath_tx_draintxq()
5039 if (! sc->sc_isedma) { in ath_tx_draintxq()
5041 bf->bf_lastds, in ath_tx_draintxq()
5042 &bf->bf_status.ds_txstat) == HAL_OK); in ath_tx_draintxq()
5044 ath_printtxbuf(sc, bf, txq->axq_qnum, ix, status); in ath_tx_draintxq()
5045 ieee80211_dump_pkt(ic, mtod(bf->bf_m, const uint8_t *), in ath_tx_draintxq()
5046 bf->bf_m->m_len, 0, -1); in ath_tx_draintxq()
5051 * functions, we -must- call it for aggregation in ath_tx_draintxq()
5059 bf->bf_flags &= ~ATH_BUF_BUSY; in ath_tx_draintxq()
5060 if (bf->bf_comp) in ath_tx_draintxq()
5061 bf->bf_comp(sc, bf, 1); in ath_tx_draintxq()
5083 struct ath_hal *ah = sc->sc_ah; in ath_tx_stopdma()
5091 txq->axq_qnum, in ath_tx_stopdma()
5092 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, txq->axq_qnum), in ath_tx_stopdma()
5093 (int) (!! ath_hal_txqenabled(ah, txq->axq_qnum)), in ath_tx_stopdma()
5094 (int) ath_hal_numtxpending(ah, txq->axq_qnum), in ath_tx_stopdma()
5095 txq->axq_flags, in ath_tx_stopdma()
5096 txq->axq_link, in ath_tx_stopdma()
5097 txq->axq_holdingbf); in ath_tx_stopdma()
5099 (void) ath_hal_stoptxdma(ah, txq->axq_qnum); in ath_tx_stopdma()
5101 txq->axq_flags &= ~ATH_TXQ_PUTRUNNING; in ath_tx_stopdma()
5104 if ((sc->sc_debug & ATH_DEBUG_RESET) in ath_tx_stopdma()
5105 && (txq->axq_holdingbf != NULL)) { in ath_tx_stopdma()
5106 ath_printtxbuf(sc, txq->axq_holdingbf, txq->axq_qnum, 0, 0); in ath_tx_stopdma()
5114 struct ath_hal *ah = sc->sc_ah; in ath_stoptxdma()
5118 if (sc->sc_invalid) in ath_stoptxdma()
5121 if (!sc->sc_invalid) { in ath_stoptxdma()
5124 __func__, sc->sc_bhalq, in ath_stoptxdma()
5125 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq), in ath_stoptxdma()
5129 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq); in ath_stoptxdma()
5134 ATH_TXQ_LOCK(&sc->sc_txq[i]); in ath_stoptxdma()
5135 ath_tx_stopdma(sc, &sc->sc_txq[i]); in ath_stoptxdma()
5136 ATH_TXQ_UNLOCK(&sc->sc_txq[i]); in ath_stoptxdma()
5148 struct ath_hal *ah = sc->sc_ah; in ath_tx_dump()
5152 if (! (sc->sc_debug & ATH_DEBUG_RESET)) in ath_tx_dump()
5155 device_printf(sc->sc_dev, "%s: Q%d: begin\n", in ath_tx_dump()
5156 __func__, txq->axq_qnum); in ath_tx_dump()
5157 TAILQ_FOREACH(bf, &txq->axq_q, bf_list) { in ath_tx_dump()
5158 ath_printtxbuf(sc, bf, txq->axq_qnum, i, in ath_tx_dump()
5159 ath_hal_txprocdesc(ah, bf->bf_lastds, in ath_tx_dump()
5160 &bf->bf_status.ds_txstat) == HAL_OK); in ath_tx_dump()
5163 device_printf(sc->sc_dev, "%s: Q%d: end\n", in ath_tx_dump()
5164 __func__, txq->axq_qnum); in ath_tx_dump()
5174 struct ath_hal *ah = sc->sc_ah; in ath_legacy_tx_drain()
5190 if (sc->sc_debug & ATH_DEBUG_RESET) in ath_legacy_tx_drain()
5191 ath_tx_dump(sc, &sc->sc_txq[i]); in ath_legacy_tx_drain()
5194 ath_tx_processq(sc, &sc->sc_txq[i], 0); in ath_legacy_tx_drain()
5195 ATH_TXQ_LOCK(&sc->sc_txq[i]); in ath_legacy_tx_drain()
5200 ath_txq_freeholdingbuf(sc, &sc->sc_txq[i]); in ath_legacy_tx_drain()
5207 bf_last = ATH_TXQ_LAST(&sc->sc_txq[i], in ath_legacy_tx_drain()
5211 bf_last->bf_lastds, in ath_legacy_tx_drain()
5212 &sc->sc_txq[i].axq_link); in ath_legacy_tx_drain()
5214 sc->sc_txq[i].axq_link = NULL; in ath_legacy_tx_drain()
5216 ATH_TXQ_UNLOCK(&sc->sc_txq[i]); in ath_legacy_tx_drain()
5218 ath_tx_draintxq(sc, &sc->sc_txq[i]); in ath_legacy_tx_drain()
5222 if (sc->sc_debug & ATH_DEBUG_RESET) { in ath_legacy_tx_drain()
5223 struct ath_buf *bf = TAILQ_FIRST(&sc->sc_bbuf); in ath_legacy_tx_drain()
5224 if (bf != NULL && bf->bf_m != NULL) { in ath_legacy_tx_drain()
5225 ath_printtxbuf(sc, bf, sc->sc_bhalq, 0, in ath_legacy_tx_drain()
5226 ath_hal_txprocdesc(ah, bf->bf_lastds, in ath_legacy_tx_drain()
5227 &bf->bf_status.ds_txstat) == HAL_OK); in ath_legacy_tx_drain()
5228 ieee80211_dump_pkt(&sc->sc_ic, in ath_legacy_tx_drain()
5229 mtod(bf->bf_m, const uint8_t *), bf->bf_m->m_len, in ath_legacy_tx_drain()
5230 0, -1); in ath_legacy_tx_drain()
5234 sc->sc_wd_timer = 0; in ath_legacy_tx_drain()
5250 if (mode != sc->sc_curmode) in ath_chan_change()
5252 sc->sc_curchan = chan; in ath_chan_change()
5264 struct ieee80211com *ic = &sc->sc_ic; in ath_chan_set()
5265 struct ath_hal *ah = sc->sc_ah; in ath_chan_set()
5273 taskqueue_block(sc->sc_tq); in ath_chan_set()
5282 device_printf(sc->sc_dev, "%s: concurrent reset! Danger!\n", in ath_chan_set()
5293 chan->ic_freq, chan->ic_flags); in ath_chan_set()
5294 if (chan != sc->sc_curchan) { in ath_chan_set()
5299 * hardware at the new frequency, and then re-enable in ath_chan_set()
5312 * Next, flush the non-scheduled frames. in ath_chan_set()
5317 ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask, in ath_chan_set()
5318 sc->sc_cur_rxchainmask); in ath_chan_set()
5319 if (!ath_hal_reset(ah, sc->sc_opmode, chan, AH_TRUE, in ath_chan_set()
5321 device_printf(sc->sc_dev, "%s: unable to reset " in ath_chan_set()
5324 chan->ic_freq, chan->ic_flags, status); in ath_chan_set()
5328 sc->sc_diversity = ath_hal_getdiversity(ah); in ath_chan_set()
5331 sc->sc_rx_stopped = 1; in ath_chan_set()
5332 sc->sc_rx_resetted = 1; in ath_chan_set()
5335 /* Quiet time handling - ensure we resync */ in ath_chan_set()
5348 ath_btcoex_enable(sc, ic->ic_curchan); in ath_chan_set()
5354 if (sc->sc_hasenforcetxop && sc->sc_tdma) in ath_chan_set()
5355 ath_hal_setenforcetxop(sc->sc_ah, 1); in ath_chan_set()
5357 ath_hal_setenforcetxop(sc->sc_ah, 0); in ath_chan_set()
5360 * Re-enable rx framework. in ath_chan_set()
5363 device_printf(sc->sc_dev, in ath_chan_set()
5379 if (sc->sc_beacons) { /* restart beacons */ in ath_chan_set()
5381 if (sc->sc_tdma) in ath_chan_set()
5389 * Re-enable interrupts. in ath_chan_set()
5392 ath_hal_intrset(ah, sc->sc_imask); in ath_chan_set()
5398 sc->sc_inreset_cnt--; in ath_chan_set()
5400 ath_hal_intrset(ah, sc->sc_imask); in ath_chan_set()
5417 struct ath_hal *ah = sc->sc_ah; in ath_calibrate()
5418 struct ieee80211com *ic = &sc->sc_ic; in ath_calibrate()
5431 if (sc->sc_inreset_cnt) in ath_calibrate()
5434 if (ic->ic_flags & IEEE80211_F_SCAN) /* defer, off channel */ in ath_calibrate()
5436 longCal = (ticks - sc->sc_lastlongcal >= ath_longcalinterval*hz); in ath_calibrate()
5437 aniCal = (ticks - sc->sc_lastani >= ath_anicalinterval*hz/1000); in ath_calibrate()
5438 if (sc->sc_doresetcal) in ath_calibrate()
5439 shortCal = (ticks - sc->sc_lastshortcal >= ath_shortcalinterval*hz/1000); in ath_calibrate()
5443 sc->sc_stats.ast_ani_cal++; in ath_calibrate()
5444 sc->sc_lastani = ticks; in ath_calibrate()
5445 ath_hal_ani_poll(ah, sc->sc_curchan); in ath_calibrate()
5449 sc->sc_stats.ast_per_cal++; in ath_calibrate()
5450 sc->sc_lastlongcal = ticks; in ath_calibrate()
5458 sc->sc_stats.ast_per_rfgain++; in ath_calibrate()
5459 sc->sc_resetcal = 0; in ath_calibrate()
5460 sc->sc_doresetcal = AH_TRUE; in ath_calibrate()
5461 taskqueue_enqueue(sc->sc_tq, &sc->sc_resettask); in ath_calibrate()
5462 callout_reset(&sc->sc_cal_ch, 1, ath_calibrate, sc); in ath_calibrate()
5470 if (sc->sc_resetcal) { in ath_calibrate()
5471 (void) ath_hal_calreset(ah, sc->sc_curchan); in ath_calibrate()
5472 sc->sc_lastcalreset = ticks; in ath_calibrate()
5473 sc->sc_lastshortcal = ticks; in ath_calibrate()
5474 sc->sc_resetcal = 0; in ath_calibrate()
5475 sc->sc_doresetcal = AH_TRUE; in ath_calibrate()
5482 if (ath_hal_calibrateN(ah, sc->sc_curchan, longCal, &isCalDone)) { in ath_calibrate()
5492 __func__, sc->sc_curchan->ic_freq); in ath_calibrate()
5493 sc->sc_stats.ast_per_calfail++; in ath_calibrate()
5498 * un-freeze the PHY. in ath_calibrate()
5502 * failed the first NF cal - that /can/ fail sometimes in in ath_calibrate()
5510 sc->sc_lastshortcal = ticks; in ath_calibrate()
5522 sc->sc_lastshortcal = ticks; in ath_calibrate()
5524 if (sc->sc_opmode != HAL_M_HOSTAP) in ath_calibrate()
5526 sc->sc_doresetcal = AH_TRUE; in ath_calibrate()
5530 if (sc->sc_lastcalreset == 0) in ath_calibrate()
5531 sc->sc_lastcalreset = sc->sc_lastlongcal; in ath_calibrate()
5532 else if (ticks - sc->sc_lastcalreset >= ath_resetcalinterval*hz) in ath_calibrate()
5533 sc->sc_resetcal = 1; /* setup reset next trip */ in ath_calibrate()
5534 sc->sc_doresetcal = AH_FALSE; in ath_calibrate()
5543 callout_reset(&sc->sc_cal_ch, nextcal, ath_calibrate, sc); in ath_calibrate()
5558 struct ath_softc *sc = ic->ic_softc; in ath_scan_start()
5559 struct ath_hal *ah = sc->sc_ah; in ath_scan_start()
5566 sc->sc_scanning = 1; in ath_scan_start()
5567 sc->sc_syncbeacon = 0; in ath_scan_start()
5583 struct ath_softc *sc = ic->ic_softc; in ath_scan_end()
5584 struct ath_hal *ah = sc->sc_ah; in ath_scan_end()
5588 sc->sc_scanning = 0; in ath_scan_end()
5594 ath_hal_setassocid(ah, sc->sc_curbssid, sc->sc_curaid); in ath_scan_end()
5600 __func__, rfilt, ether_sprintf(sc->sc_curbssid), in ath_scan_end()
5601 sc->sc_curaid); in ath_scan_end()
5623 struct ath_softc *sc = ic->ic_softc; in ath_update_chw()
5626 device_printf(sc->sc_dev, "%s: called\n", __func__); in ath_update_chw()
5631 * as if we TX filtered them (whch may mean dropping non-ampdu frames!) in ath_update_chw()
5647 * The quiet IE doesn't control the /now/ beacon interval - it
5656 * each TBTT - so if we just program it in upon each beacon received,
5673 struct ieee80211vap *vap = ni->ni_vap; in ath_set_quiet_ie()
5675 struct ieee80211com *ic = vap->iv_ic; in ath_set_quiet_ie()
5676 struct ath_softc *sc = ic->ic_softc; in ath_set_quiet_ie()
5678 if (vap->iv_opmode != IEEE80211_M_STA) in ath_set_quiet_ie()
5686 ath_hal_set_quiet(sc->sc_ah, 0, 0, 0, HAL_QUIET_DISABLE); in ath_set_quiet_ie()
5687 memset(&avp->quiet_ie, 0, sizeof(avp->quiet_ie)); in ath_set_quiet_ie()
5704 if ((q->period == avp->quiet_ie.period) && in ath_set_quiet_ie()
5705 (le16dec(&q->duration) == le16dec(&avp->quiet_ie.duration)) && in ath_set_quiet_ie()
5706 (le16dec(&q->offset) == le16dec(&avp->quiet_ie.offset))) in ath_set_quiet_ie()
5712 (int) q->tbttcount, in ath_set_quiet_ie()
5713 (int) q->period, in ath_set_quiet_ie()
5714 (int) le16dec(&q->duration), in ath_set_quiet_ie()
5715 (int) le16dec(&q->offset)); in ath_set_quiet_ie()
5720 if ((le16dec(&q->duration) == 0) || in ath_set_quiet_ie()
5721 (le16dec(&q->duration) >= ni->ni_intval)) { in ath_set_quiet_ie()
5724 le16dec(&q->duration)); in ath_set_quiet_ie()
5728 * Can have a 0 offset, but not a duration - so just check in ath_set_quiet_ie()
5731 if (le16dec(&q->duration) + le16dec(&q->offset) >= ni->ni_intval) { in ath_set_quiet_ie()
5734 le16dec(&q->duration), in ath_set_quiet_ie()
5735 le16dec(&q->offset)); in ath_set_quiet_ie()
5738 if (q->tbttcount == 0) { in ath_set_quiet_ie()
5743 if (q->period == 0) { in ath_set_quiet_ie()
5753 if (q->tbttcount == 1) { in ath_set_quiet_ie()
5756 ath_hal_set_quiet(sc->sc_ah, in ath_set_quiet_ie()
5757 q->period * ni->ni_intval, /* convert to TU */ in ath_set_quiet_ie()
5758 le16dec(&q->duration), /* already in TU */ in ath_set_quiet_ie()
5759 le16dec(&q->offset) + ni->ni_intval, in ath_set_quiet_ie()
5767 memcpy(&avp->quiet_ie, ie, sizeof(struct ieee80211_quiet_ie)); in ath_set_quiet_ie()
5776 struct ath_softc *sc = ic->ic_softc; in ath_set_channel()
5782 (void) ath_chan_set(sc, ic->ic_curchan); in ath_set_channel()
5790 if (!sc->sc_scanning && ic->ic_curchan == ic->ic_bsschan) in ath_set_channel()
5791 sc->sc_syncbeacon = 1; in ath_set_channel()
5802 struct ieee80211com *ic = this->iv_ic; in ath_isanyrunningvaps()
5807 TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { in ath_isanyrunningvaps()
5808 if (vap != this && vap->iv_state >= IEEE80211_S_RUN) in ath_isanyrunningvaps()
5817 struct ieee80211com *ic = vap->iv_ic; in ath_newstate()
5818 struct ath_softc *sc = ic->ic_softc; in ath_newstate()
5820 struct ath_hal *ah = sc->sc_ah; in ath_newstate()
5825 enum ieee80211_state ostate = vap->iv_state; in ath_newstate()
5838 DPRINTF(sc, ATH_DEBUG_STATE, "%s: %s -> %s\n", __func__, in ath_newstate()
5844 * There are some comments around the calls to vap->iv_newstate in ath_newstate()
5851 /* Before we touch the hardware - wake it up */ in ath_newstate()
5855 * we need to ensure that self-generated frames are in ath_newstate()
5859 * XXX TODO: is this actually the case? :-) in ath_newstate()
5873 callout_stop(&sc->sc_cal_ch); in ath_newstate()
5896 sc->sc_imask &~ (HAL_INT_SWBA | HAL_INT_BMISS)); in ath_newstate()
5897 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); in ath_newstate()
5898 sc->sc_beacons = 0; in ath_newstate()
5899 taskqueue_unblock(sc->sc_tq); in ath_newstate()
5902 ni = ieee80211_ref_node(vap->iv_bss); in ath_newstate()
5904 stamode = (vap->iv_opmode == IEEE80211_M_STA || in ath_newstate()
5905 vap->iv_opmode == IEEE80211_M_AHDEMO || in ath_newstate()
5906 vap->iv_opmode == IEEE80211_M_IBSS); in ath_newstate()
5910 * from SLEEP->RUN. in ath_newstate()
5913 sc->sc_curaid = ni->ni_associd; in ath_newstate()
5914 IEEE80211_ADDR_COPY(sc->sc_curbssid, ni->ni_bssid); in ath_newstate()
5915 ath_hal_setassocid(ah, sc->sc_curbssid, sc->sc_curaid); in ath_newstate()
5918 __func__, rfilt, ether_sprintf(sc->sc_curbssid), sc->sc_curaid); in ath_newstate()
5922 if (vap->iv_opmode != IEEE80211_M_STA && in ath_newstate()
5923 (vap->iv_flags & IEEE80211_F_PRIVACY)) { in ath_newstate()
5926 ath_hal_keysetmac(ah, i, ni->ni_bssid); in ath_newstate()
5932 error = avp->av_newstate(vap, nstate, arg); in ath_newstate()
5949 * not allow any ACKs or self-generated frames until we hear in ath_newstate()
5960 * transmitting - and then inform the driver about this in ath_newstate()
5974 * not allow any ACKs or self-generated frames until we hear in ath_newstate()
5985 * transmitting - and then inform the driver about this in ath_newstate()
5995 ni = ieee80211_ref_node(vap->iv_bss); in ath_newstate()
6000 vap->iv_flags, ni->ni_intval, ether_sprintf(ni->ni_bssid), in ath_newstate()
6001 ni->ni_capinfo, ieee80211_chan2ieee(ic, ic->ic_curchan)); in ath_newstate()
6003 switch (vap->iv_opmode) { in ath_newstate()
6006 if ((vap->iv_caps & IEEE80211_C_TDMA) == 0) in ath_newstate()
6025 * necessary, for example, when an ibss merge in ath_newstate()
6027 * transition from RUN->RUN that means we may in ath_newstate()
6030 ath_hal_stoptxdma(ah, sc->sc_bhalq); in ath_newstate()
6043 if (vap->iv_opmode == IEEE80211_M_IBSS && in ath_newstate()
6044 ni->ni_tstamp.tsf != 0) { in ath_newstate()
6045 sc->sc_syncbeacon = 1; in ath_newstate()
6046 } else if (!sc->sc_beacons) { in ath_newstate()
6048 if (vap->iv_caps & IEEE80211_C_TDMA) in ath_newstate()
6053 sc->sc_beacons = 1; in ath_newstate()
6061 * However if it's due to a CSA -> RUN transition, in ath_newstate()
6079 if ((vap->iv_flags_ext & IEEE80211_FEXT_SWBMISS) == 0) { in ath_newstate()
6082 sc->sc_syncbeacon = 1; in ath_newstate()
6087 /* Quiet time handling - ensure we resync */ in ath_newstate()
6088 memset(&avp->quiet_ie, 0, sizeof(avp->quiet_ie)); in ath_newstate()
6102 if ((vap->iv_flags_ext & IEEE80211_FEXT_SWBMISS) == 0) { in ath_newstate()
6103 sc->sc_beacons = 1; in ath_newstate()
6109 * Monitor mode vaps have only INIT->RUN and RUN->RUN in ath_newstate()
6110 * transitions so we must re-enable interrupts here to in ath_newstate()
6113 ath_hal_intrset(ah, sc->sc_imask); in ath_newstate()
6128 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER; in ath_newstate()
6129 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER; in ath_newstate()
6130 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER; in ath_newstate()
6145 callout_reset(&sc->sc_cal_ch, 1, ath_calibrate, sc); in ath_newstate()
6152 taskqueue_unblock(sc->sc_tq); in ath_newstate()
6154 /* Quiet time handling - ensure we resync */ in ath_newstate()
6155 memset(&avp->quiet_ie, 0, sizeof(avp->quiet_ie)); in ath_newstate()
6165 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); in ath_newstate()
6167 ath_hal_intrset(ah, sc->sc_imask &~ HAL_INT_GLOBAL); in ath_newstate()
6168 taskqueue_block(sc->sc_tq); in ath_newstate()
6169 sc->sc_beacons = 0; in ath_newstate()
6188 if (sc->sc_nvaps == 1 && in ath_newstate()
6189 vap->iv_opmode == IEEE80211_M_STA) { in ath_newstate()
6190 DPRINTF(sc, ATH_DEBUG_BEACON, "%s: syncbeacon=%d\n", __func__, sc->sc_syncbeacon); in ath_newstate()
6193 * Always at least set the self-generated in ath_newstate()
6206 if (sc->sc_syncbeacon == 0) { in ath_newstate()
6213 * Note - the ANI/calibration timer isn't re-enabled during in ath_newstate()
6214 * network sleep for now. One unfortunate side-effect is that in ath_newstate()
6223 /* Quiet time handling - ensure we resync */ in ath_newstate()
6224 memset(&avp->quiet_ie, 0, sizeof(avp->quiet_ie)); in ath_newstate()
6238 callout_reset(&sc->sc_cal_ch, 1, ath_calibrate, sc); in ath_newstate()
6249 * Restore the power state - either to what it was, or in ath_newstate()
6269 struct ieee80211vap *vap = ni->ni_vap; in ath_setup_stationkey()
6270 struct ath_softc *sc = vap->iv_ic->ic_softc; in ath_setup_stationkey()
6273 /* XXX should take a locked ref to vap->iv_bss */ in ath_setup_stationkey()
6274 if (!ath_key_alloc(vap, &ni->ni_ucastkey, &keyix, &rxkeyix)) { in ath_setup_stationkey()
6283 ni->ni_ucastkey.wk_keyix = keyix; in ath_setup_stationkey()
6284 ni->ni_ucastkey.wk_rxkeyix = rxkeyix; in ath_setup_stationkey()
6286 ni->ni_ucastkey.wk_flags |= IEEE80211_KEY_DEVKEY; in ath_setup_stationkey()
6287 IEEE80211_ADDR_COPY(ni->ni_ucastkey.wk_macaddr, ni->ni_macaddr); in ath_setup_stationkey()
6288 /* NB: this will create a pass-thru key entry */ in ath_setup_stationkey()
6289 ath_keyset(sc, vap, &ni->ni_ucastkey, vap->iv_bss); in ath_setup_stationkey()
6294 * Setup driver-specific state for a newly associated node.
6295 * Note that we're called also on a re-associate, the isnew
6302 struct ieee80211vap *vap = ni->ni_vap; in ath_newassoc()
6303 struct ath_softc *sc = vap->iv_ic->ic_softc; in ath_newassoc()
6304 const struct ieee80211_txparam *tp = ni->ni_txparms; in ath_newassoc()
6306 an->an_mcastrix = ath_tx_findrix(sc, tp->mcastrate); in ath_newassoc()
6307 an->an_mgmtrix = ath_tx_findrix(sc, tp->mgmtrate); in ath_newassoc()
6311 ni->ni_macaddr, in ath_newassoc()
6314 an->an_is_powersave); in ath_newassoc()
6321 (vap->iv_flags & IEEE80211_F_PRIVACY) == 0 && sc->sc_hasclrkey && in ath_newassoc()
6322 ni->ni_ucastkey.wk_keyix == IEEE80211_KEYIX_NONE) in ath_newassoc()
6332 * marked as non-aggregate. in ath_newassoc()
6338 ni->ni_macaddr, in ath_newassoc()
6340 an->an_is_powersave); in ath_newassoc()
6346 if (an->an_is_powersave) in ath_newassoc()
6355 struct ath_softc *sc = ic->ic_softc; in ath_setregdomain()
6356 struct ath_hal *ah = sc->sc_ah; in ath_setregdomain()
6361 __func__, reg->regdomain, reg->country, reg->location, in ath_setregdomain()
6362 reg->ecm ? " ecm" : ""); in ath_setregdomain()
6365 reg->country, reg->regdomain); in ath_setregdomain()
6379 struct ath_softc *sc = ic->ic_softc; in ath_getradiocaps()
6380 struct ath_hal *ah = sc->sc_ah; in ath_getradiocaps()
6394 struct ieee80211com *ic = &sc->sc_ic; in ath_getchannels()
6395 struct ath_hal *ah = sc->sc_ah; in ath_getchannels()
6399 * Collect channel set based on EEPROM contents. in ath_getchannels()
6401 status = ath_hal_init_channels(ah, ic->ic_channels, IEEE80211_CHAN_MAX, in ath_getchannels()
6402 &ic->ic_nchans, HAL_MODE_ALL, CTRY_DEFAULT, SKU_NONE, AH_TRUE); in ath_getchannels()
6404 device_printf(sc->sc_dev, in ath_getchannels()
6409 (void) ath_hal_getregdomain(ah, &sc->sc_eerd); in ath_getchannels()
6410 ath_hal_getcountrycode(ah, &sc->sc_eecc); /* NB: cannot fail */ in ath_getchannels()
6413 ic->ic_regdomain.regdomain = (uint16_t) sc->sc_eerd; in ath_getchannels()
6414 ic->ic_regdomain.country = (uint16_t) sc->sc_eecc; in ath_getchannels()
6415 ic->ic_regdomain.isocc[0] = ' '; /* XXX don't know */ in ath_getchannels()
6416 ic->ic_regdomain.isocc[1] = ' '; in ath_getchannels()
6418 ic->ic_regdomain.ecm = 1; in ath_getchannels()
6419 ic->ic_regdomain.location = 'I'; in ath_getchannels()
6422 "%s: eeprom rd %u cc %u (mapped rd %u cc %u) location %c%s\n", in ath_getchannels()
6423 __func__, sc->sc_eerd, sc->sc_eecc, in ath_getchannels()
6424 ic->ic_regdomain.regdomain, ic->ic_regdomain.country, in ath_getchannels()
6425 ic->ic_regdomain.location, ic->ic_regdomain.ecm ? " ecm" : ""); in ath_getchannels()
6432 struct ath_hal *ah = sc->sc_ah; in ath_rate_setup()
6471 sc->sc_rates[mode] = rt; in ath_rate_setup()
6503 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap)); in ath_setcurmode()
6504 rt = sc->sc_rates[mode]; in ath_setcurmode()
6506 for (i = 0; i < rt->rateCount; i++) { in ath_setcurmode()
6507 uint8_t ieeerate = rt->info[i].dot11Rate & IEEE80211_RATE_VAL; in ath_setcurmode()
6508 if (rt->info[i].phy != IEEE80211_T_HT) in ath_setcurmode()
6509 sc->sc_rixmap[ieeerate] = i; in ath_setcurmode()
6511 sc->sc_rixmap[ieeerate | IEEE80211_RATE_MCS] = i; in ath_setcurmode()
6513 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap)); in ath_setcurmode()
6514 for (i = 0; i < nitems(sc->sc_hwmap); i++) { in ath_setcurmode()
6515 if (i >= rt->rateCount) { in ath_setcurmode()
6516 sc->sc_hwmap[i].ledon = (500 * hz) / 1000; in ath_setcurmode()
6517 sc->sc_hwmap[i].ledoff = (130 * hz) / 1000; in ath_setcurmode()
6520 sc->sc_hwmap[i].ieeerate = in ath_setcurmode()
6521 rt->info[i].dot11Rate & IEEE80211_RATE_VAL; in ath_setcurmode()
6522 if (rt->info[i].phy == IEEE80211_T_HT) in ath_setcurmode()
6523 sc->sc_hwmap[i].ieeerate |= IEEE80211_RATE_MCS; in ath_setcurmode()
6524 sc->sc_hwmap[i].txflags = IEEE80211_RADIOTAP_F_DATAPAD; in ath_setcurmode()
6525 if (rt->info[i].shortPreamble || in ath_setcurmode()
6526 rt->info[i].phy == IEEE80211_T_OFDM) in ath_setcurmode()
6527 sc->sc_hwmap[i].txflags |= IEEE80211_RADIOTAP_F_SHORTPRE; in ath_setcurmode()
6528 sc->sc_hwmap[i].rxflags = sc->sc_hwmap[i].txflags; in ath_setcurmode()
6529 for (j = 0; j < nitems(blinkrates)-1; j++) in ath_setcurmode()
6530 if (blinkrates[j].rate == sc->sc_hwmap[i].ieeerate) in ath_setcurmode()
6534 sc->sc_hwmap[i].ledon = (blinkrates[j].timeOn * hz) / 1000; in ath_setcurmode()
6535 sc->sc_hwmap[i].ledoff = (blinkrates[j].timeOff * hz) / 1000; in ath_setcurmode()
6537 sc->sc_currates = rt; in ath_setcurmode()
6538 sc->sc_curmode = mode; in ath_setcurmode()
6544 sc->sc_protrix = ath_tx_findrix(sc, 2*2); in ath_setcurmode()
6546 sc->sc_protrix = ath_tx_findrix(sc, 2*1); in ath_setcurmode()
6554 struct ieee80211com *ic = &sc->sc_ic; in ath_watchdog()
6559 if (sc->sc_wd_timer != 0 && --sc->sc_wd_timer == 0) { in ath_watchdog()
6564 if (ath_hal_gethangstate(sc->sc_ah, 0xffff, &hangs) && in ath_watchdog()
6566 device_printf(sc->sc_dev, "%s hang detected (0x%x)\n", in ath_watchdog()
6569 device_printf(sc->sc_dev, "device timeout\n"); in ath_watchdog()
6571 counter_u64_add(ic->ic_oerrors, 1); in ath_watchdog()
6572 sc->sc_stats.ast_watchdog++; in ath_watchdog()
6584 taskqueue_enqueue(sc->sc_tq, &sc->sc_resettask); in ath_watchdog()
6587 callout_schedule(&sc->sc_wd_ch, hz); in ath_watchdog()
6593 struct ath_softc *sc = ic->ic_softc; in ath_parent()
6597 if (ic->ic_nrunning > 0) { in ath_parent()
6603 if (sc->sc_running) { in ath_parent()
6607 } else if (!sc->sc_invalid) { in ath_parent()
6612 * However trying to re-init the interface in ath_parent()
6621 if (!sc->sc_invalid) in ath_parent()
6628 if (sc->sc_tx99 != NULL) in ath_parent()
6629 sc->sc_tx99->start(sc->sc_tx99); in ath_parent()
6642 struct ath_hal *ah = sc->sc_ah; in ath_announce()
6644 device_printf(sc->sc_dev, "%s mac %d.%d RF%s phy %d.%d\n", in ath_announce()
6645 ath_hal_mac_name(ah), ah->ah_macVersion, ah->ah_macRev, in ath_announce()
6646 ath_hal_rf_name(ah), ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf); in ath_announce()
6647 device_printf(sc->sc_dev, "2GHz radio: 0x%.4x; 5GHz radio: 0x%.4x\n", in ath_announce()
6648 ah->ah_analog2GhzRev, ah->ah_analog5GhzRev); in ath_announce()
6652 struct ath_txq *txq = sc->sc_ac2q[i]; in ath_announce()
6653 device_printf(sc->sc_dev, in ath_announce()
6655 txq->axq_qnum, ieee80211_wme_acnames[i]); in ath_announce()
6657 device_printf(sc->sc_dev, "Use hw queue %u for CAB traffic\n", in ath_announce()
6658 sc->sc_cabq->axq_qnum); in ath_announce()
6659 device_printf(sc->sc_dev, "Use hw queue %u for beacons\n", in ath_announce()
6660 sc->sc_bhalq); in ath_announce()
6663 device_printf(sc->sc_dev, "using %u rx buffers\n", ath_rxbuf); in ath_announce()
6665 device_printf(sc->sc_dev, "using %u tx buffers\n", ath_txbuf); in ath_announce()
6666 if (sc->sc_mcastkey && bootverbose) in ath_announce()
6667 device_printf(sc->sc_dev, "using multicast key search\n"); in ath_announce()
6674 struct ieee80211com *ic = &sc->sc_ic; in ath_dfs_tasklet()
6681 if (ath_dfs_process_radar_event(sc, sc->sc_curchan)) { in ath_dfs_tasklet()
6698 ieee80211_dfs_notify_radar(ic, sc->sc_curchan); in ath_dfs_tasklet()
6714 struct ieee80211com *ic = ni->ni_ic; in ath_node_powersave()
6715 struct ath_softc *sc = ic->ic_softc; in ath_node_powersave()
6716 struct ath_vap *avp = ATH_VAP(ni->ni_vap); in ath_node_powersave()
6722 ni->ni_macaddr, in ath_node_powersave()
6733 avp->av_node_ps(ni, enable); in ath_node_powersave()
6735 struct ath_vap *avp = ATH_VAP(ni->ni_vap); in ath_node_powersave()
6738 avp->av_node_ps(ni, enable); in ath_node_powersave()
6768 * just wraps the driver state change and this call to avp->av_set_tim().
6772 * into the driver, as well as ps-poll and the driver transmitting
6774 * a packet entering the PSQ and a ps-poll being handled will
6775 * race, causing the TIM to be cleared and not re-set.
6781 struct ieee80211com *ic = ni->ni_ic; in ath_node_set_tim()
6782 struct ath_softc *sc = ic->ic_softc; in ath_node_set_tim()
6784 struct ath_vap *avp = ATH_VAP(ni->ni_vap); in ath_node_set_tim()
6788 an->an_stack_psq = enable; in ath_node_set_tim()
6792 * even if avp->av_set_tim is unset. in ath_node_set_tim()
6797 if (avp->av_set_tim == NULL) { in ath_node_set_tim()
6816 if (enable && an->an_tim_set == 1) { in ath_node_set_tim()
6820 ni->ni_macaddr, in ath_node_set_tim()
6828 ni->ni_macaddr, in ath_node_set_tim()
6831 an->an_tim_set = 1; in ath_node_set_tim()
6833 changed = avp->av_set_tim(ni, enable); in ath_node_set_tim()
6834 } else if (an->an_swq_depth == 0) { in ath_node_set_tim()
6839 ni->ni_macaddr, in ath_node_set_tim()
6842 an->an_tim_set = 0; in ath_node_set_tim()
6844 changed = avp->av_set_tim(ni, enable); in ath_node_set_tim()
6845 } else if (! an->an_is_powersave) { in ath_node_set_tim()
6852 ni->ni_macaddr, in ath_node_set_tim()
6855 an->an_tim_set = 0; in ath_node_set_tim()
6857 changed = avp->av_set_tim(ni, enable); in ath_node_set_tim()
6868 ni->ni_macaddr, in ath_node_set_tim()
6876 struct ath_vap *avp = ATH_VAP(ni->ni_vap); in ath_node_set_tim()
6882 if (avp->av_set_tim == NULL) in ath_node_set_tim()
6885 return (avp->av_set_tim(ni, enable)); in ath_node_set_tim()
6894 * re-check afterwards to ensure nothing has changed in the
6923 avp = ATH_VAP(ni->ni_vap); in ath_tx_update_tim()
6929 if (avp->av_set_tim == NULL) in ath_tx_update_tim()
6935 if (an->an_is_powersave && in ath_tx_update_tim()
6936 an->an_tim_set == 0 && in ath_tx_update_tim()
6937 an->an_swq_depth != 0) { in ath_tx_update_tim()
6941 ni->ni_macaddr, in ath_tx_update_tim()
6943 an->an_tim_set = 1; in ath_tx_update_tim()
6944 (void) avp->av_set_tim(ni, 1); in ath_tx_update_tim()
6950 if (an->an_swq_depth != 0) in ath_tx_update_tim()
6953 if (an->an_is_powersave && in ath_tx_update_tim()
6954 an->an_stack_psq == 0 && in ath_tx_update_tim()
6955 an->an_tim_set == 1 && in ath_tx_update_tim()
6956 an->an_swq_depth == 0) { in ath_tx_update_tim()
6961 ni->ni_macaddr, in ath_tx_update_tim()
6963 an->an_tim_set = 0; in ath_tx_update_tim()
6964 (void) avp->av_set_tim(ni, 0); in ath_tx_update_tim()
6973 * Received a ps-poll frame from net80211.
6975 * Here we get a chance to serve out a software-queued frame ourselves
6976 * before we punt it to net80211 to transmit us one itself - either
6986 struct ieee80211com *ic = ni->ni_ic; in ath_node_recv_pspoll()
6987 struct ath_softc *sc = ic->ic_softc; in ath_node_recv_pspoll()
6997 if (ni->ni_associd == 0) in ath_node_recv_pspoll()
7004 avp = ATH_VAP(ni->ni_vap); in ath_node_recv_pspoll()
7007 * For now, we just call the original ps-poll method. in ath_node_recv_pspoll()
7021 * TIDs worth of traffic - but let's get it working first in ath_node_recv_pspoll()
7024 * Also yes, there's definitely latency here - we're not in ath_node_recv_pspoll()
7029 * turn-around time. in ath_node_recv_pspoll()
7035 * Legacy - we're called and the node isn't asleep. in ath_node_recv_pspoll()
7038 if (! an->an_is_powersave) { in ath_node_recv_pspoll()
7042 ni->ni_macaddr, in ath_node_recv_pspoll()
7045 avp->av_recv_pspoll(ni, m); in ath_node_recv_pspoll()
7054 an->an_leak_count = 1; in ath_node_recv_pspoll()
7063 if (an->an_swq_depth == 0) { in ath_node_recv_pspoll()
7068 ni->ni_macaddr, in ath_node_recv_pspoll()
7070 avp->av_recv_pspoll(ni, m); in ath_node_recv_pspoll()
7078 for (tid = IEEE80211_TID_SIZE - 1; tid >= 0; tid--) { in ath_node_recv_pspoll()
7079 struct ath_tid *atid = &an->an_tid[tid]; in ath_node_recv_pspoll()
7083 if (atid->axq_depth == 0) in ath_node_recv_pspoll()
7092 taskqueue_enqueue(sc->sc_tq, &sc->sc_txqtask); in ath_node_recv_pspoll()
7096 ni->ni_macaddr, in ath_node_recv_pspoll()
7110 ni->ni_macaddr, in ath_node_recv_pspoll()
7112 avp->av_recv_pspoll(ni, m); in ath_node_recv_pspoll()
7114 avp->av_recv_pspoll(ni, m); in ath_node_recv_pspoll()