Lines Matching full:tx
27 * AR5212-specific tx/rx descriptor definition.
40 } tx; member
50 #define ds_ctl2 u.tx.ctl2
51 #define ds_ctl3 u.tx.ctl3
52 #define ds_txstatus0 u.tx.status0
53 #define ds_txstatus1 u.tx.status1
57 /* TX ds_ctl0 */
65 #define AR_AntModeXmit 0x1e000000 /* TX antenna seslection */
67 #define AR_TxInterReq 0x20000000 /* TX interrupt request */
71 /* TX ds_ctl1 */
87 /* TX ds_ctl2 */
100 /* TX ds_ctl3 */
101 #define AR_XmitRate0 0x0000001f /* series 0 tx rate */
103 #define AR_XmitRate1 0x000003e0 /* series 1 tx rate */
105 #define AR_XmitRate2 0x00007c00 /* series 2 tx rate */
107 #define AR_XmitRate3 0x000f8000 /* series 3 tx rate */
119 /* TX ds_txstatus0 */
120 #define AR_FrmXmitOK 0x00000001 /* TX success */
122 #define AR_FIFOUnderrun 0x00000004 /* TX FIFO underrun */
123 #define AR_Filtered 0x00000008 /* TX filter indication */
130 #define AR_SendTimestamp 0xffff0000 /* TX timestamp */
145 /* TX ds_txstatus1 */
147 #define AR_SeqNum 0x00001ffe /* TX sequence number */
151 #define AR_FinalTSIndex 0x00600000 /* final TX attempt series ix */