Lines Matching full:q
80 ar5211SetTxQueueProps(struct ath_hal *ah, int q, const HAL_TXQ_INFO *qInfo) in ar5211SetTxQueueProps() argument
84 if (q >= HAL_NUM_TX_QUEUES) { in ar5211SetTxQueueProps()
86 __func__, q); in ar5211SetTxQueueProps()
89 return ath_hal_setTxQProps(ah, &ahp->ah_txq[q], qInfo); in ar5211SetTxQueueProps()
96 ar5211GetTxQueueProps(struct ath_hal *ah, int q, HAL_TXQ_INFO *qInfo) in ar5211GetTxQueueProps() argument
100 if (q >= HAL_NUM_TX_QUEUES) { in ar5211GetTxQueueProps()
102 __func__, q); in ar5211GetTxQueueProps()
105 return ath_hal_getTxQProps(ah, qInfo, &ahp->ah_txq[q]); in ar5211GetTxQueueProps()
117 int q; in ar5211SetupTxQueue() local
121 q = 9; in ar5211SetupTxQueue()
124 q = 8; in ar5211SetupTxQueue()
127 q = 0; in ar5211SetupTxQueue()
128 if (ahp->ah_txq[q].tqi_type != HAL_TX_QUEUE_INACTIVE) in ar5211SetupTxQueue()
129 return q; in ar5211SetupTxQueue()
137 HALDEBUG(ah, HAL_DEBUG_TXQUEUE, "%s: queue %u\n", __func__, q); in ar5211SetupTxQueue()
139 qi = &ahp->ah_txq[q]; in ar5211SetupTxQueue()
142 __func__, q); in ar5211SetupTxQueue()
161 (void) ar5211SetTxQueueProps(ah, q, qInfo); in ar5211SetupTxQueue()
162 return q; in ar5211SetupTxQueue()
166 * Update the h/w interrupt registers to reflect a tx q's configuration.
198 ar5211ReleaseTxQueue(struct ath_hal *ah, u_int q) in ar5211ReleaseTxQueue() argument
203 if (q >= HAL_NUM_TX_QUEUES) { in ar5211ReleaseTxQueue()
205 __func__, q); in ar5211ReleaseTxQueue()
208 qi = &ahp->ah_txq[q]; in ar5211ReleaseTxQueue()
211 __func__, q); in ar5211ReleaseTxQueue()
215 HALDEBUG(ah, HAL_DEBUG_TXQUEUE, "%s: release queue %u\n", __func__, q); in ar5211ReleaseTxQueue()
218 ahp->ah_txOkInterruptMask &= ~(1 << q); in ar5211ReleaseTxQueue()
219 ahp->ah_txErrInterruptMask &= ~(1 << q); in ar5211ReleaseTxQueue()
220 ahp->ah_txDescInterruptMask &= ~(1 << q); in ar5211ReleaseTxQueue()
221 ahp->ah_txEolInterruptMask &= ~(1 << q); in ar5211ReleaseTxQueue()
222 ahp->ah_txUrnInterruptMask &= ~(1 << q); in ar5211ReleaseTxQueue()
232 ar5211ResetTxQueue(struct ath_hal *ah, u_int q) in ar5211ResetTxQueue() argument
239 if (q >= HAL_NUM_TX_QUEUES) { in ar5211ResetTxQueue()
241 __func__, q); in ar5211ResetTxQueue()
244 qi = &ahp->ah_txq[q]; in ar5211ResetTxQueue()
247 __func__, q); in ar5211ResetTxQueue()
267 OS_REG_WRITE(ah, AR_DLCL_IFS(q), in ar5211ResetTxQueue()
273 OS_REG_WRITE(ah, AR_DRETRY_LIMIT(q), in ar5211ResetTxQueue()
281 OS_REG_WRITE(ah, AR_QMISC(q), AR_Q_MISC_DCU_EARLY_TERM_REQ); in ar5211ResetTxQueue()
285 OS_REG_WRITE(ah, AR_DMISC(q), AR5311_D_MISC_SEQ_NUM_CONTROL); in ar5211ResetTxQueue()
289 OS_REG_WRITE(ah, AR_QCBRCFG(q), in ar5211ResetTxQueue()
292 OS_REG_WRITE(ah, AR_QMISC(q), in ar5211ResetTxQueue()
293 OS_REG_READ(ah, AR_QMISC(q)) | in ar5211ResetTxQueue()
299 OS_REG_WRITE(ah, AR_QRDYTIMECFG(q), in ar5211ResetTxQueue()
304 OS_REG_WRITE(ah, AR_DCHNTIME(q), in ar5211ResetTxQueue()
308 OS_REG_WRITE(ah, AR_QMISC(q), in ar5211ResetTxQueue()
309 OS_REG_READ(ah, AR_QMISC(q)) | in ar5211ResetTxQueue()
315 OS_REG_WRITE(ah, AR_DMISC(q), in ar5211ResetTxQueue()
316 OS_REG_READ(ah, AR_DMISC(q)) | in ar5211ResetTxQueue()
320 OS_REG_WRITE(ah, AR_DMISC(q), in ar5211ResetTxQueue()
321 OS_REG_READ(ah, AR_DMISC(q)) | in ar5211ResetTxQueue()
327 OS_REG_WRITE(ah, AR_QMISC(q), in ar5211ResetTxQueue()
328 OS_REG_READ(ah, AR_QMISC(q)) in ar5211ResetTxQueue()
337 OS_REG_WRITE(ah, AR_DMISC(q), value); in ar5211ResetTxQueue()
341 OS_REG_WRITE(ah, AR_QMISC(q), in ar5211ResetTxQueue()
342 OS_REG_READ(ah, AR_QMISC(q)) in ar5211ResetTxQueue()
350 OS_REG_WRITE(ah, AR_QRDYTIMECFG(q), value | AR_Q_RDYTIMECFG_EN); in ar5211ResetTxQueue()
356 OS_REG_WRITE(ah, AR_QMISC(q), value); in ar5211ResetTxQueue()
374 ahp->ah_txOkInterruptMask |= 1 << q; in ar5211ResetTxQueue()
376 ahp->ah_txOkInterruptMask &= ~(1 << q); in ar5211ResetTxQueue()
378 ahp->ah_txErrInterruptMask |= 1 << q; in ar5211ResetTxQueue()
380 ahp->ah_txErrInterruptMask &= ~(1 << q); in ar5211ResetTxQueue()
382 ahp->ah_txDescInterruptMask |= 1 << q; in ar5211ResetTxQueue()
384 ahp->ah_txDescInterruptMask &= ~(1 << q); in ar5211ResetTxQueue()
386 ahp->ah_txEolInterruptMask |= 1 << q; in ar5211ResetTxQueue()
388 ahp->ah_txEolInterruptMask &= ~(1 << q); in ar5211ResetTxQueue()
390 ahp->ah_txUrnInterruptMask |= 1 << q; in ar5211ResetTxQueue()
392 ahp->ah_txUrnInterruptMask &= ~(1 << q); in ar5211ResetTxQueue()
402 ar5211GetTxDP(struct ath_hal *ah, u_int q) in ar5211GetTxDP() argument
404 HALASSERT(q < HAL_NUM_TX_QUEUES); in ar5211GetTxDP()
405 return OS_REG_READ(ah, AR_QTXDP(q)); in ar5211GetTxDP()
412 ar5211SetTxDP(struct ath_hal *ah, u_int q, uint32_t txdp) in ar5211SetTxDP() argument
414 HALASSERT(q < HAL_NUM_TX_QUEUES); in ar5211SetTxDP()
415 HALASSERT(AH5211(ah)->ah_txq[q].tqi_type != HAL_TX_QUEUE_INACTIVE); in ar5211SetTxDP()
421 HALASSERT((OS_REG_READ(ah, AR_Q_TXE) & (1 << q)) == 0); in ar5211SetTxDP()
423 OS_REG_WRITE(ah, AR_QTXDP(q), txdp); in ar5211SetTxDP()
432 ar5211StartTxDma(struct ath_hal *ah, u_int q) in ar5211StartTxDma() argument
434 HALASSERT(q < HAL_NUM_TX_QUEUES); in ar5211StartTxDma()
435 HALASSERT(AH5211(ah)->ah_txq[q].tqi_type != HAL_TX_QUEUE_INACTIVE); in ar5211StartTxDma()
438 HALASSERT((OS_REG_READ(ah, AR_Q_TXD) & (1<<q)) == 0); in ar5211StartTxDma()
440 HALDEBUG(ah, HAL_DEBUG_TXQUEUE, "%s: queue %u\n", __func__, q); in ar5211StartTxDma()
442 /* Check to be sure we're not enabling a q that has its TXD bit set. */ in ar5211StartTxDma()
443 HALASSERT((OS_REG_READ(ah, AR_Q_TXD) & (1 << q)) == 0); in ar5211StartTxDma()
445 OS_REG_WRITE(ah, AR_Q_TXE, 1 << q); in ar5211StartTxDma()
453 ar5211NumTxPending(struct ath_hal *ah, u_int q) in ar5211NumTxPending() argument
457 HALASSERT(q < HAL_NUM_TX_QUEUES); in ar5211NumTxPending()
458 HALASSERT(AH5211(ah)->ah_txq[q].tqi_type != HAL_TX_QUEUE_INACTIVE); in ar5211NumTxPending()
460 n = OS_REG_READ(ah, AR_QSTS(q)) & AR_Q_STS_PEND_FR_CNT_M; in ar5211NumTxPending()
466 if (n == 0 && (OS_REG_READ(ah, AR_Q_TXE) & (1<<q))) in ar5211NumTxPending()
475 ar5211StopTxDma(struct ath_hal *ah, u_int q) in ar5211StopTxDma() argument
479 HALASSERT(q < HAL_NUM_TX_QUEUES); in ar5211StopTxDma()
480 HALASSERT(AH5211(ah)->ah_txq[q].tqi_type != HAL_TX_QUEUE_INACTIVE); in ar5211StopTxDma()
482 OS_REG_WRITE(ah, AR_Q_TXD, 1<<q); in ar5211StopTxDma()
484 if (ar5211NumTxPending(ah, q) == 0) in ar5211StopTxDma()