Lines Matching +full:0 +full:x4001
22 #define AR_EEPROM_VER1 0x1000 /* Version 1.0; 5210 only */
33 #define AR_EEPROM_VER3 0x3000 /* Version 3.0; start of 16k EEPROM */
34 #define AR_EEPROM_VER3_1 0x3001 /* Version 3.1 */
35 #define AR_EEPROM_VER3_2 0x3002 /* Version 3.2 */
36 #define AR_EEPROM_VER3_3 0x3003 /* Version 3.3 */
37 #define AR_EEPROM_VER3_4 0x3004 /* Version 3.4 */
38 #define AR_EEPROM_VER4 0x4000 /* Version 4.x */
39 #define AR_EEPROM_VER4_0 0x4000 /* Version 4.0 */
40 #define AR_EEPROM_VER4_1 0x4001 /* Version 4.0 */
41 #define AR_EEPROM_VER4_2 0x4002 /* Version 4.0 */
42 #define AR_EEPROM_VER4_3 0x4003 /* Version 4.0 */
43 #define AR_EEPROM_VER4_6 0x4006 /* Version 4.0 */
44 #define AR_EEPROM_VER4_7 0x3007 /* Version 4.7 */
45 #define AR_EEPROM_VER4_9 0x4009 /* EEPROM EAR futureproofing */
46 #define AR_EEPROM_VER5 0x5000 /* Version 5.x */
47 #define AR_EEPROM_VER5_0 0x5000 /* Adds new 2413 cal powers and added params */
48 #define AR_EEPROM_VER5_1 0x5001 /* Adds capability values */
49 #define AR_EEPROM_VER5_3 0x5003 /* Adds spur mitigation table */
50 #define AR_EEPROM_VER5_4 0x5004
56 #define AR_EEPROM_VER14 0xE000 /* Version 14.x */
57 #define AR_EEPROM_VER14_1 0xE001 /* Adds 11n support */
58 #define AR_EEPROM_VER14_2 0xE002
59 #define AR_EEPROM_VER14_3 0xE003
60 #define AR_EEPROM_VER14_7 0xE007
61 #define AR_EEPROM_VER14_9 0xE009
62 #define AR_EEPROM_VER14_16 0xE010
63 #define AR_EEPROM_VER14_17 0xE011
64 #define AR_EEPROM_VER14_19 0xE013
121 #define SD_NO_CTL 0xf0
122 #define NO_CTL 0xff
123 #define CTL_MODE_M 0x0f
124 #define CTL_11A 0
135 #define HAL_REG_DMN_MASK 0xf0
136 #define HAL_REGDMN_FCC 0x10
137 #define HAL_REGDMN_MKK 0x40
138 #define HAL_REGDMN_ETSI 0x30
141 (((reg_dmn & HAL_REG_DMN_MASK) == HAL_REGDMN_FCC) ? 1 : 0)
143 (((reg_dmn & HAL_REG_DMN_MASK) == HAL_REGDMN_ETSI) ? 1 : 0)
145 (((reg_dmn & HAL_REG_DMN_MASK) == HAL_REGDMN_MKK) ? 1 : 0)
147 #define AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
148 #define AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
149 #define AR_EEPROM_EEREGCAP_EN_KK_U2 0x0100
150 #define AR_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
151 #define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
152 #define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
155 #define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD_PRE4_0 0x4000
156 #define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A_PRE4_0 0x8000
158 #define AR_NO_SPUR 0x8000