Lines Matching +full:rates +full:- +full:cck
1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
26 * structure for use with the device. Hardware-related operations that
67 * error occurs--i.e. you cannot check it for success.
81 HAL_EEWRITE = 11, /* Attempt to change write-locked EEPROM */
84 HAL_ESELFTEST = 14, /* Hardware self-test failed */
106 HAL_CAP_PSPOLL = 10, /* hardware has working PS-Poll support */
112 HAL_CAP_TPC = 16, /* per-packet tx power control */
122 HAL_CAP_TPC_ACK = 26, /* ack txpower with per-packet tpc */
123 HAL_CAP_TPC_CTS = 27, /* cts txpower with per-packet tpc */
208 HAL_CAP_RXDESC_SELFLINK = 242, /* support a self-linked tail RX descriptor */
221 * be a many-to-one mapping between these states and the
243 HAL_TX_QUEUE_UAPSD = 4, /* u-apsd power save xmit q */
318 * must be non-zero for frames to be scheduled for
324 * with a non-ASAP policy (e.g. DBA-gated).
340 * Disable post-tx backoff following each frame.
348 * concurrently with this queue. Intra-frame lockout
355 HAL_TXQ_ARB_LOCKOUT_INTRA = 0x00020000, /* intra-frame lockout */
382 #define HAL_TXQ_USEDEFAULT ((uint32_t) -1)
425 HAL_RX_FILTER_PSPOLL = 0x00004000, /* Allow PS-POLL frames */
431 * but instead the HAL sets individual bits - eg PHYERR will result
432 * in OFDM/CCK timing error frames being received.
471 HAL_INT_RX = 0x00000001, /* Non-common mapping */
479 HAL_INT_TX = 0x00000040, /* Non-common mapping */
492 HAL_INT_TIM = 0x00200000, /* Non-common mapping */
493 HAL_INT_DTIM = 0x00400000, /* Non-common mapping */
494 HAL_INT_DTIMSYNC= 0x00800000, /* Non-common mapping */
496 HAL_INT_CABEND = 0x02000000, /* Non-common mapping */
497 HAL_INT_TSFOOR = 0x04000000, /* Non-common mapping */
498 HAL_INT_TBTT = 0x08000000, /* Non-common mapping */
500 HAL_INT_GENTIMER = 0x08000000, /* Non-common mapping */
501 HAL_INT_CST = 0x10000000, /* Non-common mapping */
502 HAL_INT_GTT = 0x20000000, /* Non-common mapping */
503 HAL_INT_FATAL = 0x40000000, /* Non-common mapping */
559 u_int32_t listen_time; /* listen time in msec - time for which ch is free */
561 u_int32_t cckphyerr_cnt; /* CCK err count since last reset */
656 HAL_MODE_TURBO = 0x002, /* 11a turbo-only channels */
660 HAL_MODE_11G = 0x010, /* 11g channels (OFDM/CCK) */
684 uint8_t phy; /* CCK/OFDM/XR */
688 * preamble in CCK rate code */
689 uint8_t dot11Rate; /* value for supported rates
700 uint8_t rs_rates[64]; /* rates */
720 #define HAL_RATESERIES_HALFGI 0x0004 /* use half-gi for series */
785 uint8_t kv_val[16]; /* enough for 128-bit keys */
810 HAL_CIPHER_MIC = 127 /* TKIP-MIC, not a cipher */
820 * Per-station beacon timer state. Note that the specified
823 * If bs_cfpmaxduration is non-zero the hardware is setup to
824 * coexist with a PCF-capable AP.
832 * are all 1:1 correspondances with the pre-11n chip AR_BEACON
851 * Like HAL_BEACON_STATE but for non-station mode setup.
867 * Per-node statistics maintained by the driver for use in
891 uint32_t ast_ani_cckhigh;/* ANI CCK weak signal threshold high */
892 uint32_t ast_ani_ccklow; /* ANI CCK weak signal threshold low */
896 uint32_t ast_ani_cckerrs;/* ANI cumulative cck phy err count */
897 uint32_t ast_ani_reset; /* ANI parameters zero'd for non-STA */
905 uint8_t noiseImmunityLevel; /* Global for pre-AR9380; OFDM later*/
906 uint8_t cckNoiseImmunityLevel; /* AR9380: CCK specific NI */
911 uint8_t mrcCck; /* MRC CCK is enabled */
918 (to detect wrap-around) */
920 uint32_t cckPhyErrCount; /* CCK err count since last reset */
966 * capability - that has a different mapping for some reason.
978 HAL_ANI_CCK_NOISE_IMMUNITY_LEVEL = 9, /* set level (cck) */
1009 int32_t pe_usefir128; /* Use the average in-band power measured over 128 cycles */
1101 uint64_t re_full_ts; /* 64-bit full timestamp from interrupt time */
1119 * BT Co-existence definitions
1164 int ath_hal_desc_tpc; /* Per-packet TPC */
1194 /* For now, set this to 0 - net80211 needs to know about hardware MFP support */
1211 * ath_hal structure for use with the device. Hardware-related operations
1308 const struct ath_desc *ds, int *rates, int *tries);
1479 * The next 4 (set11ntxdesc -> set11naggrlast) are specific
1561 * to an upper-layer data structure (HAL_SOFTC) that is stored in the
1569 * be returned if the status parameter is non-zero.
1651 const HAL_RATE_TABLE *rates, uint32_t frameLen,
1665 const HAL_RATE_TABLE *rates, uint32_t frameLen,
1685 * Enable/disable and get self-gen frame (ACK, CTS) for CAC.
1701 //return AH_PRIVATE(ah)->ah_mfp_qos; in ath_hal_get_mfp_qos()