Lines Matching +full:pc +full:- +full:ack
1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
57 struct ath_hal_chip *pc; in ath_hal_probe() local
61 const char *name = (*pchip)->probe(vendorid, devid); in ath_hal_probe()
67 TAILQ_FOREACH(pc, &ah_chip_list, node) { in ath_hal_probe()
68 const char *name = pc->probe(vendorid, devid); in ath_hal_probe()
90 struct ath_hal_chip *pc; in ath_hal_attach() local
97 if (chip->probe(ATHEROS_VENDOR_ID, devid) == AH_NULL) in ath_hal_attach()
99 ah = chip->attach(devid, sc, st, sh, eepromdata, ah_config, in ath_hal_attach()
103 ah->ah_devid = AH_PRIVATE(ah)->ah_devid; in ath_hal_attach()
104 ah->ah_subvendorid = AH_PRIVATE(ah)->ah_subvendorid; in ath_hal_attach()
105 ah->ah_macVersion = AH_PRIVATE(ah)->ah_macVersion; in ath_hal_attach()
106 ah->ah_macRev = AH_PRIVATE(ah)->ah_macRev; in ath_hal_attach()
107 ah->ah_phyRev = AH_PRIVATE(ah)->ah_phyRev; in ath_hal_attach()
108 ah->ah_analog5GhzRev = AH_PRIVATE(ah)->ah_analog5GhzRev; in ath_hal_attach()
109 ah->ah_analog2GhzRev = AH_PRIVATE(ah)->ah_analog2GhzRev; in ath_hal_attach()
115 TAILQ_FOREACH(pc, &ah_chip_list, node) { in ath_hal_attach()
116 struct ath_hal_chip *chip = pc; in ath_hal_attach()
120 if (chip->probe(ATHEROS_VENDOR_ID, devid) == AH_NULL) in ath_hal_attach()
122 ah = chip->attach(devid, sc, st, sh, eepromdata, ah_config, in ath_hal_attach()
126 ah->ah_devid = AH_PRIVATE(ah)->ah_devid; in ath_hal_attach()
127 ah->ah_subvendorid = AH_PRIVATE(ah)->ah_subvendorid; in ath_hal_attach()
128 ah->ah_macVersion = AH_PRIVATE(ah)->ah_macVersion; in ath_hal_attach()
129 ah->ah_macRev = AH_PRIVATE(ah)->ah_macRev; in ath_hal_attach()
130 ah->ah_phyRev = AH_PRIVATE(ah)->ah_phyRev; in ath_hal_attach()
131 ah->ah_analog5GhzRev = AH_PRIVATE(ah)->ah_analog5GhzRev; in ath_hal_attach()
132 ah->ah_analog2GhzRev = AH_PRIVATE(ah)->ah_analog2GhzRev; in ath_hal_attach()
143 switch (ah->ah_macVersion) { in ath_hal_mac_name()
173 if (AH_PRIVATE(ah)->ah_ispcie) in ath_hal_mac_name()
179 if (AH_PRIVATE(ah)->ah_ispcie) in ath_hal_mac_name()
183 if (ah->ah_macRev >= AR_SREV_REVISION_AR9580_10) in ath_hal_mac_name()
245 if (rf->probe(ah)) in ath_hal_rfprobe()
250 if (rf->probe(ah)) in ath_hal_rfprobe()
260 switch (ah->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) { in ath_hal_rf_name()
368 rc = rates->info[rateix].rateCode; in ath_hal_pkt_txtime()
375 /* 11n frame - extract out the number of spatial streams */ in ath_hal_pkt_txtime()
438 if (IS_HT_RATE(rates->info[rateix].rateCode)) in ath_hal_computetxtime()
440 __func__, rateix, rates->info[rateix].rateCode); in ath_hal_computetxtime()
442 kbps = rates->info[rateix].rateKbps; in ath_hal_computetxtime()
449 switch (rates->info[rateix].phy) { in ath_hal_computetxtime()
452 if (shortPreamble && rates->info[rateix].shortPreamble) in ath_hal_computetxtime()
507 __func__, rates->info[rateix].phy, rateix); in ath_hal_computetxtime()
546 * chan mode (OFDM+CCK dynamic) ? We have pure-G versions DYN-BG.. in ath_hal_get_curmode()
597 const struct ieee80211_channel *c = AH_PRIVATE(ah)->ah_curchan; in ath_hal_mac_clks()
601 /* XXX merlin and later specific workaround - 5ghz fast clock is 44 */ in ath_hal_mac_clks()
637 const struct ieee80211_channel *c = AH_PRIVATE(ah)->ah_curchan; in ath_hal_mac_psec()
641 /* XXX merlin and later specific workaround - 5ghz fast clock is 44 */ in ath_hal_mac_psec()
657 * fill in ack durations. This routine is called for
672 if (rt->rateCodeToIndex[0] != 0) /* already setup */ in ath_hal_setupratetable()
674 for (i = 0; i < N(rt->rateCodeToIndex); i++) in ath_hal_setupratetable()
675 rt->rateCodeToIndex[i] = (uint8_t) -1; in ath_hal_setupratetable()
676 for (i = 0; i < rt->rateCount; i++) { in ath_hal_setupratetable()
677 uint8_t code = rt->info[i].rateCode; in ath_hal_setupratetable()
678 uint8_t cix = rt->info[i].controlRate; in ath_hal_setupratetable()
680 HALASSERT(code < N(rt->rateCodeToIndex)); in ath_hal_setupratetable()
681 rt->rateCodeToIndex[code] = i; in ath_hal_setupratetable()
682 HALASSERT((code | rt->info[i].shortPreamble) < in ath_hal_setupratetable()
683 N(rt->rateCodeToIndex)); in ath_hal_setupratetable()
684 rt->rateCodeToIndex[code | rt->info[i].shortPreamble] = i; in ath_hal_setupratetable()
688 * the static tables are setup with an 11b-compatible in ath_hal_setupratetable()
691 rt->info[i].lpAckDuration = ath_hal_computetxtime(ah, rt, in ath_hal_setupratetable()
693 rt->info[i].spAckDuration = ath_hal_computetxtime(ah, rt, in ath_hal_setupratetable()
703 const HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; in ath_hal_getcapability()
707 *result = AH_PRIVATE(ah)->ah_currentRD; in ath_hal_getcapability()
710 *result = AH_PRIVATE(ah)->ah_dfsDomain; in ath_hal_getcapability()
718 return pCap->halHwPhyCounterSupport ? HAL_OK : HAL_ENXIO; in ath_hal_getcapability()
724 *result = pCap->halKeyCacheSize; in ath_hal_getcapability()
727 *result = pCap->halTotalQueues; in ath_hal_getcapability()
730 return pCap->halVEOLSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
731 case HAL_CAP_PSPOLL: /* hardware PS-Poll support works */ in ath_hal_getcapability()
732 return pCap->halPSPollBroken ? HAL_ENOTSUPP : HAL_OK; in ath_hal_getcapability()
734 return pCap->halCompressSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
736 return pCap->halBurstSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
738 return pCap->halFastFramesSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
740 *result = AH_PRIVATE(ah)->ah_diagreg; in ath_hal_getcapability()
747 *result = AH_PRIVATE(ah)->ah_powerLimit; in ath_hal_getcapability()
750 *result = AH_PRIVATE(ah)->ah_maxPowerLevel; in ath_hal_getcapability()
753 *result = AH_PRIVATE(ah)->ah_tpScale; in ath_hal_getcapability()
758 return pCap->halBssIdMaskSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
760 return pCap->halMcastKeySrchSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
766 return pCap->halRfSilentSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
768 return AH_PRIVATE(ah)->ah_rfkillEnabled ? in ath_hal_getcapability()
771 *result = AH_PRIVATE(ah)->ah_rfsilent; in ath_hal_getcapability()
779 return pCap->halHTSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
781 return pCap->halGTTSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
783 return pCap->halFastCCSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
785 *result = pCap->halTxChainMask; in ath_hal_getcapability()
788 *result = pCap->halRxChainMask; in ath_hal_getcapability()
791 *result = pCap->halNumGpioPins; in ath_hal_getcapability()
794 return pCap->halCSTSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
796 *result = pCap->halRtsAggrLimit; in ath_hal_getcapability()
799 return pCap->hal4AddrAggrSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
801 return pCap->halExtChanDfsSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
803 return pCap->halRxStbcSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
805 return pCap->halTxStbcSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
807 return pCap->halUseCombinedRadarRssi ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
809 return pCap->halAutoSleepSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
811 return pCap->halMbssidAggrSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
813 return pCap->hal4kbSplitTransSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
815 *result = AH_PRIVATE(ah)->ah_currentRDext; in ath_hal_getcapability()
818 return pCap->halEnhancedDmaSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
820 *result = pCap->halNumTxMaps; in ath_hal_getcapability()
823 *result = pCap->halTxDescLen; in ath_hal_getcapability()
826 *result = pCap->halTxStatusLen; in ath_hal_getcapability()
829 *result = pCap->halRxStatusLen; in ath_hal_getcapability()
834 *result = pCap->halRxHpFifoDepth; in ath_hal_getcapability()
837 *result = pCap->halRxLpFifoDepth; in ath_hal_getcapability()
844 *result = pCap->halNumMRRetries; in ath_hal_getcapability()
847 return pCap->halBtCoexSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
849 return pCap->halSpectralScanSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
851 return pCap->halHTSGI20Support ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
853 *result = pCap->halRxTstampPrecision; in ath_hal_getcapability()
856 return pCap->halAntDivCombSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
859 return pCap->halEnhancedDfsSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
861 /* FreeBSD-specific entries for now */ in ath_hal_getcapability()
863 return AH_PRIVATE(ah)->ah_rxornIsFatal ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
865 *result = pCap->halIntrMask; in ath_hal_getcapability()
868 return pCap->halBssidMatchSupport ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
872 *result = pCap->halTxStreams; in ath_hal_getcapability()
875 *result = pCap->halRxStreams; in ath_hal_getcapability()
880 case HAL_CAP_RXDESC_SELFLINK: /* hardware supports self-linked final RX descriptors correctly */ in ath_hal_getcapability()
881 return pCap->halHasRxSelfLinkedTail ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
883 return pCap->halHasBBReadWar? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
885 return pCap->halSerialiseRegWar ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
887 *result = pCap->halMfpSupport; in ath_hal_getcapability()
890 return pCap->halRxUsingLnaMixing ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
891 case HAL_CAP_DO_MYBEACON: /* Hardware supports filtering my-beacons */ in ath_hal_getcapability()
892 return pCap->halRxDoMyBeacon ? HAL_OK : HAL_ENOTSUPP; in ath_hal_getcapability()
894 *result = pCap->halTxTstampPrecision; in ath_hal_getcapability()
911 AH_PRIVATE(ah)->ah_tpScale = setting; in ath_hal_setcapability()
924 AH_PRIVATE(ah)->ah_rfkillEnabled = (setting != 0); in ath_hal_setcapability()
927 /* XXX better done per-chip for validation? */ in ath_hal_setcapability()
928 AH_PRIVATE(ah)->ah_rfsilent = setting; in ath_hal_setcapability()
933 AH_PRIVATE(ah)->ah_currentRD = setting; in ath_hal_setcapability()
936 AH_PRIVATE(ah)->ah_rxornIsFatal = setting; in ath_hal_setcapability()
962 space -= 2*sizeof(uint32_t); in ath_hal_getregdump()
966 space -= sizeof(uint32_t); in ath_hal_getregdump()
969 return (char *) dp - (char *) dstbuf; in ath_hal_getregdump()
976 OS_REG_WRITE(ah, regs->addr, regs->value); in ath_hal_setregs()
977 regs++, space -= sizeof(HAL_REGWRITE); in ath_hal_setregs()
989 *result = &AH_PRIVATE(ah)->ah_devid; in ath_hal_getdiagstate()
1000 *result = &AH_PRIVATE(ah)->ah_fatalState[0]; in ath_hal_getdiagstate()
1001 *resultsize = sizeof(AH_PRIVATE(ah)->ah_fatalState); in ath_hal_getdiagstate()
1017 return ah->ah_setKeyCacheEntry(ah, dk->dk_keyix, in ath_hal_getdiagstate()
1018 &dk->dk_keyval, dk->dk_mac, dk->dk_xor); in ath_hal_getdiagstate()
1023 return ah->ah_resetKeyCacheEntry(ah, *(const uint16_t *)args); in ath_hal_getdiagstate()
1030 return ath_hal_eepromWrite(ah, ee->ee_off, ee->ee_data); in ath_hal_getdiagstate()
1038 AH_PRIVATE(ah)->ah_11nCompat; in ath_hal_getdiagstate()
1040 AH_PRIVATE(ah)->ah_11nCompat = *(const uint32_t *)args; in ath_hal_getdiagstate()
1045 *result = &AH_PRIVATE(ah)->ah_chansurvey; in ath_hal_getdiagstate()
1062 if (qi->tqi_type == HAL_TX_QUEUE_INACTIVE) { in ath_hal_setTxQProps()
1068 qi->tqi_ver = qInfo->tqi_ver; in ath_hal_setTxQProps()
1069 qi->tqi_subtype = qInfo->tqi_subtype; in ath_hal_setTxQProps()
1070 qi->tqi_qflags = qInfo->tqi_qflags; in ath_hal_setTxQProps()
1071 qi->tqi_priority = qInfo->tqi_priority; in ath_hal_setTxQProps()
1072 if (qInfo->tqi_aifs != HAL_TXQ_USEDEFAULT) in ath_hal_setTxQProps()
1073 qi->tqi_aifs = AH_MIN(qInfo->tqi_aifs, 255); in ath_hal_setTxQProps()
1075 qi->tqi_aifs = INIT_AIFS; in ath_hal_setTxQProps()
1076 if (qInfo->tqi_cwmin != HAL_TXQ_USEDEFAULT) { in ath_hal_setTxQProps()
1077 cw = AH_MIN(qInfo->tqi_cwmin, 1024); in ath_hal_setTxQProps()
1078 /* make sure that the CWmin is of the form (2^n - 1) */ in ath_hal_setTxQProps()
1079 qi->tqi_cwmin = 1; in ath_hal_setTxQProps()
1080 while (qi->tqi_cwmin < cw) in ath_hal_setTxQProps()
1081 qi->tqi_cwmin = (qi->tqi_cwmin << 1) | 1; in ath_hal_setTxQProps()
1083 qi->tqi_cwmin = qInfo->tqi_cwmin; in ath_hal_setTxQProps()
1084 if (qInfo->tqi_cwmax != HAL_TXQ_USEDEFAULT) { in ath_hal_setTxQProps()
1085 cw = AH_MIN(qInfo->tqi_cwmax, 1024); in ath_hal_setTxQProps()
1086 /* make sure that the CWmax is of the form (2^n - 1) */ in ath_hal_setTxQProps()
1087 qi->tqi_cwmax = 1; in ath_hal_setTxQProps()
1088 while (qi->tqi_cwmax < cw) in ath_hal_setTxQProps()
1089 qi->tqi_cwmax = (qi->tqi_cwmax << 1) | 1; in ath_hal_setTxQProps()
1091 qi->tqi_cwmax = INIT_CWMAX; in ath_hal_setTxQProps()
1093 if (qInfo->tqi_shretry != 0) in ath_hal_setTxQProps()
1094 qi->tqi_shretry = AH_MIN(qInfo->tqi_shretry, 15); in ath_hal_setTxQProps()
1096 qi->tqi_shretry = INIT_SH_RETRY; in ath_hal_setTxQProps()
1097 if (qInfo->tqi_lgretry != 0) in ath_hal_setTxQProps()
1098 qi->tqi_lgretry = AH_MIN(qInfo->tqi_lgretry, 15); in ath_hal_setTxQProps()
1100 qi->tqi_lgretry = INIT_LG_RETRY; in ath_hal_setTxQProps()
1101 qi->tqi_cbrPeriod = qInfo->tqi_cbrPeriod; in ath_hal_setTxQProps()
1102 qi->tqi_cbrOverflowLimit = qInfo->tqi_cbrOverflowLimit; in ath_hal_setTxQProps()
1103 qi->tqi_burstTime = qInfo->tqi_burstTime; in ath_hal_setTxQProps()
1104 qi->tqi_readyTime = qInfo->tqi_readyTime; in ath_hal_setTxQProps()
1106 switch (qInfo->tqi_subtype) { in ath_hal_setTxQProps()
1108 if (qi->tqi_type == HAL_TX_QUEUE_DATA) in ath_hal_setTxQProps()
1109 qi->tqi_intFlags = HAL_TXQ_USE_LOCKOUT_BKOFF_DIS; in ath_hal_setTxQProps()
1121 if (qi->tqi_type == HAL_TX_QUEUE_INACTIVE) { in ath_hal_getTxQProps()
1127 qInfo->tqi_ver = qi->tqi_ver; in ath_hal_getTxQProps()
1128 qInfo->tqi_subtype = qi->tqi_subtype; in ath_hal_getTxQProps()
1129 qInfo->tqi_qflags = qi->tqi_qflags; in ath_hal_getTxQProps()
1130 qInfo->tqi_priority = qi->tqi_priority; in ath_hal_getTxQProps()
1131 qInfo->tqi_aifs = qi->tqi_aifs; in ath_hal_getTxQProps()
1132 qInfo->tqi_cwmin = qi->tqi_cwmin; in ath_hal_getTxQProps()
1133 qInfo->tqi_cwmax = qi->tqi_cwmax; in ath_hal_getTxQProps()
1134 qInfo->tqi_shretry = qi->tqi_shretry; in ath_hal_getTxQProps()
1135 qInfo->tqi_lgretry = qi->tqi_lgretry; in ath_hal_getTxQProps()
1136 qInfo->tqi_cbrPeriod = qi->tqi_cbrPeriod; in ath_hal_getTxQProps()
1137 qInfo->tqi_cbrOverflowLimit = qi->tqi_cbrOverflowLimit; in ath_hal_getTxQProps()
1138 qInfo->tqi_burstTime = qi->tqi_burstTime; in ath_hal_getTxQProps()
1139 qInfo->tqi_readyTime = qi->tqi_readyTime; in ath_hal_getTxQProps()
1140 qInfo->tqi_compBuf = qi->tqi_physCompBuf; in ath_hal_getTxQProps()
1145 static const int16_t NOISE_FLOOR[] = { -96, -93, -98, -96, -93 };
1152 * NB: This is a private routine used by per-chip code to
1164 __func__, chan->ic_freq, chan->ic_flags); in ath_hal_getChanNoise()
1167 if (ichan->rawNoiseFloor == 0) { in ath_hal_getChanNoise()
1173 return ichan->rawNoiseFloor + ichan->noiseFloorAdjust; in ath_hal_getChanNoise()
1197 __func__, chan->ic_freq, chan->ic_flags); in ath_hal_get_mimo_chan_noise()
1205 if (! (ichan->privFlags & CHANNEL_MIMO_NF_VALID)) { in ath_hal_get_mimo_chan_noise()
1211 if (ichan->rawNoiseFloor == 0) { in ath_hal_get_mimo_chan_noise()
1215 * See the comment below - this could cause issues for in ath_hal_get_mimo_chan_noise()
1232 * This should be re-evaluated at a later date, along with any in ath_hal_get_mimo_chan_noise()
1236 * ("Adjust" here is via ichan->noiseFloorAdjust.) in ath_hal_get_mimo_chan_noise()
1239 nf_ctl[i] = ichan->noiseFloorCtl[i] + ath_hal_getNfAdjust(ah, ichan); in ath_hal_get_mimo_chan_noise()
1240 nf_ext[i] = ichan->noiseFloorExt[i] + ath_hal_getNfAdjust(ah, ichan); in ath_hal_get_mimo_chan_noise()
1266 for (i = 0; i < AH_PRIVATE(ah)->ah_nchan; i++) { in ath_hal_process_noisefloor()
1270 c = &AH_PRIVATE(ah)->ah_channels[i]; in ath_hal_process_noisefloor()
1271 if (c->rawNoiseFloor >= 0) in ath_hal_process_noisefloor()
1275 nf = c->rawNoiseFloor + NOISE_FLOOR[mode] + in ath_hal_process_noisefloor()
1280 correct5 = NOISE_FLOOR[mode] - in ath_hal_process_noisefloor()
1281 (c->rawNoiseFloor + ath_hal_getNfAdjust(ah, c)); in ath_hal_process_noisefloor()
1286 correct2 = NOISE_FLOOR[mode] - in ath_hal_process_noisefloor()
1287 (c->rawNoiseFloor + ath_hal_getNfAdjust(ah, c)); in ath_hal_process_noisefloor()
1293 for (i = 0; i < AH_PRIVATE(ah)->ah_nchan; i++) { in ath_hal_process_noisefloor()
1294 c = &AH_PRIVATE(ah)->ah_channels[i]; in ath_hal_process_noisefloor()
1295 if (c->rawNoiseFloor >= 0) in ath_hal_process_noisefloor()
1298 c->noiseFloorAdjust = ath_hal_getNfAdjust(ah, c) + in ath_hal_process_noisefloor()
1301 c->channel, c->rawNoiseFloor, c->noiseFloorAdjust); in ath_hal_process_noisefloor()
1315 HALASSERT(col < ia->cols); in ath_hal_ini_write()
1316 for (r = 0; r < ia->rows; r++) { in ath_hal_ini_write()
1320 /* Analog shift register delay seems needed for Merlin - PR kern/154220 */ in ath_hal_ini_write()
1334 HALASSERT(col < ia->cols); in ath_hal_ini_bank_setup()
1335 for (r = 0; r < ia->rows; r++) in ath_hal_ini_bank_setup()
1345 for (r = 0; r < ia->rows; r++) { in ath_hal_ini_bank_write()
1379 if (target >= pList[listSize-1]) { in ath_ee_getLowerUpperIndex()
1380 *indexL = *indexR = (uint16_t)(listSize - 1); in ath_ee_getLowerUpperIndex()
1385 for (i = 0; i < listSize - 1; i++) { in ath_ee_getLowerUpperIndex()
1412 * Fill the Vpdlist for indices Pmax-Pmin
1424 for (i = 0; i <= (pwrMax - pwrMin) / 2; i++) { in ath_ee_FillVpdTable()
1429 if (idxL == numIntercepts - 1) in ath_ee_FillVpdTable()
1430 idxL = (uint16_t)(numIntercepts - 2); /* extrapolate above */ in ath_ee_FillVpdTable()
1434 …k = (uint16_t)( ((currPwr - pPwrList[idxL]) * pVpdList[idxR] + (pPwrList[idxR] - currPwr) * pVpdLi… in ath_ee_FillVpdTable()
1435 (pPwrList[idxR] - pPwrList[idxL]) ); in ath_ee_FillVpdTable()
1458 rv = (int16_t)( ((target - srcLeft) * targetRight + in ath_ee_interpolate()
1459 (srcRight - target) * targetLeft) / (srcRight - srcLeft) ); in ath_ee_interpolate()
1502 * Set the current state of self-generated ACK and RTS/CTS frames.
1504 * For correct DFS operation, the device should not even /ACK/ frames
1511 if (ah->ah_setDfsCacTxQuiet == NULL) in ath_hal_set_dfs_cac_tx_quiet()
1513 ah->ah_setDfsCacTxQuiet(ah, ena); in ath_hal_set_dfs_cac_tx_quiet()
1517 * This routine is only needed when supporting EEPROM-in-RAM setups
1518 * (eg embedded SoCs and on-board PCI/PCIe devices.)
1527 if (ah->ah_eepromdata == AH_NULL) { in ath_hal_EepromDataRead()
1536 (*data) = ah->ah_eepromdata[off]; in ath_hal_EepromDataRead()
1541 * Do a 2GHz specific MHz->IEEE based on the hardware
1553 return ((int) freq - 2407) / 5; in ath_hal_mhz2ieee_2ghz()
1555 return 15 + ((freq - 2512) / 20); in ath_hal_mhz2ieee_2ghz()
1567 OS_MEMZERO(&AH_PRIVATE(ah)->ah_chansurvey, in ath_hal_survey_clear()
1568 sizeof(AH_PRIVATE(ah)->ah_chansurvey)); in ath_hal_survey_clear()
1579 cs = &AH_PRIVATE(ah)->ah_chansurvey; in ath_hal_survey_add_sample()
1581 OS_MEMCPY(&cs->samples[cs->cur_sample], hs, sizeof(*hs)); in ath_hal_survey_add_sample()
1582 cs->samples[cs->cur_sample].seq_num = cs->cur_seq; in ath_hal_survey_add_sample()
1583 cs->cur_sample = (cs->cur_sample + 1) % CHANNEL_SURVEY_SAMPLE_COUNT; in ath_hal_survey_add_sample()
1584 cs->cur_seq++; in ath_hal_survey_add_sample()