63 #define SWKS_33		0
76     {{ ATA_ROSB4,     0x00, SWKS_33,  0, ATA_WDMA2, "ROSB4" },  in ata_serverworks_probe()
77      { ATA_CSB5,      0x92, SWKS_100, 0, ATA_UDMA5, "CSB5" },  in ata_serverworks_probe()
78      { ATA_CSB5,      0x00, SWKS_66,  0, ATA_UDMA4, "CSB5" },  in ata_serverworks_probe()
79      { ATA_CSB6,      0x00, SWKS_100, 0, ATA_UDMA5, "CSB6" },  in ata_serverworks_probe()
80      { ATA_CSB6_1,    0x00, SWKS_66,  0, ATA_UDMA4, "CSB6" },  in ata_serverworks_probe()
81      { ATA_HT1000,    0x00, SWKS_100, 0, ATA_UDMA5, "HT1000" },  in ata_serverworks_probe()
82      { ATA_HT1000_S1, 0x00, SWKS_MIO, 4, ATA_SA150, "HT1000" },  in ata_serverworks_probe()
83      { ATA_HT1000_S2, 0x00, SWKS_MIO, 4, ATA_SA150, "HT1000" },  in ata_serverworks_probe()
84      { ATA_K2,        0x00, SWKS_MIO, 4, ATA_SA150, "K2" },  in ata_serverworks_probe()
85      { ATA_FRODO4,    0x00, SWKS_MIO, 4, ATA_SA150, "Frodo4" },  in ata_serverworks_probe()
86      { ATA_FRODO8,    0x00, SWKS_MIO, 8, ATA_SA150, "Frodo8" },  in ata_serverworks_probe()
87      { 0, 0, 0, 0, 0, 0}};  in ata_serverworks_probe()
109     if (!(ATA_INL(ctlr->r_res2, 0x1f80) & (1 << ch->unit)))  in ata_serverworks_status()
110 	return (0);  in ata_serverworks_status()
143 	return 0;  in ata_serverworks_chipinit()
151 	    for (i = 0; i < nchildren; i++) {  in ata_serverworks_chipinit()
153 		    pci_write_config(children[i], 0x64,  in ata_serverworks_chipinit()
154 				     (pci_read_config(children[i], 0x64, 4) &  in ata_serverworks_chipinit()
155 				      ~0x00002000) | 0x00004000, 4);  in ata_serverworks_chipinit()
163 	pci_write_config(dev, 0x5a, (pci_read_config(dev, 0x5a, 1) & ~0x40) |  in ata_serverworks_chipinit()
164 	    ((ctlr->chip->cfg1 == SWKS_100) ? 0x03 : 0x02), 1);  in ata_serverworks_chipinit()
167     return 0;  in ata_serverworks_chipinit()
178     ch_offset = ch->unit * 0x100;  in ata_serverworks_ch_attach()
184     ch->r_io[ATA_DATA].offset = ch_offset + 0x00;  in ata_serverworks_ch_attach()
185     ch->r_io[ATA_FEATURE].offset = ch_offset + 0x04;  in ata_serverworks_ch_attach()
186     ch->r_io[ATA_COUNT].offset = ch_offset + 0x08;  in ata_serverworks_ch_attach()
187     ch->r_io[ATA_SECTOR].offset = ch_offset + 0x0c;  in ata_serverworks_ch_attach()
188     ch->r_io[ATA_CYL_LSB].offset = ch_offset + 0x10;  in ata_serverworks_ch_attach()
189     ch->r_io[ATA_CYL_MSB].offset = ch_offset + 0x14;  in ata_serverworks_ch_attach()
190     ch->r_io[ATA_DRIVE].offset = ch_offset + 0x18;  in ata_serverworks_ch_attach()
191     ch->r_io[ATA_COMMAND].offset = ch_offset + 0x1c;  in ata_serverworks_ch_attach()
192     ch->r_io[ATA_CONTROL].offset = ch_offset + 0x20;  in ata_serverworks_ch_attach()
196     ch->r_io[ATA_BMCMD_PORT].offset = ch_offset + 0x30;  in ata_serverworks_ch_attach()
197     ch->r_io[ATA_BMSTAT_PORT].offset = ch_offset + 0x32;  in ata_serverworks_ch_attach()
198     ch->r_io[ATA_BMDTP_PORT].offset = ch_offset + 0x34;  in ata_serverworks_ch_attach()
201     ch->r_io[ATA_SSTATUS].offset = ch_offset + 0x40;  in ata_serverworks_ch_attach()
202     ch->r_io[ATA_SERROR].offset = ch_offset + 0x44;  in ata_serverworks_ch_attach()
203     ch->r_io[ATA_SCONTROL].offset = ch_offset + 0x48;  in ata_serverworks_ch_attach()
216 	ATA_OUTL(ctlr->r_res2, ch_offset + 0x80,  in ata_serverworks_ch_attach()
217 	    ATA_INL(ctlr->r_res2, ch_offset + 0x80) & ~0x00040000);  in ata_serverworks_ch_attach()
218 	ATA_OUTL(ctlr->r_res2, ch_offset + 0x88, 0);  in ata_serverworks_ch_attach()
244     return 0;  in ata_serverworks_ch_attach()
252     return (0);  in ata_serverworks_ch_detach()
265 	request->u.ata.lba = (u_int64_t)(temp & 0x00ff) |  in ata_serverworks_tf_read()
266 			     ((u_int64_t)(temp & 0xff00) << 24);  in ata_serverworks_tf_read()
268 	request->u.ata.lba |= ((u_int64_t)(temp & 0x00ff) << 8) |  in ata_serverworks_tf_read()
269 			      ((u_int64_t)(temp & 0xff00) << 32);  in ata_serverworks_tf_read()
271 	request->u.ata.lba |= ((u_int64_t)(temp & 0x00ff) << 16) |  in ata_serverworks_tf_read()
272 			      ((u_int64_t)(temp & 0xff00) << 40);  in ata_serverworks_tf_read()
275 	request->u.ata.count = ATA_IDX_INW(ch, ATA_COUNT) & 0x00ff;  in ata_serverworks_tf_read()
276 	request->u.ata.lba = (ATA_IDX_INW(ch, ATA_SECTOR) & 0x00ff) |  in ata_serverworks_tf_read()
277 			     ((ATA_IDX_INW(ch, ATA_CYL_LSB) & 0x00ff) << 8) |  in ata_serverworks_tf_read()
278 			     ((ATA_IDX_INW(ch, ATA_CYL_MSB) & 0x00ff) << 16) |  in ata_serverworks_tf_read()
279 			     ((ATA_IDX_INW(ch, ATA_DRIVE) & 0xf) << 24);  in ata_serverworks_tf_read()
291 	ATA_IDX_OUTW(ch, ATA_SECTOR, ((request->u.ata.lba >> 16) & 0xff00) |  in ata_serverworks_tf_write()
292 				      (request->u.ata.lba & 0x00ff));  in ata_serverworks_tf_write()
293 	ATA_IDX_OUTW(ch, ATA_CYL_LSB, ((request->u.ata.lba >> 24) & 0xff00) |  in ata_serverworks_tf_write()
294 				       ((request->u.ata.lba >> 8) & 0x00ff));  in ata_serverworks_tf_write()
295 	ATA_IDX_OUTW(ch, ATA_CYL_MSB, ((request->u.ata.lba >> 32) & 0xff00) |   in ata_serverworks_tf_write()
296 				       ((request->u.ata.lba >> 16) & 0x00ff));  in ata_serverworks_tf_write()
307 			 ((request->u.ata.lba >> 24) & 0x0f));  in ata_serverworks_tf_write()
318         int offset = (devno ^ 0x01) << 3;  in ata_serverworks_setmode()
320 	static const uint8_t piotimings[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 };  in ata_serverworks_setmode()
321 	static const uint8_t dmatimings[] = { 0x77, 0x21, 0x20 };  in ata_serverworks_setmode()
326 	    pci_write_config(parent, 0x56,   in ata_serverworks_setmode()
327 			     (pci_read_config(parent, 0x56, 2) &  in ata_serverworks_setmode()
328 			      ~(0xf << (devno << 2))) |  in ata_serverworks_setmode()
330 	    pci_write_config(parent, 0x54,  in ata_serverworks_setmode()
331 			     pci_read_config(parent, 0x54, 1) |  in ata_serverworks_setmode()
332 			     (0x01 << devno), 1);  in ata_serverworks_setmode()
333 	    pci_write_config(parent, 0x44,   in ata_serverworks_setmode()
334 			     (pci_read_config(parent, 0x44, 4) &  in ata_serverworks_setmode()
335 			      ~(0xff << offset)) |  in ata_serverworks_setmode()
340 	    pci_write_config(parent, 0x54,  in ata_serverworks_setmode()
341 			     pci_read_config(parent, 0x54, 1) &  in ata_serverworks_setmode()
342 			      ~(0x01 << devno), 1);  in ata_serverworks_setmode()
343 	    pci_write_config(parent, 0x44,   in ata_serverworks_setmode()
344 			     (pci_read_config(parent, 0x44, 4) &  in ata_serverworks_setmode()
345 			      ~(0xff << offset)) |  in ata_serverworks_setmode()
351 	    pci_write_config(parent, 0x54,  in ata_serverworks_setmode()
352 			     pci_read_config(parent, 0x54, 1) &  in ata_serverworks_setmode()
353 			     ~(0x01 << devno), 1);  in ata_serverworks_setmode()
358 		pci_write_config(parent, 0x4a,  in ata_serverworks_setmode()
359 			 (pci_read_config(parent, 0x4a, 2) &  in ata_serverworks_setmode()
360 			  ~(0xf << (devno << 2))) |  in ata_serverworks_setmode()
363 	pci_write_config(parent, 0x40,   in ata_serverworks_setmode()
364 			 (pci_read_config(parent, 0x40, 4) &  in ata_serverworks_setmode()
365 			  ~(0xff << offset)) |  in ata_serverworks_setmode()
375 	if (ata_sata_phy_reset(dev, -1, 0))  in ata_serverworks_sata_reset()
378 		ch->devices = 0;  in ata_serverworks_sata_reset()