Lines Matching +full:8 +full:- +full:ch
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
48 #include <dev/ata/ata-all.h>
49 #include <dev/ata/ata-pci.h>
106 #define ATA_PDC_MAX_HPKT 8
179 if ((idx->cfg2 & PR_SX6K) && pci_get_class(GRANDPARENT(dev))==PCIC_BRIDGE && in ata_promise_probe()
187 if ((idx->cfg2 & PR_TX4) && pci_get_class(GRANDPARENT(dev))==PCIC_BRIDGE && in ata_promise_probe()
205 device_set_descf(dev, "Promise %s%s %s controller", idx->text, in ata_promise_probe()
206 channel == NULL ? "" : channel, ata_mode2str(idx->max_dma)); in ata_promise_probe()
207 ctlr->chip = idx; in ata_promise_probe()
208 ctlr->chipinit = ata_promise_chipinit; in ata_promise_probe()
221 switch (ctlr->chip->cfg1) { in ata_promise_chipinit()
224 ATA_OUTB(ctlr->r_res1, 0x11, ATA_INB(ctlr->r_res1, 0x11) | 0x0a); in ata_promise_chipinit()
229 ATA_OUTB(ctlr->r_res1, 0x1f, ATA_INB(ctlr->r_res1, 0x1f) | 0x01); in ata_promise_chipinit()
230 ctlr->ch_attach = ata_promise_ch_attach; in ata_promise_chipinit()
231 ctlr->ch_detach = ata_pci_ch_detach; in ata_promise_chipinit()
232 ctlr->setmode = ata_promise_setmode; in ata_promise_chipinit()
236 ctlr->ch_attach = ata_promise_tx2_ch_attach; in ata_promise_chipinit()
237 ctlr->ch_detach = ata_pci_ch_detach; in ata_promise_chipinit()
238 ctlr->setmode = ata_promise_setmode; in ata_promise_chipinit()
242 ctlr->r_type1 = SYS_RES_MEMORY; in ata_promise_chipinit()
243 ctlr->r_rid1 = PCIR_BAR(4); in ata_promise_chipinit()
244 if (!(ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, in ata_promise_chipinit()
245 &ctlr->r_rid1, RF_ACTIVE))) in ata_promise_chipinit()
248 ctlr->r_type2 = SYS_RES_MEMORY; in ata_promise_chipinit()
249 ctlr->r_rid2 = PCIR_BAR(3); in ata_promise_chipinit()
250 if (!(ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, in ata_promise_chipinit()
251 &ctlr->r_rid2, RF_ACTIVE))) in ata_promise_chipinit()
254 if (ctlr->chip->cfg2 == PR_SX4X) { in ata_promise_chipinit()
256 u_int32_t dimm = ATA_INL(ctlr->r_res2, 0x000c0080); in ata_promise_chipinit()
258 if (bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle) || in ata_promise_chipinit()
259 bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS, NULL, in ata_promise_chipinit()
260 ata_promise_sx4_intr, ctlr, &ctlr->handle)) { in ata_promise_chipinit()
267 (((dimm >> 16) & 0xff)-((dimm >> 24) & 0xff)+1) << 4, in ata_promise_chipinit()
269 ATA_INL(ctlr->r_res2, 0x000c0088) & (1<<16) ? in ata_promise_chipinit()
273 ATA_OUTL(ctlr->r_res2, 0x000c000c, in ata_promise_chipinit()
274 (ATA_INL(ctlr->r_res2, 0x000c000c) & 0xffff0000)); in ata_promise_chipinit()
283 mtx_init(&hpkt->mtx, "ATA promise HPKT lock", NULL, MTX_DEF); in ata_promise_chipinit()
284 TAILQ_INIT(&hpkt->queue); in ata_promise_chipinit()
285 hpkt->busy = 0; in ata_promise_chipinit()
286 ctlr->chipset_data = hpkt; in ata_promise_chipinit()
287 ctlr->ch_attach = ata_promise_mio_ch_attach; in ata_promise_chipinit()
288 ctlr->ch_detach = ata_promise_mio_ch_detach; in ata_promise_chipinit()
289 ctlr->reset = ata_promise_mio_reset; in ata_promise_chipinit()
290 ctlr->setmode = ata_promise_setmode; in ata_promise_chipinit()
291 ctlr->channels = 4; in ata_promise_chipinit()
296 if (bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle) || in ata_promise_chipinit()
297 bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS, NULL, in ata_promise_chipinit()
298 ata_promise_mio_intr, ctlr, &ctlr->handle)) { in ata_promise_chipinit()
303 switch (ctlr->chip->cfg2) { in ata_promise_chipinit()
305 ctlr->channels = ((ATA_INL(ctlr->r_res2, 0x48) & 0x01) > 0) + in ata_promise_chipinit()
306 ((ATA_INL(ctlr->r_res2, 0x48) & 0x02) > 0) + 2; in ata_promise_chipinit()
309 ctlr->channels = 3; in ata_promise_chipinit()
312 ctlr->channels = 4; in ata_promise_chipinit()
318 ctlr->channels = 3; in ata_promise_chipinit()
322 ctlr->channels = 4; in ata_promise_chipinit()
329 ctlr->chipset_data = (void *)(uintptr_t)0xffffffff; in ata_promise_chipinit()
332 ATA_OUTL(ctlr->r_res2, stat_reg, 0x000000ff); in ata_promise_chipinit()
335 if ((ctlr->chip->cfg2 == PR_SATA2) || (ctlr->chip->cfg2 == PR_CMBO2)) in ata_promise_chipinit()
336 ATA_OUTL(ctlr->r_res2, 0x44, ATA_INL(ctlr->r_res2, 0x44) | 0x2000); in ata_promise_chipinit()
338 ctlr->ch_attach = ata_promise_mio_ch_attach; in ata_promise_chipinit()
339 ctlr->ch_detach = ata_promise_mio_ch_detach; in ata_promise_chipinit()
340 ctlr->reset = ata_promise_mio_reset; in ata_promise_chipinit()
341 ctlr->setmode = ata_promise_mio_setmode; in ata_promise_chipinit()
342 ctlr->getrev = ata_promise_mio_getrev; in ata_promise_chipinit()
348 if (ctlr->r_res2) in ata_promise_chipinit()
349 bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2); in ata_promise_chipinit()
350 if (ctlr->r_res1) in ata_promise_chipinit()
351 bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1); in ata_promise_chipinit()
359 struct ata_channel *ch = device_get_softc(dev); in ata_promise_ch_attach() local
364 if (ctlr->chip->cfg1 == PR_NEW) { in ata_promise_ch_attach()
365 ch->dma.start = ata_promise_dmastart; in ata_promise_ch_attach()
366 ch->dma.stop = ata_promise_dmastop; in ata_promise_ch_attach()
367 ch->dma.reset = ata_promise_dmareset; in ata_promise_ch_attach()
370 ch->hw.status = ata_promise_status; in ata_promise_ch_attach()
371 ch->flags |= ATA_NO_ATAPI_DMA; in ata_promise_ch_attach()
372 ch->flags |= ATA_CHECKS_CABLE; in ata_promise_ch_attach()
380 struct ata_channel *ch = device_get_softc(dev); in ata_promise_status() local
382 if (ATA_INL(ctlr->r_res1, 0x1c) & (ch->unit ? 0x00004000 : 0x00000400)) { in ata_promise_status()
391 struct ata_pci_controller *ctlr=device_get_softc(device_get_parent(request->parent)); in ata_promise_dmastart()
392 struct ata_channel *ch = device_get_softc(request->parent); in ata_promise_dmastart() local
394 if (request->flags & ATA_R_48BIT) { in ata_promise_dmastart()
395 ATA_OUTB(ctlr->r_res1, 0x11, in ata_promise_dmastart()
396 ATA_INB(ctlr->r_res1, 0x11) | (ch->unit ? 0x08 : 0x02)); in ata_promise_dmastart()
397 ATA_OUTL(ctlr->r_res1, ch->unit ? 0x24 : 0x20, in ata_promise_dmastart()
398 ((request->flags & ATA_R_READ) ? 0x05000000 : 0x06000000) | in ata_promise_dmastart()
399 (request->bytecount >> 1)); in ata_promise_dmastart()
401 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) | in ata_promise_dmastart()
403 ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, request->dma->sg_bus); in ata_promise_dmastart()
404 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, in ata_promise_dmastart()
405 ((request->flags & ATA_R_READ) ? ATA_BMCMD_WRITE_READ : 0) | in ata_promise_dmastart()
407 ch->dma.flags |= ATA_DMA_ACTIVE; in ata_promise_dmastart()
414 struct ata_pci_controller *ctlr=device_get_softc(device_get_parent(request->parent)); in ata_promise_dmastop()
415 struct ata_channel *ch = device_get_softc(request->parent); in ata_promise_dmastop() local
418 if (request->flags & ATA_R_48BIT) { in ata_promise_dmastop()
419 ATA_OUTB(ctlr->r_res1, 0x11, in ata_promise_dmastop()
420 ATA_INB(ctlr->r_res1, 0x11) & ~(ch->unit ? 0x08 : 0x02)); in ata_promise_dmastop()
421 ATA_OUTL(ctlr->r_res1, ch->unit ? 0x24 : 0x20, 0); in ata_promise_dmastop()
423 error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT); in ata_promise_dmastop()
424 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, in ata_promise_dmastop()
425 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); in ata_promise_dmastop()
426 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); in ata_promise_dmastop()
427 ch->dma.flags &= ~ATA_DMA_ACTIVE; in ata_promise_dmastop()
434 struct ata_channel *ch = device_get_softc(dev); in ata_promise_dmareset() local
436 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, in ata_promise_dmareset()
437 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); in ata_promise_dmareset()
438 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); in ata_promise_dmareset()
439 ch->flags &= ~ATA_DMA_ACTIVE; in ata_promise_dmareset()
447 struct ata_channel *ch = device_get_softc(dev); in ata_promise_setmode() local
448 int devno = (ch->unit << 1) + target; in ata_promise_setmode()
467 mode = min(mode, ctlr->chip->max_dma); in ata_promise_setmode()
469 switch (ctlr->chip->cfg1) { in ata_promise_setmode()
474 (ch->unit ? 1 << 11 : 1 << 10))) { in ata_promise_setmode()
481 ATA_IDX_OUTB(ch, ATA_BMDEVSPEC_0, 0x0b); in ata_promise_setmode()
483 ATA_IDX_INB(ch, ATA_BMDEVSPEC_1) & 0x04) { in ata_promise_setmode()
491 (ATA_INL(ctlr->r_res2, in ata_promise_setmode()
492 (ctlr->chip->cfg2 & PR_SX4X ? 0x000c0260 : 0x0260) + in ata_promise_setmode()
493 (ch->unit << 7)) & 0x01000000)) { in ata_promise_setmode()
500 if (ctlr->chip->cfg1 < PR_TX) in ata_promise_setmode()
502 timings[ata_mode2idx(mode)][ctlr->chip->cfg1], 4); in ata_promise_setmode()
509 struct ata_channel *ch = device_get_softc(dev); in ata_promise_tx2_ch_attach() local
514 ch->hw.status = ata_promise_tx2_status; in ata_promise_tx2_ch_attach()
515 ch->flags |= ATA_CHECKS_CABLE; in ata_promise_tx2_ch_attach()
522 struct ata_channel *ch = device_get_softc(dev); in ata_promise_tx2_status() local
524 ATA_IDX_OUTB(ch, ATA_BMDEVSPEC_0, 0x0b); in ata_promise_tx2_status()
525 if (ATA_IDX_INB(ch, ATA_BMDEVSPEC_1) & 0x20) { in ata_promise_tx2_status()
535 struct ata_channel *ch = device_get_softc(dev); in ata_promise_mio_ch_attach() local
536 int offset = (ctlr->chip->cfg2 & PR_SX4X) ? 0x000c0000 : 0; in ata_promise_mio_ch_attach()
542 ch->r_io[i].res = ctlr->r_res2; in ata_promise_mio_ch_attach()
543 ch->r_io[i].offset = offset + 0x0200 + (i << 2) + (ch->unit << 7); in ata_promise_mio_ch_attach()
545 ch->r_io[ATA_CONTROL].res = ctlr->r_res2; in ata_promise_mio_ch_attach()
546 ch->r_io[ATA_CONTROL].offset = offset + 0x0238 + (ch->unit << 7); in ata_promise_mio_ch_attach()
547 ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res2; in ata_promise_mio_ch_attach()
549 if ((ctlr->chip->cfg2 & (PR_SATA | PR_SATA2)) || in ata_promise_mio_ch_attach()
550 ((ctlr->chip->cfg2 & (PR_CMBO | PR_CMBO2)) && ch->unit < 2)) { in ata_promise_mio_ch_attach()
551 ch->r_io[ATA_SSTATUS].res = ctlr->r_res2; in ata_promise_mio_ch_attach()
552 ch->r_io[ATA_SSTATUS].offset = 0x400 + (ch->unit << 8); in ata_promise_mio_ch_attach()
553 ch->r_io[ATA_SERROR].res = ctlr->r_res2; in ata_promise_mio_ch_attach()
554 ch->r_io[ATA_SERROR].offset = 0x404 + (ch->unit << 8); in ata_promise_mio_ch_attach()
555 ch->r_io[ATA_SCONTROL].res = ctlr->r_res2; in ata_promise_mio_ch_attach()
556 ch->r_io[ATA_SCONTROL].offset = 0x408 + (ch->unit << 8); in ata_promise_mio_ch_attach()
557 ch->flags |= ATA_NO_SLAVE; in ata_promise_mio_ch_attach()
558 ch->flags |= ATA_SATA; in ata_promise_mio_ch_attach()
560 ch->flags |= ATA_USE_16BIT; in ata_promise_mio_ch_attach()
561 ch->flags |= ATA_CHECKS_CABLE; in ata_promise_mio_ch_attach()
564 if (ctlr->chip->cfg2 & PR_SX4X) { in ata_promise_mio_ch_attach()
565 ch->hw.command = ata_promise_sx4_command; in ata_promise_mio_ch_attach()
568 ch->hw.command = ata_promise_mio_command; in ata_promise_mio_ch_attach()
569 ch->hw.status = ata_promise_mio_status; in ata_promise_mio_ch_attach()
570 ch->hw.softreset = ata_promise_mio_softreset; in ata_promise_mio_ch_attach()
571 ch->hw.pm_read = ata_promise_mio_pm_read; in ata_promise_mio_ch_attach()
572 ch->hw.pm_write = ata_promise_mio_pm_write; in ata_promise_mio_ch_attach()
589 struct ata_channel *ch; in ata_promise_mio_intr() local
598 vector = ATA_INL(ctlr->r_res2, 0x040); in ata_promise_mio_intr()
599 ATA_OUTL(ctlr->r_res2, 0x040, vector); in ata_promise_mio_intr()
600 ctlr->chipset_data = (void *)(uintptr_t)vector; in ata_promise_mio_intr()
602 for (unit = 0; unit < ctlr->channels; unit++) { in ata_promise_mio_intr()
603 if ((ch = ctlr->interrupt[unit].argument)) in ata_promise_mio_intr()
604 ctlr->interrupt[unit].function(ch); in ata_promise_mio_intr()
607 ctlr->chipset_data = (void *)(uintptr_t)0xffffffff; in ata_promise_mio_intr()
614 struct ata_channel *ch = device_get_softc(dev); in ata_promise_mio_status() local
617 switch (ctlr->chip->cfg2) { in ata_promise_mio_status()
631 vector = (uint32_t)(uintptr_t)ctlr->chipset_data; in ata_promise_mio_status()
634 status = ATA_INL(ctlr->r_res2, stat_reg); in ata_promise_mio_status()
635 ATA_OUTL(ctlr->r_res2, stat_reg, status & (0x00000011 << ch->unit)); in ata_promise_mio_status()
638 if (status & (0x00000001 << ch->unit)) { in ata_promise_mio_status()
641 taskqueue_enqueue(taskqueue_thread, &ch->conntask); in ata_promise_mio_status()
645 if (status & (0x00000010 << ch->unit)) { in ata_promise_mio_status()
648 taskqueue_enqueue(taskqueue_thread, &ch->conntask); in ata_promise_mio_status()
652 return (vector & (1 << (ch->unit + 1))); in ata_promise_mio_status()
658 struct ata_pci_controller *ctlr=device_get_softc(device_get_parent(request->parent)); in ata_promise_mio_command()
659 struct ata_channel *ch = device_get_softc(request->parent); in ata_promise_mio_command() local
661 u_int32_t *wordp = (u_int32_t *)ch->dma.work; in ata_promise_mio_command()
663 ATA_OUTL(ctlr->r_res2, (ch->unit + 1) << 2, 0x00000001); in ata_promise_mio_command()
665 if ((ctlr->chip->cfg2 == PR_SATA2) || in ata_promise_mio_command()
666 ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2))) { in ata_promise_mio_command()
668 ATA_OUTB(ctlr->r_res2, 0x4e8 + (ch->unit << 8), request->unit & 0x0f); in ata_promise_mio_command()
672 switch (request->u.ata.command) { in ata_promise_mio_command()
678 wordp[0] = htole32(0x04 | ((ch->unit + 1) << 16) | (0x00 << 24)); in ata_promise_mio_command()
683 wordp[0] = htole32(0x00 | ((ch->unit + 1) << 16) | (0x00 << 24)); in ata_promise_mio_command()
686 wordp[1] = htole32(request->dma->sg_bus); in ata_promise_mio_command()
690 ATA_OUTL(ctlr->r_res2, 0x0240 + (ch->unit << 7), ch->dma.work_bus); in ata_promise_mio_command()
698 struct ata_channel *ch = device_get_softc(dev); in ata_promise_mio_reset() local
701 switch (ctlr->chip->cfg2) { in ata_promise_mio_reset()
705 hpktp = ctlr->chipset_data; in ata_promise_mio_reset()
706 ATA_OUTL(ctlr->r_res2, 0xc0260 + (ch->unit << 7), ch->unit + 1); in ata_promise_mio_reset()
708 ATA_OUTL(ctlr->r_res2, 0xc0260 + (ch->unit << 7), in ata_promise_mio_reset()
709 (ATA_INL(ctlr->r_res2, 0xc0260 + (ch->unit << 7)) & in ata_promise_mio_reset()
710 ~0x00003f9f) | (ch->unit + 1)); in ata_promise_mio_reset()
713 mtx_lock(&hpktp->mtx); in ata_promise_mio_reset()
714 ATA_OUTL(ctlr->r_res2, 0xc012c, in ata_promise_mio_reset()
715 (ATA_INL(ctlr->r_res2, 0xc012c) & ~0x00000f9f) | (1 << 11)); in ata_promise_mio_reset()
717 ATA_OUTL(ctlr->r_res2, 0xc012c, in ata_promise_mio_reset()
718 (ATA_INL(ctlr->r_res2, 0xc012c) & ~0x00000f9f)); in ata_promise_mio_reset()
719 hpktp->busy = 0; in ata_promise_mio_reset()
720 mtx_unlock(&hpktp->mtx); in ata_promise_mio_reset()
727 if ((ctlr->chip->cfg2 == PR_SATA) || in ata_promise_mio_reset()
728 ((ctlr->chip->cfg2 == PR_CMBO) && (ch->unit < 2))) { in ata_promise_mio_reset()
730 ATA_OUTL(ctlr->r_res2, 0x06c, (0x00110000 << ch->unit)); in ata_promise_mio_reset()
734 ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7), (1 << 11)); in ata_promise_mio_reset()
736 ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7), in ata_promise_mio_reset()
737 (ATA_INL(ctlr->r_res2, 0x0260 + (ch->unit << 7)) & in ata_promise_mio_reset()
738 ~0x00003f9f) | (ch->unit + 1)); in ata_promise_mio_reset()
740 if ((ctlr->chip->cfg2 == PR_SATA) || in ata_promise_mio_reset()
741 ((ctlr->chip->cfg2 == PR_CMBO) && (ch->unit < 2))) { in ata_promise_mio_reset()
742 if (ata_sata_phy_reset(dev, -1, 1)) in ata_promise_mio_reset()
745 ch->devices = 0; in ata_promise_mio_reset()
748 ATA_OUTL(ctlr->r_res2, 0x06c, (0x00000011 << ch->unit)); in ata_promise_mio_reset()
756 if ((ctlr->chip->cfg2 == PR_SATA2) || in ata_promise_mio_reset()
757 ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2))) { in ata_promise_mio_reset()
759 //ATA_OUTL(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x0f); in ata_promise_mio_reset()
762 ATA_OUTL(ctlr->r_res2, 0x060, (0x00110000 << ch->unit)); in ata_promise_mio_reset()
766 ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7), (1 << 11)); in ata_promise_mio_reset()
768 ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7), in ata_promise_mio_reset()
769 (ATA_INL(ctlr->r_res2, 0x0260 + (ch->unit << 7)) & in ata_promise_mio_reset()
770 ~0x00003f9f) | (ch->unit + 1)); in ata_promise_mio_reset()
772 if ((ctlr->chip->cfg2 == PR_SATA2) || in ata_promise_mio_reset()
773 ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2))) { in ata_promise_mio_reset()
775 ATA_OUTL(ctlr->r_res2, 0x414 + (ch->unit << 8), in ata_promise_mio_reset()
776 (ATA_INL(ctlr->r_res2, 0x414 + (ch->unit << 8)) & in ata_promise_mio_reset()
779 if (ata_sata_phy_reset(dev, -1, 1)) { in ata_promise_mio_reset()
780 u_int32_t signature = ch->hw.softreset(dev, ATA_PM); in ata_promise_mio_reset()
787 ch->devices = ATA_ATA_MASTER; in ata_promise_mio_reset()
790 ch->devices = ATA_PORTMULTIPLIER; in ata_promise_mio_reset()
794 ch->devices = ATA_ATAPI_MASTER; in ata_promise_mio_reset()
800 ch->devices = ATA_ATA_MASTER; in ata_promise_mio_reset()
804 ch->devices); in ata_promise_mio_reset()
807 ch->devices = 0; in ata_promise_mio_reset()
810 ATA_OUTL(ctlr->r_res2, 0x060, (0x00000011 << ch->unit)); in ata_promise_mio_reset()
813 ATA_OUTL(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x00); in ata_promise_mio_reset()
825 struct ata_channel *ch = device_get_softc(dev); in ata_promise_mio_pm_read() local
829 *result = ATA_IDX_INL(ch, reg); in ata_promise_mio_pm_read()
848 ATA_OUTB(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x0f); in ata_promise_mio_pm_read()
850 ATA_IDX_OUTB(ch, ATA_FEATURE, reg); in ata_promise_mio_pm_read()
851 ATA_IDX_OUTB(ch, ATA_DRIVE, port); in ata_promise_mio_pm_read()
853 ATA_IDX_OUTB(ch, ATA_COMMAND, ATA_READ_PM); in ata_promise_mio_pm_read()
856 u_int8_t status = ATA_IDX_INB(ch, ATA_STATUS); in ata_promise_mio_pm_read()
865 *result = ATA_IDX_INB(ch, ATA_COUNT) | in ata_promise_mio_pm_read()
866 (ATA_IDX_INB(ch, ATA_SECTOR) << 8) | in ata_promise_mio_pm_read()
867 (ATA_IDX_INB(ch, ATA_CYL_LSB) << 16) | in ata_promise_mio_pm_read()
868 (ATA_IDX_INB(ch, ATA_CYL_MSB) << 24); in ata_promise_mio_pm_read()
876 struct ata_channel *ch = device_get_softc(dev); in ata_promise_mio_pm_write() local
880 ATA_IDX_OUTL(ch, reg, value); in ata_promise_mio_pm_write()
899 ATA_OUTB(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x0f); in ata_promise_mio_pm_write()
901 ATA_IDX_OUTB(ch, ATA_FEATURE, reg); in ata_promise_mio_pm_write()
902 ATA_IDX_OUTB(ch, ATA_DRIVE, port); in ata_promise_mio_pm_write()
903 ATA_IDX_OUTB(ch, ATA_COUNT, value & 0xff); in ata_promise_mio_pm_write()
904 ATA_IDX_OUTB(ch, ATA_SECTOR, (value >> 8) & 0xff); in ata_promise_mio_pm_write()
905 ATA_IDX_OUTB(ch, ATA_CYL_LSB, (value >> 16) & 0xff); in ata_promise_mio_pm_write()
906 ATA_IDX_OUTB(ch, ATA_CYL_MSB, (value >> 24) & 0xff); in ata_promise_mio_pm_write()
908 ATA_IDX_OUTB(ch, ATA_COMMAND, ATA_WRITE_PM); in ata_promise_mio_pm_write()
911 u_int8_t status = ATA_IDX_INB(ch, ATA_STATUS); in ata_promise_mio_pm_write()
920 return ATA_IDX_INB(ch, ATA_ERROR); in ata_promise_mio_pm_write()
928 struct ata_channel *ch = device_get_softc(dev); in ata_promise_mio_softreset() local
932 ATA_OUTB(ctlr->r_res2, 0x4e8 + (ch->unit << 8), port & 0x0f); in ata_promise_mio_softreset()
935 ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_D_LBA | ATA_DEV(ATA_MASTER)); in ata_promise_mio_softreset()
937 ATA_IDX_OUTB(ch, ATA_CONTROL, ATA_A_IDS | ATA_A_RESET); in ata_promise_mio_softreset()
939 ATA_IDX_OUTB(ch, ATA_CONTROL, ATA_A_IDS); in ata_promise_mio_softreset()
941 ATA_IDX_INB(ch, ATA_ERROR); in ata_promise_mio_softreset()
947 /* err = */ ATA_IDX_INB(ch, ATA_ERROR); in ata_promise_mio_softreset()
948 stat = ATA_IDX_INB(ch, ATA_STATUS); in ata_promise_mio_softreset()
955 return ATA_IDX_INB(ch, ATA_COUNT) | in ata_promise_mio_softreset()
956 (ATA_IDX_INB(ch, ATA_SECTOR) << 8) | in ata_promise_mio_softreset()
957 (ATA_IDX_INB(ch, ATA_CYL_LSB) << 16) | in ata_promise_mio_softreset()
958 (ATA_IDX_INB(ch, ATA_CYL_MSB) << 24); in ata_promise_mio_softreset()
969 return -1; in ata_promise_mio_softreset()
975 struct ata_channel *ch = device_get_softc(dev); in ata_promise_mio_dmainit() local
978 ch->dma.setprd = ata_promise_mio_setprd; in ata_promise_mio_dmainit()
979 ch->dma.max_iosize = 65536; in ata_promise_mio_dmainit()
988 struct ata_dma_prdentry *prd = args->dmatab; in ata_promise_mio_setprd()
991 if ((args->error = error)) in ata_promise_mio_setprd()
998 if (segs[i - 1].ds_len > MAXLASTSGSIZE) { in ata_promise_mio_setprd()
999 //printf("split last SG element of %u\n", segs[i - 1].ds_len); in ata_promise_mio_setprd()
1000 prd[i - 1].count = htole32(segs[i - 1].ds_len - MAXLASTSGSIZE); in ata_promise_mio_setprd()
1002 prd[i].addr = htole32(segs[i - 1].ds_addr + in ata_promise_mio_setprd()
1003 (segs[i - 1].ds_len - MAXLASTSGSIZE)); in ata_promise_mio_setprd()
1007 prd[i - 1].count |= htole32(ATA_DMA_EOT); in ata_promise_mio_setprd()
1009 args->nsegs = nsegs; in ata_promise_mio_setprd()
1016 struct ata_channel *ch = device_get_softc(dev); in ata_promise_mio_setmode() local
1018 if ( (ctlr->chip->cfg2 == PR_SATA) || in ata_promise_mio_setmode()
1019 ((ctlr->chip->cfg2 == PR_CMBO) && (ch->unit < 2)) || in ata_promise_mio_setmode()
1020 (ctlr->chip->cfg2 == PR_SATA2) || in ata_promise_mio_setmode()
1021 ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2))) in ata_promise_mio_setmode()
1032 struct ata_channel *ch = device_get_softc(dev); in ata_promise_mio_getrev() local
1034 if ( (ctlr->chip->cfg2 == PR_SATA) || in ata_promise_mio_getrev()
1035 ((ctlr->chip->cfg2 == PR_CMBO) && (ch->unit < 2)) || in ata_promise_mio_getrev()
1036 (ctlr->chip->cfg2 == PR_SATA2) || in ata_promise_mio_getrev()
1037 ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2))) in ata_promise_mio_getrev()
1047 struct ata_channel *ch; in ata_promise_sx4_intr() local
1048 u_int32_t vector = ATA_INL(ctlr->r_res2, 0x000c0480); in ata_promise_sx4_intr()
1051 for (unit = 0; unit < ctlr->channels; unit++) { in ata_promise_sx4_intr()
1053 if ((ch = ctlr->interrupt[unit].argument)) in ata_promise_sx4_intr()
1054 ctlr->interrupt[unit].function(ch); in ata_promise_sx4_intr()
1056 if ((ch = ctlr->interrupt[unit].argument)) in ata_promise_sx4_intr()
1058 htole32((ch->unit * ATA_PDC_CHN_OFFSET) + in ata_promise_sx4_intr()
1062 if ((ch = ctlr->interrupt[unit].argument)) in ata_promise_sx4_intr()
1063 ctlr->interrupt[unit].function(ch); in ata_promise_sx4_intr()
1067 if ((ch = ctlr->interrupt[unit].argument)) in ata_promise_sx4_intr()
1068 ATA_OUTL(ctlr->r_res2, 0x000c0240 + (ch->unit << 7), in ata_promise_sx4_intr()
1069 htole32((ch->unit * ATA_PDC_CHN_OFFSET) + in ata_promise_sx4_intr()
1078 device_t gparent = device_get_parent(request->parent); in ata_promise_sx4_command()
1080 struct ata_channel *ch = device_get_softc(request->parent); in ata_promise_sx4_command() local
1082 caddr_t window = rman_get_virtual(ctlr->r_res1); in ata_promise_sx4_command()
1087 switch (request->u.ata.command) { in ata_promise_sx4_command()
1090 return -1; in ata_promise_sx4_command()
1101 ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit + 1) << 2), 0x00000001); in ata_promise_sx4_command()
1110 (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_APKT_OFFSET); in ata_promise_sx4_command()
1111 wordp[0] = htole32(0x08 | ((ch->unit + 1)<<16) | (0x00 << 24)); in ata_promise_sx4_command()
1115 ATA_OUTL(ctlr->r_res2, 0x000c0484, 0x00000001); in ata_promise_sx4_command()
1116 ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit + 1) << 2), 0x00000001); in ata_promise_sx4_command()
1117 ATA_OUTL(ctlr->r_res2, 0x000c0240 + (ch->unit << 7), in ata_promise_sx4_command()
1118 htole32((ch->unit * ATA_PDC_CHN_OFFSET)+ATA_PDC_APKT_OFFSET)); in ata_promise_sx4_command()
1125 prd = request->dma->sg; in ata_promise_sx4_command()
1127 (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_HSG_OFFSET); in ata_promise_sx4_command()
1135 (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_LSG_OFFSET); in ata_promise_sx4_command()
1136 wordp[0] = htole32((ch->unit * ATA_PDC_BUF_OFFSET) + ATA_PDC_BUF_BASE); in ata_promise_sx4_command()
1137 wordp[1] = htole32(request->bytecount | ATA_DMA_EOT); in ata_promise_sx4_command()
1140 (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_ASG_OFFSET); in ata_promise_sx4_command()
1141 wordp[0] = htole32((ch->unit * ATA_PDC_BUF_OFFSET) + ATA_PDC_BUF_BASE); in ata_promise_sx4_command()
1142 wordp[1] = htole32(request->bytecount | ATA_DMA_EOT); in ata_promise_sx4_command()
1145 (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_HPKT_OFFSET); in ata_promise_sx4_command()
1146 if (request->flags & ATA_R_READ) in ata_promise_sx4_command()
1147 wordp[0] = htole32(0x14 | ((ch->unit+9)<<16) | ((ch->unit+5)<<24)); in ata_promise_sx4_command()
1148 if (request->flags & ATA_R_WRITE) in ata_promise_sx4_command()
1149 wordp[0] = htole32(0x00 | ((ch->unit+13)<<16) | (0x00<<24)); in ata_promise_sx4_command()
1150 wordp[1] = htole32((ch->unit * ATA_PDC_CHN_OFFSET)+ATA_PDC_HSG_OFFSET); in ata_promise_sx4_command()
1151 wordp[2] = htole32((ch->unit * ATA_PDC_CHN_OFFSET)+ATA_PDC_LSG_OFFSET); in ata_promise_sx4_command()
1155 (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_APKT_OFFSET); in ata_promise_sx4_command()
1156 if (request->flags & ATA_R_READ) in ata_promise_sx4_command()
1157 wordp[0] = htole32(0x04 | ((ch->unit+5)<<16) | (0x00<<24)); in ata_promise_sx4_command()
1158 if (request->flags & ATA_R_WRITE) in ata_promise_sx4_command()
1159 wordp[0] = htole32(0x10 | ((ch->unit+1)<<16) | ((ch->unit+13)<<24)); in ata_promise_sx4_command()
1160 wordp[1] = htole32((ch->unit * ATA_PDC_CHN_OFFSET)+ATA_PDC_ASG_OFFSET); in ata_promise_sx4_command()
1163 ATA_OUTL(ctlr->r_res2, 0x000c0484, 0x00000001); in ata_promise_sx4_command()
1165 if (request->flags & ATA_R_READ) { in ata_promise_sx4_command()
1166 ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit+5)<<2), 0x00000001); in ata_promise_sx4_command()
1167 ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit+9)<<2), 0x00000001); in ata_promise_sx4_command()
1168 ATA_OUTL(ctlr->r_res2, 0x000c0240 + (ch->unit << 7), in ata_promise_sx4_command()
1169 htole32((ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_APKT_OFFSET)); in ata_promise_sx4_command()
1171 if (request->flags & ATA_R_WRITE) { in ata_promise_sx4_command()
1172 ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit+1)<<2), 0x00000001); in ata_promise_sx4_command()
1173 ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit+13)<<2), 0x00000001); in ata_promise_sx4_command()
1175 htole32((ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_HPKT_OFFSET)); in ata_promise_sx4_command()
1187 bytep[i++] = ATA_D_IBM | ATA_D_LBA | ATA_DEV(request->unit); in ata_promise_apkt()
1191 if (request->flags & ATA_R_48BIT) { in ata_promise_apkt()
1193 bytep[i++] = request->u.ata.feature >> 8; in ata_promise_apkt()
1194 bytep[i++] = request->u.ata.feature; in ata_promise_apkt()
1196 bytep[i++] = request->u.ata.count >> 8; in ata_promise_apkt()
1197 bytep[i++] = request->u.ata.count; in ata_promise_apkt()
1199 bytep[i++] = request->u.ata.lba >> 24; in ata_promise_apkt()
1200 bytep[i++] = request->u.ata.lba; in ata_promise_apkt()
1202 bytep[i++] = request->u.ata.lba >> 32; in ata_promise_apkt()
1203 bytep[i++] = request->u.ata.lba >> 8; in ata_promise_apkt()
1205 bytep[i++] = request->u.ata.lba >> 40; in ata_promise_apkt()
1206 bytep[i++] = request->u.ata.lba >> 16; in ata_promise_apkt()
1208 bytep[i++] = ATA_D_LBA | ATA_DEV(request->unit); in ata_promise_apkt()
1212 bytep[i++] = request->u.ata.feature; in ata_promise_apkt()
1214 bytep[i++] = request->u.ata.count; in ata_promise_apkt()
1216 bytep[i++] = request->u.ata.lba; in ata_promise_apkt()
1218 bytep[i++] = request->u.ata.lba >> 8; in ata_promise_apkt()
1220 bytep[i++] = request->u.ata.lba >> 16; in ata_promise_apkt()
1222 bytep[i++] = ATA_D_LBA | ATA_D_IBM | ATA_DEV(request->unit) | in ata_promise_apkt()
1223 ((request->u.ata.lba >> 24)&0xf); in ata_promise_apkt()
1226 bytep[i++] = request->u.ata.command; in ata_promise_apkt()
1233 struct ata_promise_sx4 *hpktp = ctlr->chipset_data; in ata_promise_queue_hpkt()
1235 mtx_lock(&hpktp->mtx); in ata_promise_queue_hpkt()
1236 if (hpktp->busy) { in ata_promise_queue_hpkt()
1239 hp->addr = hpkt; in ata_promise_queue_hpkt()
1240 TAILQ_INSERT_TAIL(&hpktp->queue, hp, chain); in ata_promise_queue_hpkt()
1243 hpktp->busy = 1; in ata_promise_queue_hpkt()
1244 ATA_OUTL(ctlr->r_res2, 0x000c0100, hpkt); in ata_promise_queue_hpkt()
1246 mtx_unlock(&hpktp->mtx); in ata_promise_queue_hpkt()
1252 struct ata_promise_sx4 *hpktp = ctlr->chipset_data; in ata_promise_next_hpkt()
1255 mtx_lock(&hpktp->mtx); in ata_promise_next_hpkt()
1256 if ((hp = TAILQ_FIRST(&hpktp->queue))) { in ata_promise_next_hpkt()
1257 TAILQ_REMOVE(&hpktp->queue, hp, chain); in ata_promise_next_hpkt()
1258 ATA_OUTL(ctlr->r_res2, 0x000c0100, hp->addr); in ata_promise_next_hpkt()
1262 hpktp->busy = 0; in ata_promise_next_hpkt()
1263 mtx_unlock(&hpktp->mtx); in ata_promise_next_hpkt()