Lines Matching +full:lynx +full:- +full:pcs
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
48 #include <dev/ata/ata-all.h>
49 #include <dev/ata/ata-pci.h>
93 &((struct ata_intel_data *)((ctlr)->chipset_data))->smap[(ch)->unit * 2]
95 mtx_lock(&((struct ata_intel_data *)((ctlr)->chipset_data))->lock)
97 mtx_unlock(&((struct ata_intel_data *)((ctlr)->chipset_data))->lock)
154 { ATA_IBP_S4, 0, INTEL_6CH, 0, ATA_SA300, "Ibex Peak-M" }, in ata_intel_probe()
155 { ATA_IBP_S5, 0, INTEL_6CH2, 0, ATA_SA300, "Ibex Peak-M" }, in ata_intel_probe()
156 { ATA_IBP_S6, 0, INTEL_6CH, 0, ATA_SA300, "Ibex Peak-M" }, in ata_intel_probe()
171 { ATA_LPT_S1, 0, INTEL_6CH, 0, ATA_SA600, "Lynx Point" }, in ata_intel_probe()
172 { ATA_LPT_S2, 0, INTEL_6CH, 0, ATA_SA600, "Lynx Point" }, in ata_intel_probe()
173 { ATA_LPT_S3, 0, INTEL_6CH2, 0, ATA_SA600, "Lynx Point" }, in ata_intel_probe()
174 { ATA_LPT_S4, 0, INTEL_6CH2, 0, ATA_SA600, "Lynx Point" }, in ata_intel_probe()
183 { ATA_LPTLP_S1, 0, INTEL_6CH, 0, ATA_SA600, "Lynx Point-LP" }, in ata_intel_probe()
184 { ATA_LPTLP_S2, 0, INTEL_6CH, 0, ATA_SA600, "Lynx Point-LP" }, in ata_intel_probe()
185 { ATA_LPTLP_S3, 0, INTEL_6CH2, 0, ATA_SA300, "Lynx Point-LP" }, in ata_intel_probe()
186 { ATA_LPTLP_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Lynx Point-LP" }, in ata_intel_probe()
198 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_intel_probe()
202 ctlr->chipinit = ata_intel_chipinit; in ata_intel_probe()
203 ctlr->chipdeinit = ata_intel_chipdeinit; in ata_intel_probe()
217 mtx_init(&data->lock, "Intel SATA lock", NULL, MTX_DEF); in ata_intel_chipinit()
218 ctlr->chipset_data = (void *)data; in ata_intel_chipinit()
221 if (ctlr->chip->chipid == ATA_I82371FB) { in ata_intel_chipinit()
222 ctlr->setmode = ata_intel_old_setmode; in ata_intel_chipinit()
226 else if (ctlr->chip->chipid == ATA_I31244) { in ata_intel_chipinit()
228 ctlr->r_type2 = SYS_RES_MEMORY; in ata_intel_chipinit()
229 ctlr->r_rid2 = PCIR_BAR(0); in ata_intel_chipinit()
230 if (!(ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, in ata_intel_chipinit()
231 &ctlr->r_rid2, in ata_intel_chipinit()
234 ctlr->channels = 4; in ata_intel_chipinit()
235 ctlr->ch_attach = ata_intel_31244_ch_attach; in ata_intel_chipinit()
236 ctlr->ch_detach = ata_intel_31244_ch_detach; in ata_intel_chipinit()
237 ctlr->reset = ata_intel_31244_reset; in ata_intel_chipinit()
239 ctlr->setmode = ata_sata_setmode; in ata_intel_chipinit()
240 ctlr->getrev = ata_sata_getrev; in ata_intel_chipinit()
243 else if (ctlr->chip->chipid == ATA_ISCH) { in ata_intel_chipinit()
244 ctlr->channels = 1; in ata_intel_chipinit()
245 ctlr->ch_attach = ata_intel_ch_attach; in ata_intel_chipinit()
246 ctlr->ch_detach = ata_pci_ch_detach; in ata_intel_chipinit()
247 ctlr->setmode = ata_intel_sch_setmode; in ata_intel_chipinit()
250 else if (ctlr->chip->max_dma < ATA_SA150) { in ata_intel_chipinit()
251 ctlr->channels = ctlr->chip->cfg2; in ata_intel_chipinit()
252 ctlr->ch_attach = ata_intel_ch_attach; in ata_intel_chipinit()
253 ctlr->ch_detach = ata_pci_ch_detach; in ata_intel_chipinit()
254 ctlr->setmode = ata_intel_new_setmode; in ata_intel_chipinit()
262 ctlr->ch_attach = ata_intel_ch_attach; in ata_intel_chipinit()
263 ctlr->ch_detach = ata_pci_ch_detach; in ata_intel_chipinit()
264 ctlr->reset = ata_intel_reset; in ata_intel_chipinit()
267 if ((ctlr->chip->cfg1 & INTEL_ICH7)) { in ata_intel_chipinit()
268 ctlr->r_type2 = SYS_RES_MEMORY; in ata_intel_chipinit()
269 ctlr->r_rid2 = PCIR_BAR(5); in ata_intel_chipinit()
270 ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, in ata_intel_chipinit()
271 &ctlr->r_rid2, RF_ACTIVE); in ata_intel_chipinit()
272 if (ctlr->r_res2 != NULL) { in ata_intel_chipinit()
277 ATA_OUTL(ctlr->r_res2, 0x0C, in ata_intel_chipinit()
278 ATA_INL(ctlr->r_res2, 0x0C) | 0xf); in ata_intel_chipinit()
281 } else if (ctlr->chip->chipid != ATA_I82801HBM_S1 || in ata_intel_chipinit()
283 ctlr->r_type2 = SYS_RES_IOPORT; in ata_intel_chipinit()
284 ctlr->r_rid2 = PCIR_BAR(5); in ata_intel_chipinit()
285 ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, in ata_intel_chipinit()
286 &ctlr->r_rid2, RF_ACTIVE); in ata_intel_chipinit()
288 if (ctlr->r_res2 != NULL || in ata_intel_chipinit()
289 (ctlr->chip->cfg1 & INTEL_ICH5)) in ata_intel_chipinit()
290 ctlr->getrev = ata_intel_sata_getrev; in ata_intel_chipinit()
291 ctlr->setmode = ata_sata_setmode; in ata_intel_chipinit()
302 data = ctlr->chipset_data; in ata_intel_chipdeinit()
303 mtx_destroy(&data->lock); in ata_intel_chipdeinit()
305 ctlr->chipset_data = NULL; in ata_intel_chipdeinit()
325 if (ctlr->r_res2) { in ata_intel_ch_attach()
326 ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res2; in ata_intel_ch_attach()
327 ch->r_io[ATA_IDX_ADDR].offset = 0x00; in ata_intel_ch_attach()
328 ch->r_io[ATA_IDX_DATA].res = ctlr->r_res2; in ata_intel_ch_attach()
329 ch->r_io[ATA_IDX_DATA].offset = 0x04; in ata_intel_ch_attach()
332 ch->flags |= ATA_ALWAYS_DMASTAT; in ata_intel_ch_attach()
333 if (ctlr->chip->max_dma >= ATA_SA150) { in ata_intel_ch_attach()
336 if (ctlr->chip->cfg1 & INTEL_ICH5) { in ata_intel_ch_attach()
339 ch->flags |= ATA_SATA; in ata_intel_ch_attach()
340 ch->flags |= ATA_NO_SLAVE; in ata_intel_ch_attach()
341 smap[0] = (map & 0x01) ^ ch->unit; in ata_intel_ch_attach()
343 } else if ((map & 0x02) == 0 && ch->unit == 0) { in ata_intel_ch_attach()
344 ch->flags |= ATA_SATA; in ata_intel_ch_attach()
347 } else if ((map & 0x02) != 0 && ch->unit == 1) { in ata_intel_ch_attach()
348 ch->flags |= ATA_SATA; in ata_intel_ch_attach()
352 } else if (ctlr->chip->cfg1 & INTEL_6CH2) { in ata_intel_ch_attach()
353 ch->flags |= ATA_SATA; in ata_intel_ch_attach()
354 ch->flags |= ATA_NO_SLAVE; in ata_intel_ch_attach()
355 smap[0] = (ch->unit == 0) ? 0 : 1; in ata_intel_ch_attach()
360 ch->flags |= ATA_SATA; in ata_intel_ch_attach()
361 smap[0] = (ch->unit == 0) ? 0 : 1; in ata_intel_ch_attach()
362 smap[1] = (ch->unit == 0) ? 2 : 3; in ata_intel_ch_attach()
363 } else if (map == 0x02 && ch->unit == 0) { in ata_intel_ch_attach()
364 ch->flags |= ATA_SATA; in ata_intel_ch_attach()
367 } else if (map == 0x01 && ch->unit == 1) { in ata_intel_ch_attach()
368 ch->flags |= ATA_SATA; in ata_intel_ch_attach()
373 if (ch->flags & ATA_SATA) { in ata_intel_ch_attach()
374 if ((ctlr->chip->cfg1 & INTEL_ICH5)) { in ata_intel_ch_attach()
375 ch->hw.pm_read = ata_intel_sata_cscr_read; in ata_intel_ch_attach()
376 ch->hw.pm_write = ata_intel_sata_cscr_write; in ata_intel_ch_attach()
377 } else if (ctlr->r_res2) { in ata_intel_ch_attach()
378 if ((ctlr->chip->cfg1 & INTEL_ICH7)) { in ata_intel_ch_attach()
379 ch->hw.pm_read = ata_intel_sata_ahci_read; in ata_intel_ch_attach()
380 ch->hw.pm_write = ata_intel_sata_ahci_write; in ata_intel_ch_attach()
382 ch->hw.pm_read = ata_intel_sata_sidpr_read; in ata_intel_ch_attach()
383 ch->hw.pm_write = ata_intel_sata_sidpr_write; in ata_intel_ch_attach()
386 if (ch->hw.pm_write != NULL) { in ata_intel_ch_attach()
387 ch->flags |= ATA_PERIODIC_POLL; in ata_intel_ch_attach()
388 ch->hw.status = ata_intel_sata_status; in ata_intel_ch_attach()
391 if ((ch->flags & ATA_NO_SLAVE) == 0) { in ata_intel_ch_attach()
397 ctlr->setmode = ata_intel_new_setmode; in ata_intel_ch_attach()
398 if (ctlr->chip->max_dma >= ATA_SA600) in ata_intel_ch_attach()
399 ch->flags |= ATA_USE_16BIT; in ata_intel_ch_attach()
400 } else if (ctlr->chip->chipid != ATA_ISCH) in ata_intel_ch_attach()
401 ch->flags |= ATA_CHECKS_CABLE; in ata_intel_ch_attach()
413 uint16_t pcs; in ata_intel_reset() local
416 if ((ch->flags & ATA_SATA) == 0) in ata_intel_reset()
419 /* Do hard-reset on respective SATA ports. */ in ata_intel_reset()
422 if ((ch->flags & ATA_NO_SLAVE) == 0) in ata_intel_reset()
431 if (ctlr->chip->cfg1 & (INTEL_6CH | INTEL_6CH2)) in ata_intel_reset()
436 pcs = (pci_read_config(parent, 0x92, 2) >> pshift) & mask; in ata_intel_reset()
437 if ((pcs == mask) && (ATA_IDX_INB(ch, ATA_STATUS) != 0xff)) in ata_intel_reset()
443 device_printf(dev, "SATA reset: ports status=0x%02x\n", pcs); in ata_intel_reset()
444 /* If any device found, do soft-reset. */ in ata_intel_reset()
445 if (ch->hw.pm_read != NULL) { in ata_intel_reset()
447 if ((ch->flags & ATA_NO_SLAVE) == 0) in ata_intel_reset()
451 devs = (pcs & (1 << smap[0])) ? ATA_ATA_MASTER : 0; in ata_intel_reset()
452 if ((ch->flags & ATA_NO_SLAVE) == 0) in ata_intel_reset()
453 devs |= (pcs & (1 << smap[1])) ? in ata_intel_reset()
459 ch->devices &= (devs | (devs * ATA_ATAPI_MASTER)); in ata_intel_reset()
461 ch->devices = 0; in ata_intel_reset()
470 mode = min(mode, ctlr->chip->max_dma); in ata_intel_old_setmode()
480 int devno = (ch->unit << 1) + target; in ata_intel_new_setmode()
495 if (ch->flags & ATA_SATA) in ata_intel_new_setmode()
498 mode = min(mode, ctlr->chip->max_dma); in ata_intel_new_setmode()
536 if (ch->unit) { in ata_intel_new_setmode()
556 mode = min(mode, ctlr->chip->max_dma); in ata_intel_sch_setmode()
593 if ((ch->flags & ATA_NO_SLAVE) == 0) in ata_intel_sata_status()
627 *result = ATA_INL(ctlr->r_res2, offset + reg); in ata_intel_sata_ahci_read()
690 ATA_IDX_OUTL(ch, ATA_IDX_ADDR, ((ch->unit * 2 + port) << 8) + reg); in ata_intel_sata_sidpr_read()
724 ATA_OUTL(ctlr->r_res2, offset + reg, value); in ata_intel_sata_ahci_write()
787 ATA_IDX_OUTL(ch, ATA_IDX_ADDR, ((ch->unit * 2 + port) << 8) + reg); in ata_intel_sata_sidpr_write()
800 port = (ch->flags & ATA_NO_SLAVE) ? 0 : 1; in ata_intel_sata_sidpr_test()
801 for (; port >= 0; port--) { in ata_intel_sata_sidpr_test()
829 ch_offset = 0x200 + ch->unit * 0x200; in ata_intel_31244_ch_attach()
832 ch->r_io[i].res = ctlr->r_res2; in ata_intel_31244_ch_attach()
835 ch->r_io[ATA_DATA].offset = ch_offset + 0x00; in ata_intel_31244_ch_attach()
836 ch->r_io[ATA_FEATURE].offset = ch_offset + 0x06; in ata_intel_31244_ch_attach()
837 ch->r_io[ATA_COUNT].offset = ch_offset + 0x08; in ata_intel_31244_ch_attach()
838 ch->r_io[ATA_SECTOR].offset = ch_offset + 0x0c; in ata_intel_31244_ch_attach()
839 ch->r_io[ATA_CYL_LSB].offset = ch_offset + 0x10; in ata_intel_31244_ch_attach()
840 ch->r_io[ATA_CYL_MSB].offset = ch_offset + 0x14; in ata_intel_31244_ch_attach()
841 ch->r_io[ATA_DRIVE].offset = ch_offset + 0x18; in ata_intel_31244_ch_attach()
842 ch->r_io[ATA_COMMAND].offset = ch_offset + 0x1d; in ata_intel_31244_ch_attach()
843 ch->r_io[ATA_ERROR].offset = ch_offset + 0x04; in ata_intel_31244_ch_attach()
844 ch->r_io[ATA_STATUS].offset = ch_offset + 0x1c; in ata_intel_31244_ch_attach()
845 ch->r_io[ATA_ALTSTAT].offset = ch_offset + 0x28; in ata_intel_31244_ch_attach()
846 ch->r_io[ATA_CONTROL].offset = ch_offset + 0x29; in ata_intel_31244_ch_attach()
849 ch->r_io[ATA_SSTATUS].offset = ch_offset + 0x100; in ata_intel_31244_ch_attach()
850 ch->r_io[ATA_SERROR].offset = ch_offset + 0x104; in ata_intel_31244_ch_attach()
851 ch->r_io[ATA_SCONTROL].offset = ch_offset + 0x108; in ata_intel_31244_ch_attach()
854 ch->r_io[ATA_BMCMD_PORT].offset = ch_offset + 0x70; in ata_intel_31244_ch_attach()
855 ch->r_io[ATA_BMSTAT_PORT].offset = ch_offset + 0x72; in ata_intel_31244_ch_attach()
856 ch->r_io[ATA_BMDTP_PORT].offset = ch_offset + 0x74; in ata_intel_31244_ch_attach()
858 ch->flags |= ATA_NO_SLAVE; in ata_intel_31244_ch_attach()
859 ch->flags |= ATA_SATA; in ata_intel_31244_ch_attach()
861 ch->hw.status = ata_intel_31244_status; in ata_intel_31244_ch_attach()
862 ch->hw.tf_write = ata_intel_31244_tf_write; in ata_intel_31244_ch_attach()
865 ATA_OUTL(ctlr->r_res2, 0x4, in ata_intel_31244_ch_attach()
866 ATA_INL(ctlr->r_res2, 0x04) | (0x01 << (ch->unit << 3))); in ata_intel_31244_ch_attach()
882 ata_sata_phy_check_events(dev, -1); in ata_intel_31244_status()
891 struct ata_channel *ch = device_get_softc(request->parent); in ata_intel_31244_tf_write()
893 if (request->flags & ATA_R_48BIT) { in ata_intel_31244_tf_write()
894 ATA_IDX_OUTW(ch, ATA_FEATURE, request->u.ata.feature); in ata_intel_31244_tf_write()
895 ATA_IDX_OUTW(ch, ATA_COUNT, request->u.ata.count); in ata_intel_31244_tf_write()
896 ATA_IDX_OUTW(ch, ATA_SECTOR, ((request->u.ata.lba >> 16) & 0xff00) | in ata_intel_31244_tf_write()
897 (request->u.ata.lba & 0x00ff)); in ata_intel_31244_tf_write()
898 ATA_IDX_OUTW(ch, ATA_CYL_LSB, ((request->u.ata.lba >> 24) & 0xff00) | in ata_intel_31244_tf_write()
899 ((request->u.ata.lba >> 8) & 0x00ff)); in ata_intel_31244_tf_write()
900 ATA_IDX_OUTW(ch, ATA_CYL_MSB, ((request->u.ata.lba >> 32) & 0xff00) | in ata_intel_31244_tf_write()
901 ((request->u.ata.lba >> 16) & 0x00ff)); in ata_intel_31244_tf_write()
902 ATA_IDX_OUTW(ch, ATA_DRIVE, ATA_D_LBA | ATA_DEV(request->unit)); in ata_intel_31244_tf_write()
905 ATA_IDX_OUTB(ch, ATA_FEATURE, request->u.ata.feature); in ata_intel_31244_tf_write()
906 ATA_IDX_OUTB(ch, ATA_COUNT, request->u.ata.count); in ata_intel_31244_tf_write()
907 ATA_IDX_OUTB(ch, ATA_SECTOR, request->u.ata.lba); in ata_intel_31244_tf_write()
908 ATA_IDX_OUTB(ch, ATA_CYL_LSB, request->u.ata.lba >> 8); in ata_intel_31244_tf_write()
909 ATA_IDX_OUTB(ch, ATA_CYL_MSB, request->u.ata.lba >> 16); in ata_intel_31244_tf_write()
911 ATA_D_IBM | ATA_D_LBA | ATA_DEV(request->unit) | in ata_intel_31244_tf_write()
912 ((request->u.ata.lba >> 24) & 0x0f)); in ata_intel_31244_tf_write()
921 if (ata_sata_phy_reset(dev, -1, 1)) in ata_intel_31244_reset()
924 ch->devices = 0; in ata_intel_31244_reset()