Lines Matching refs:u_int32_t
189 #define dma_addr_hi32(addr) (u_int32_t) ((addr>>16)>>16)
190 #define dma_addr_lo32(addr) (u_int32_t) (addr & 0xffffffff)
207 u_int32_t HeaderLength;
209 u_int32_t Timeout;
210 u_int32_t ControlCode;
211 u_int32_t ReturnCode;
212 u_int32_t Length;
510 u_int32_t resrved0[4]; /*0000 000F*/
511 u_int32_t inbound_msgaddr0; /*0010 0013*/
512 u_int32_t inbound_msgaddr1; /*0014 0017*/
513 u_int32_t outbound_msgaddr0; /*0018 001B*/
514 u_int32_t outbound_msgaddr1; /*001C 001F*/
515 u_int32_t inbound_doorbell; /*0020 0023*/
516 u_int32_t inbound_intstatus; /*0024 0027*/
517 u_int32_t inbound_intmask; /*0028 002B*/
518 u_int32_t outbound_doorbell; /*002C 002F*/
519 u_int32_t outbound_intstatus; /*0030 0033*/
520 u_int32_t outbound_intmask; /*0034 0037*/
521 u_int32_t reserved1[2]; /*0038 003F*/
522 u_int32_t inbound_queueport; /*0040 0043*/
523 u_int32_t outbound_queueport; /*0044 0047*/
524 u_int32_t reserved2[2]; /*0048 004F*/
525 u_int32_t reserved3[492]; /*0050 07FF ......local_buffer 492*/
526 u_int32_t reserved4[128]; /*0800 09FF 128*/
527 u_int32_t msgcode_rwbuffer[256]; /*0a00 0DFF 256*/
528 u_int32_t message_wbuffer[32]; /*0E00 0E7F 32*/
529 u_int32_t reserved5[32]; /*0E80 0EFF 32*/
530 u_int32_t message_rbuffer[32]; /*0F00 0F7F 32*/
531 u_int32_t reserved6[32]; /*0F80 0FFF 32*/
541 …u_int32_t iop2drv_doorbell; /*offset 0x00021870:00,01,02,03: window of "instruction flags…
542 u_int32_t iop2drv_doorbell_mask; /* 04,05,06,07: doorbell mask */
543 …u_int32_t drv2iop_doorbell; /* 08,09,10,11: window of "instruction flags…
544 u_int32_t drv2iop_doorbell_mask; /* 12,13,14,15: doorbell mask */
549 …u_int32_t drv2iop_doorbell; /*offset 0x00020400:00,01,02,03: window of "instruction flags…
550 u_int32_t drv2iop_doorbell_mask; /* 04,05,06,07: doorbell mask */
551 …u_int32_t iop2drv_doorbell; /* 08,09,10,11: window of "instruction flags…
552 u_int32_t iop2drv_doorbell_mask; /* 12,13,14,15: doorbell mask */
562 …u_int32_t msgcode_rwbuffer[256]; /*offset 0x0000fa00: 0, 1, 2, 3,...,1023: message co…
563 …u_int32_t message_wbuffer[32]; /*offset 0x0000fe00:1024,1025,1026,1027,...,1151: user space…
564 …u_int32_t message_reserved1[32]; /* 1152,1153,1154,1155,...,1279: message re…
565 …u_int32_t message_rbuffer[32]; /*offset 0x0000ff00:1280,1281,1282,1283,...,1407: iop data t…
574 u_int32_t post_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; /* post queue buffer for iop */
575 u_int32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; /* done queue buffer for iop */
592 u_int32_t message_unit_status; /*0000 0003*/
593 u_int32_t slave_error_attribute; /*0004 0007*/
594 u_int32_t slave_error_address; /*0008 000B*/
595 u_int32_t posted_outbound_doorbell; /*000C 000F*/
596 u_int32_t master_error_attribute; /*0010 0013*/
597 u_int32_t master_error_address_low; /*0014 0017*/
598 u_int32_t master_error_address_high; /*0018 001B*/
599 …u_int32_t hcb_size; /*001C 001F size of the PCIe window used for…
600 u_int32_t inbound_doorbell; /*0020 0023*/
601 u_int32_t diagnostic_rw_data; /*0024 0027*/
602 u_int32_t diagnostic_rw_address_low; /*0028 002B*/
603 u_int32_t diagnostic_rw_address_high; /*002C 002F*/
604 u_int32_t host_int_status; /*0030 0033 host interrupt status*/
605 u_int32_t host_int_mask; /*0034 0037 host interrupt mask*/
606 u_int32_t dcr_data; /*0038 003B*/
607 u_int32_t dcr_address; /*003C 003F*/
608 u_int32_t inbound_queueport; /*0040 0043 port32 host inbound queue port*/
609 u_int32_t outbound_queueport; /*0044 0047 port32 host outbound queue port*/
610 u_int32_t hcb_pci_address_low; /*0048 004B*/
611 u_int32_t hcb_pci_address_high; /*004C 004F*/
612 u_int32_t iop_int_status; /*0050 0053*/
613 u_int32_t iop_int_mask; /*0054 0057*/
614 u_int32_t iop_inbound_queue_port; /*0058 005B*/
615 u_int32_t iop_outbound_queue_port; /*005C 005F*/
616 …u_int32_t inbound_free_list_index; /*0060 0063 inbound free list producer consu…
617 …u_int32_t inbound_post_list_index; /*0064 0067 inbound post list producer consu…
618 …u_int32_t outbound_free_list_index; /*0068 006B outbound free list producer cons…
619 …u_int32_t outbound_post_list_index; /*006C 006F outbound post list producer cons…
620 u_int32_t inbound_doorbell_clear; /*0070 0073*/
621 u_int32_t i2o_message_unit_control; /*0074 0077*/
622 u_int32_t last_used_message_source_address_low; /*0078 007B*/
623 u_int32_t last_used_message_source_address_high; /*007C 007F*/
624 …u_int32_t pull_mode_data_byte_count[4]; /*0080 008F pull mode data byte count0..coun…
625 u_int32_t message_dest_address_index; /*0090 0093*/
626 u_int32_t done_queue_not_empty_int_counter_timer; /*0094 0097*/
627 u_int32_t utility_A_int_counter_timer; /*0098 009B*/
628 u_int32_t outbound_doorbell; /*009C 009F*/
629 u_int32_t outbound_doorbell_clear; /*00A0 00A3*/
630 …u_int32_t message_source_address_index; /*00A4 00A7 message accelerator source addre…
631 …u_int32_t message_done_queue_index; /*00A8 00AB message accelerator completion q…
632 u_int32_t reserved0; /*00AC 00AF*/
633 u_int32_t inbound_msgaddr0; /*00B0 00B3 scratchpad0*/
634 u_int32_t inbound_msgaddr1; /*00B4 00B7 scratchpad1*/
635 u_int32_t outbound_msgaddr0; /*00B8 00BB scratchpad2*/
636 u_int32_t outbound_msgaddr1; /*00BC 00BF scratchpad3*/
637 …u_int32_t inbound_queueport_low; /*00C0 00C3 port64 host inbound queue port l…
638 …u_int32_t inbound_queueport_high; /*00C4 00C7 port64 host inbound queue port h…
639 …u_int32_t outbound_queueport_low; /*00C8 00CB port64 host outbound queue port …
640 …u_int32_t outbound_queueport_high; /*00CC 00CF port64 host outbound queue port …
641 u_int32_t iop_inbound_queue_port_low; /*00D0 00D3*/
642 u_int32_t iop_inbound_queue_port_high; /*00D4 00D7*/
643 u_int32_t iop_outbound_queue_port_low; /*00D8 00DB*/
644 u_int32_t iop_outbound_queue_port_high; /*00DC 00DF*/
645 …u_int32_t message_dest_queue_port_low; /*00E0 00E3 message accelerator destination …
646 …u_int32_t message_dest_queue_port_high; /*00E4 00E7 message accelerator destination …
647 …u_int32_t last_used_message_dest_address_low; /*00E8 00EB last used message accelerator de…
648 …u_int32_t last_used_message_dest_address_high; /*00EC 00EF last used message accelerator de…
649 …u_int32_t message_done_queue_base_address_low; /*00F0 00F3 message accelerator completion q…
650 …u_int32_t message_done_queue_base_address_high; /*00F4 00F7 message accelerator completion q…
651 u_int32_t host_diagnostic; /*00F8 00FB*/
652 u_int32_t write_sequence; /*00FC 00FF*/
653 u_int32_t reserved1[34]; /*0100 0187*/
654 u_int32_t reserved2[1950]; /*0188 1FFF*/
655 u_int32_t message_wbuffer[32]; /*2000 207F*/
656 u_int32_t reserved3[32]; /*2080 20FF*/
657 u_int32_t message_rbuffer[32]; /*2100 217F*/
658 u_int32_t reserved4[32]; /*2180 21FF*/
659 u_int32_t msgcode_rwbuffer[256]; /*2200 23FF*/
736 u_int32_t iobound_doorbell; /*0000 0003*/
737 u_int32_t write_sequence_3xxx; /*0004 0007*/
738 u_int32_t host_diagnostic_3xxx; /*0008 000B*/
739 u_int32_t posted_outbound_doorbell; /*000C 000F*/
740 u_int32_t master_error_attribute; /*0010 0013*/
741 u_int32_t master_error_address_low; /*0014 0017*/
742 u_int32_t master_error_address_high; /*0018 001B*/
743 u_int32_t hcb_size; /*001C 001F*/
744 u_int32_t inbound_doorbell; /*0020 0023*/
745 u_int32_t diagnostic_rw_data; /*0024 0027*/
746 u_int32_t diagnostic_rw_address_low; /*0028 002B*/
747 u_int32_t diagnostic_rw_address_high; /*002C 002F*/
748 u_int32_t host_int_status; /*0030 0033 host interrupt status*/
749 u_int32_t host_int_mask; /*0034 0037 host interrupt mask*/
750 u_int32_t dcr_data; /*0038 003B*/
751 u_int32_t dcr_address; /*003C 003F*/
752 u_int32_t inbound_queueport; /*0040 0043 port32 host inbound queue port*/
753 u_int32_t outbound_queueport; /*0044 0047 port32 host outbound queue port*/
754 u_int32_t hcb_pci_address_low; /*0048 004B*/
755 u_int32_t hcb_pci_address_high; /*004C 004F*/
756 u_int32_t iop_int_status; /*0050 0053*/
757 u_int32_t iop_int_mask; /*0054 0057*/
758 u_int32_t iop_inbound_queue_port; /*0058 005B*/
759 u_int32_t iop_outbound_queue_port; /*005C 005F*/
760 u_int32_t inbound_free_list_index; /*0060 0063*/
761 u_int32_t inbound_post_list_index; /*0064 0067*/
762 u_int32_t outbound_free_list_index; /*0068 006B*/
763 u_int32_t outbound_post_list_index; /*006C 006F*/
764 u_int32_t inbound_doorbell_clear; /*0070 0073*/
765 u_int32_t i2o_message_unit_control; /*0074 0077*/
766 u_int32_t last_used_message_source_address_low; /*0078 007B*/
767 u_int32_t last_used_message_source_address_high; /*007C 007F*/
768 u_int32_t pull_mode_data_byte_count[4]; /*0080 008F*/
769 u_int32_t message_dest_address_index; /*0090 0093*/
770 u_int32_t done_queue_not_empty_int_counter_timer; /*0094 0097*/
771 u_int32_t utility_A_int_counter_timer; /*0098 009B*/
772 u_int32_t outbound_doorbell; /*009C 009F*/
773 u_int32_t outbound_doorbell_clear; /*00A0 00A3*/
774 u_int32_t message_source_address_index; /*00A4 00A7*/
775 u_int32_t message_done_queue_index; /*00A8 00AB*/
776 u_int32_t reserved0; /*00AC 00AF*/
777 u_int32_t inbound_msgaddr0; /*00B0 00B3 scratchpad0*/
778 u_int32_t inbound_msgaddr1; /*00B4 00B7 scratchpad1*/
779 u_int32_t outbound_msgaddr0; /*00B8 00BB scratchpad2*/
780 u_int32_t outbound_msgaddr1; /*00BC 00BF scratchpad3*/
781 …u_int32_t inbound_queueport_low; /*00C0 00C3 port64 host inbound queue port l…
782 …u_int32_t inbound_queueport_high; /*00C4 00C7 port64 host inbound queue port h…
783 …u_int32_t outbound_queueport_low; /*00C8 00CB port64 host outbound queue port …
784 …u_int32_t outbound_queueport_high; /*00CC 00CF port64 host outbound queue port …
785 u_int32_t iop_inbound_queue_port_low; /*00D0 00D3*/
786 u_int32_t iop_inbound_queue_port_high; /*00D4 00D7*/
787 u_int32_t iop_outbound_queue_port_low; /*00D8 00DB*/
788 u_int32_t iop_outbound_queue_port_high; /*00DC 00DF*/
789 u_int32_t message_dest_queue_port_low; /*00E0 00E3*/
790 u_int32_t message_dest_queue_port_high; /*00E4 00E7*/
791 u_int32_t last_used_message_dest_address_low; /*00E8 00EB*/
792 u_int32_t last_used_message_dest_address_high; /*00EC 00EF*/
793 u_int32_t message_done_queue_base_address_low; /*00F0 00F3*/
794 u_int32_t message_done_queue_base_address_high; /*00F4 00F7*/
795 u_int32_t host_diagnostic; /*00F8 00FB*/
796 u_int32_t write_sequence; /*00FC 00FF*/
797 u_int32_t reserved1[46]; /*0100 01B7*/
798 u_int32_t reply_post_producer_index; /*01B8 01BB*/
799 u_int32_t reply_post_consumer_index; /*01BC 01BF*/
800 u_int32_t reserved2[1936]; /*01C0 1FFF*/
801 u_int32_t message_wbuffer[32]; /*2000 207F*/
802 u_int32_t reserved3[32]; /*2080 20FF*/
803 u_int32_t message_rbuffer[32]; /*2100 217F*/
804 u_int32_t reserved4[32]; /*2180 21FF*/
805 u_int32_t msgcode_rwbuffer[256]; /*2200 23FF*/
814 u_int32_t iobound_doorbell; /*0000 0003*/
815 u_int32_t write_sequence_3xxx; /*0004 0007*/
816 u_int32_t host_diagnostic_3xxx; /*0008 000B*/
817 u_int32_t posted_outbound_doorbell; /*000C 000F*/
818 u_int32_t master_error_attribute; /*0010 0013*/
819 u_int32_t master_error_address_low; /*0014 0017*/
820 u_int32_t master_error_address_high; /*0018 001B*/
821 u_int32_t hcb_size; /*001C 001F*/
822 u_int32_t inbound_doorbell; /*0020 0023*/
823 u_int32_t diagnostic_rw_data; /*0024 0027*/
824 u_int32_t diagnostic_rw_address_low; /*0028 002B*/
825 u_int32_t diagnostic_rw_address_high; /*002C 002F*/
826 u_int32_t host_int_status; /*0030 0033 host interrupt status*/
827 u_int32_t host_int_mask; /*0034 0037 host interrupt mask*/
828 u_int32_t dcr_data; /*0038 003B*/
829 u_int32_t dcr_address; /*003C 003F*/
830 u_int32_t inbound_queueport; /*0040 0043 port32 host inbound queue port*/
831 u_int32_t outbound_queueport; /*0044 0047 port32 host outbound queue port*/
832 u_int32_t hcb_pci_address_low; /*0048 004B*/
833 u_int32_t hcb_pci_address_high; /*004C 004F*/
834 u_int32_t iop_int_status; /*0050 0053*/
835 u_int32_t iop_int_mask; /*0054 0057*/
836 u_int32_t iop_inbound_queue_port; /*0058 005B*/
837 u_int32_t iop_outbound_queue_port; /*005C 005F*/
838 u_int32_t inbound_free_list_index; /*0060 0063*/
839 u_int32_t inbound_post_list_index; /*0064 0067*/
840 u_int32_t reply_post_producer_index; /*0068 006B*/
841 u_int32_t reply_post_consumer_index; /*006C 006F*/
842 u_int32_t inbound_doorbell_clear; /*0070 0073*/
843 u_int32_t i2o_message_unit_control; /*0074 0077*/
844 u_int32_t last_used_message_source_address_low; /*0078 007B*/
845 u_int32_t last_used_message_source_address_high; /*007C 007F*/
846 u_int32_t pull_mode_data_byte_count[4]; /*0080 008F*/
847 u_int32_t message_dest_address_index; /*0090 0093*/
848 u_int32_t done_queue_not_empty_int_counter_timer; /*0094 0097*/
849 u_int32_t utility_A_int_counter_timer; /*0098 009B*/
850 u_int32_t outbound_doorbell; /*009C 009F*/
851 u_int32_t outbound_doorbell_clear; /*00A0 00A3*/
852 u_int32_t message_source_address_index; /*00A4 00A7*/
853 u_int32_t message_done_queue_index; /*00A8 00AB*/
854 u_int32_t reserved0; /*00AC 00AF*/
855 u_int32_t inbound_msgaddr0; /*00B0 00B3 scratchpad0*/
856 u_int32_t inbound_msgaddr1; /*00B4 00B7 scratchpad1*/
857 u_int32_t outbound_msgaddr0; /*00B8 00BB scratchpad2*/
858 u_int32_t outbound_msgaddr1; /*00BC 00BF scratchpad3*/
859 …u_int32_t inbound_queueport_low; /*00C0 00C3 port64 host inbound queue port l…
860 …u_int32_t inbound_queueport_high; /*00C4 00C7 port64 host inbound queue port h…
861 …u_int32_t outbound_queueport_low; /*00C8 00CB port64 host outbound queue port …
862 …u_int32_t outbound_queueport_high; /*00CC 00CF port64 host outbound queue port …
863 u_int32_t iop_inbound_queue_port_low; /*00D0 00D3*/
864 u_int32_t iop_inbound_queue_port_high; /*00D4 00D7*/
865 u_int32_t iop_outbound_queue_port_low; /*00D8 00DB*/
866 u_int32_t iop_outbound_queue_port_high; /*00DC 00DF*/
867 u_int32_t message_dest_queue_port_low; /*00E0 00E3*/
868 u_int32_t message_dest_queue_port_high; /*00E4 00E7*/
869 u_int32_t last_used_message_dest_address_low; /*00E8 00EB*/
870 u_int32_t last_used_message_dest_address_high; /*00EC 00EF*/
871 u_int32_t message_done_queue_base_address_low; /*00F0 00F3*/
872 u_int32_t message_done_queue_base_address_high; /*00F4 00F7*/
873 u_int32_t host_diagnostic; /*00F8 00FB*/
874 u_int32_t write_sequence; /*00FC 00FF*/
875 u_int32_t reserved1[46]; /*0100 01B7*/
876 u_int32_t reply_post_producer_index1; /*01B8 01BB*/
877 u_int32_t reply_post_consumer_index1; /*01BC 01BF*/
1135 u_int32_t length; /* high 8 bit == flag,low 24 bit == length */
1136 u_int32_t address;
1141 u_int32_t length; /* high 8 bit == flag,low 24 bit == length */
1142 u_int32_t address;
1143 u_int32_t addresshigh;
1157 u_int32_t data_len;
1164 u_int32_t phyadd_low;
1165 u_int32_t phyadd_high;
1179 u_int32_t signature; /*0,00-03*/
1180 u_int32_t request_len; /*1,04-07*/
1181 u_int32_t numbers_queue; /*2,08-11*/
1182 u_int32_t sdram_size; /*3,12-15*/
1183 u_int32_t ide_channels; /*4,16-19*/
1188 u_int32_t cfgVersion; /*25,100-103 Added for checking of new firmware capability*/
1190 u_int32_t cfgPicStatus; /*30,120-123*/
1235 u_int32_t Context; /* 08h Address of this request */
1236 u_int32_t DataLength; /* 0ch not used now */
1292 u_int32_t arc_cdb_size; /* 508-511 */
1294 u_int32_t smid;
1337 u_int32_t adapter_type; /* adapter A,B..... */
1362 u_int32_t phyadd_low;
1363 u_int32_t phyadd_high;
1368 u_int32_t outbound_int_enable;
1388 u_int32_t rqbuf_firstindex; /* first of read buffer */
1389 u_int32_t rqbuf_lastindex; /* last of read buffer */
1392 u_int32_t wqbuf_firstindex; /* first of write buffer */
1393 u_int32_t wqbuf_lastindex; /* last of write buffer */
1401 u_int32_t num_resets;
1402 u_int32_t num_aborts;
1403 u_int32_t firm_request_len; /*1,04-07*/
1404 u_int32_t firm_numbers_queue; /*2,08-11*/
1405 u_int32_t firm_sdram_size; /*3,12-15*/
1406 u_int32_t firm_ide_channels; /*4,16-19*/
1407 u_int32_t firm_cfg_version;
1411 u_int32_t firm_PicStatus;
1413 u_int32_t pktRequestCount;
1414 u_int32_t pktReturnCount;
1415 u_int32_t vendor_device_id;
1416 u_int32_t adapter_bus_speed;
1417 u_int32_t maxOutstanding;
1419 u_int32_t doneq_index;
1420 u_int32_t in_doorbell;
1421 u_int32_t out_doorbell;
1422 u_int32_t completionQ_entry;
1428 u_int32_t max_coherent_size;
1441 u_int32_t hrbSignature; // must be "HRBS"
1442 …u_int32_t hrbSize; // total buffer size(must be multiples of MB, this version should be 128+3 MB, …
1443 u_int32_t hrbRes[2]; // reserved, must be set to 0