Lines Matching +full:wdt +full:- +full:timer +full:- +full:index
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * This is a driver for watchdog timer present in AMD SB600/SB7xx/SB8xx
34 * - AMD SB600 Register Reference Guide, Public Version, Rev. 3.03 (SB600 RRG)
35 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/46155_sb600_rrg_pub_3.03.pdf
36 * - AMD SB700/710/750 Register Reference Guide (RRG)
38 * - AMD SB700/710/750 Register Programming Requirements (RPR)
40 * - AMD SB800-Series Southbridges Register Reference Guide (RRG)
43 * - Watchdog Timer Hardware Requirements for Windows Server 2003 (WDRT)
135 bus_write_1(res, 0, reg); /* Index */
142 bus_write_1(res, 0, reg); /* Index */
149 return (bus_read_4(sc->res_ctrl, 0));
155 bus_write_4(sc->res_ctrl, 0, val);
161 return (bus_read_4(sc->res_count, 0));
167 bus_write_4(sc->res_count, 0, val);
178 sc->active = 1;
179 amdsbwd_verbose_printf(sc->dev, "timer enabled\n");
190 sc->active = 0;
191 amdsbwd_verbose_printf(sc->dev, "timer disabled\n");
210 sc->timeout = timeout;
211 amdsbwd_verbose_printf(sc->dev, "timeout set to %u ticks\n", timeout);
224 timeout = (uint64_t)1 << (cmd - WD_TO_1MS);
225 timeout = timeout / sc->ms_per_tick;
230 /* For a too long timeout stop the timer. */
231 if (timeout > sc->max_ticks)
238 if (timeout != sc->timeout)
240 if (!sc->active)
245 if (sc->active)
258 if (device_find_child(parent, "amdsbwd", -1) != NULL)
295 /* Find base address of memory mapped WDT registers. */
298 *addr |= pmio_read(pmres, AMDSB_PM_WDT_BASE_MSB - i);
302 /* Set watchdog timer tick to 1s. */
317 device_set_desc(dev, "AMD SB600/SB7xx Watchdog Timer");
334 for (i = 3; i >= 0; i--) {
343 /* Find base address of memory mapped WDT registers. */
346 *addr |= pmio_read(pmres, AMDSB8_PM_WDT_EN + 3 - i);
350 /* Set watchdog timer tick to 1s. */
372 device_set_desc(dev, "AMD SB8xx/SB9xx/Axx Watchdog Timer");
402 * Set watchdog timer tick to 1s and
416 device_set_descf(dev, "%s FCH Rev 41h+ Watchdog Timer",
486 sc->max_ticks = UINT16_MAX;
487 sc->rid_ctrl = 0;
488 sc->rid_count = 1;
490 sc->ms_per_tick = 1000;
492 sc->res_ctrl = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
493 &sc->rid_ctrl, RF_ACTIVE);
494 if (sc->res_ctrl == NULL) {
498 sc->res_count = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
499 &sc->rid_count, RF_ACTIVE);
500 if (sc->res_count == NULL) {
514 sc->dev = dev;
533 sc->ev_tag = EVENTHANDLER_REGISTER(watchdog_list, amdsbwd_event, sc,
549 if (sc->ev_tag != NULL)
550 EVENTHANDLER_DEREGISTER(watchdog_list, sc->ev_tag);
552 if (sc->active)
555 if (sc->res_ctrl != NULL)
556 bus_release_resource(dev, SYS_RES_MEMORY, sc->rid_ctrl,
557 sc->res_ctrl);
559 if (sc->res_count != NULL)
560 bus_release_resource(dev, SYS_RES_MEMORY, sc->rid_count,
561 sc->res_count);
586 if (sc->active) {
587 amdsbwd_tmr_set(sc, sc->timeout);