877 	uint32_t pmcfg;  in alc_disable_l0s_l1()  local
881 		pmcfg = CSR_READ_4(sc, ALC_PM_CFG);  in alc_disable_l0s_l1()
882 		pmcfg &= ~(PM_CFG_L1_ENTRY_TIMER_MASK | PM_CFG_CLK_SWH_L1 |  in alc_disable_l0s_l1()
885 		pmcfg |= PM_CFG_SERDES_BUDS_RX_L1_ENB |  in alc_disable_l0s_l1()
887 		CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);  in alc_disable_l0s_l1()
1150 	uint32_t pmcfg;  in alc_aspm_813x()  local
1156 	pmcfg = CSR_READ_4(sc, ALC_PM_CFG);  in alc_aspm_813x()
1163 	pmcfg &= ~PM_CFG_SERDES_PD_EX_L1;  in alc_aspm_813x()
1164 	pmcfg &= ~(PM_CFG_L1_ENTRY_TIMER_MASK | PM_CFG_LCKDET_TIMER_MASK);  in alc_aspm_813x()
1165 	pmcfg |= PM_CFG_MAC_ASPM_CHK;  in alc_aspm_813x()
1166 	pmcfg |= (PM_CFG_LCKDET_TIMER_DEFAULT << PM_CFG_LCKDET_TIMER_SHIFT);  in alc_aspm_813x()
1167 	pmcfg &= ~(PM_CFG_ASPM_L1_ENB | PM_CFG_ASPM_L0S_ENB);  in alc_aspm_813x()
1177 		pmcfg &= ~(PM_CFG_EN_BUFS_RX_L0S | PM_CFG_SA_DLY_ENB |  in alc_aspm_813x()
1179 		pmcfg |= (PM_CFG_L1_ENTRY_TIMER_DEFAULT <<  in alc_aspm_813x()
1181 		pmcfg &= ~PM_CFG_PM_REQ_TIMER_MASK;  in alc_aspm_813x()
1182 		pmcfg |= (PM_CFG_PM_REQ_TIMER_DEFAULT <<  in alc_aspm_813x()
1184 		pmcfg |= PM_CFG_SERDES_PD_EX_L1 | PM_CFG_PCIE_RECV;  in alc_aspm_813x()
1189 			pmcfg |= PM_CFG_ASPM_L0S_ENB;  in alc_aspm_813x()
1191 			pmcfg |= PM_CFG_ASPM_L1_ENB;  in alc_aspm_813x()
1195 				pmcfg &= ~PM_CFG_ASPM_L0S_ENB;  in alc_aspm_813x()
1196 			pmcfg &= ~(PM_CFG_SERDES_L1_ENB |  in alc_aspm_813x()
1199 			pmcfg |= PM_CFG_CLK_SWH_L1;  in alc_aspm_813x()
1201 				pmcfg &= ~PM_CFG_L1_ENTRY_TIMER_MASK;  in alc_aspm_813x()
1204 					pmcfg |= (7 <<  in alc_aspm_813x()
1209 					pmcfg |= (4 <<  in alc_aspm_813x()
1213 					pmcfg |= (15 <<  in alc_aspm_813x()
1219 			pmcfg |= PM_CFG_SERDES_L1_ENB |  in alc_aspm_813x()
1222 			pmcfg &= ~(PM_CFG_CLK_SWH_L1 |  in alc_aspm_813x()
1226 		pmcfg &= ~(PM_CFG_SERDES_BUDS_RX_L1_ENB | PM_CFG_SERDES_L1_ENB |  in alc_aspm_813x()
1228 		pmcfg |= PM_CFG_CLK_SWH_L1;  in alc_aspm_813x()
1230 			pmcfg |= PM_CFG_ASPM_L1_ENB;  in alc_aspm_813x()
1232 	CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);  in alc_aspm_813x()
1238 	uint32_t pmcfg;  in alc_aspm_816x()  local
1240 	pmcfg = CSR_READ_4(sc, ALC_PM_CFG);  in alc_aspm_816x()
1241 	pmcfg &= ~PM_CFG_L1_ENTRY_TIMER_816X_MASK;  in alc_aspm_816x()
1242 	pmcfg |= PM_CFG_L1_ENTRY_TIMER_816X_DEFAULT;  in alc_aspm_816x()
1243 	pmcfg &= ~PM_CFG_PM_REQ_TIMER_MASK;  in alc_aspm_816x()
1244 	pmcfg |= PM_CFG_PM_REQ_TIMER_816X_DEFAULT;  in alc_aspm_816x()
1245 	pmcfg &= ~PM_CFG_LCKDET_TIMER_MASK;  in alc_aspm_816x()
1246 	pmcfg |= PM_CFG_LCKDET_TIMER_DEFAULT;  in alc_aspm_816x()
1247 	pmcfg |= PM_CFG_SERDES_PD_EX_L1 | PM_CFG_CLK_SWH_L1 | PM_CFG_PCIE_RECV;  in alc_aspm_816x()
1248 	pmcfg &= ~(PM_CFG_RX_L1_AFTER_L0S | PM_CFG_TX_L1_AFTER_L0S |  in alc_aspm_816x()
1255 		pmcfg |= PM_CFG_SERDES_L1_ENB | PM_CFG_SERDES_PLL_L1_ENB;  in alc_aspm_816x()
1258 		pmcfg |= PM_CFG_ASPM_L0S_ENB | PM_CFG_ASPM_L1_ENB |  in alc_aspm_816x()
1262 			pmcfg |= PM_CFG_ASPM_L0S_ENB | PM_CFG_ASPM_L1_ENB |  in alc_aspm_816x()
1265 			pmcfg |= PM_CFG_ASPM_L1_ENB | PM_CFG_MAC_ASPM_CHK;  in alc_aspm_816x()
1267 	CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);  in alc_aspm_816x()
3812 	uint32_t pmcfg, reg;  in alc_reset()  local
3815 	pmcfg = 0;  in alc_reset()
3822 			pmcfg = CSR_READ_4(sc, ALC_PM_CFG);  in alc_reset()
3823 			if ((pmcfg & (PM_CFG_ASPM_L0S_ENB | PM_CFG_ASPM_L1_ENB))  in alc_reset()
3825 				pmcfg &= ~(PM_CFG_ASPM_L0S_ENB |  in alc_reset()
3827 				CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);  in alc_reset()
3869 			if ((pmcfg & (PM_CFG_ASPM_L0S_ENB | PM_CFG_ASPM_L1_ENB))  in alc_reset()
3871 				CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);  in alc_reset()