Lines Matching +full:always +full:- +full:wait +full:- +full:for +full:- +full:ack
1 /*-
2 * Adaptec 274x/284x/294x device driver firmware for Linux and FreeBSD.
4 * Copyright (c) 1994-2001 Justin T. Gibbs.
5 * Copyright (c) 2000-2001 Adaptec Inc.
17 * including a substantially similar Disclaimer requirement for further
19 * 3. Neither the names of the above-listed copyright holders nor the names
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
32 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * After starting the selection hardware, we check for reconnecting targets
51 * as well as for our selection to complete just in case the reselection wins
57 * create yet another SCB waiting for selection. The solution used here is to
58 * use byte 27 of the SCB as a pseudo-next pointer and to thread a list
59 * of SCBs that are awaiting selection. Since 0-0xfe are valid SCB indexes,
61 * this list every time a request sense occurs or after completing a non-tagged
62 * command for which a second SCB has been queued. The sequencer will
76 if ((ahc->features & AHC_ULTRA2) != 0) {
80 if ((ahc->features & AHC_TWIN) != 0) {
88 if ((ahc->features & AHC_TWIN) != 0) {
93 /* Has the driver posted any work for us? */
95 if ((ahc->features & AHC_QUEUE_REGS) != 0) {
106 * card SCB for the host's SCB and get to work on it.
108 if ((ahc->flags & AHC_PAGESCBS) != 0) {
111 /* In the non-paging case, the SCBID == hardware SCB index */
131 if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
138 if ((ahc->features & AHC_QUEUE_REGS) != 0) {
167 if ((ahc->features & AHC_DT) == 0) {
179 if ((ahc->flags & AHC_TARGETROLE) != 0) {
180 if ((ahc->flags & AHC_INITIATORROLE) != 0) {
187 * setup the phase for receiving messages
193 * Setup the DMA for sending the identify and
199 if ((ahc->features & AHC_CMD_CHAN) != 0) {
212 if ((ahc->features & AHC_MULTI_TID) != 0) {
214 } else if ((ahc->features & AHC_ULTRA2) != 0) {
220 if ((ahc->features & AHC_TWIN) != 0) {
224 if ((ahc->features & AHC_CMD_CHAN) != 0) {
233 * XXX SCSI-1 may require us to assume lun 0 if
241 * of the SCSI-2 spec for what messages are allowed when.
250 /* Store for host */
251 if ((ahc->features & AHC_CMD_CHAN) != 0) {
258 /* Remember for disconnection decision */
267 * immediately follow the identify. We test for a valid
271 add A, -MSG_SIMPLE_Q_TAG, DINDEX;
273 add A, -MSG_IGN_WIDE_RESIDUE, DINDEX;
276 /* Store for host */
277 if ((ahc->features & AHC_CMD_CHAN) != 0) {
291 * Store the tag for the host.
294 if ((ahc->features & AHC_CMD_CHAN) != 0) {
304 if ((ahc->features & AHC_CMD_CHAN) != 0) {
331 if ((ahc->flags & AHC_INITIATORROLE) != 0) {
337 /* XXX test for and handle ONE BIT condition */
340 if ((ahc->features & AHC_ULTRA2) != 0) {
346 if ((ahc->features & AHC_TWIN) != 0) {
362 * reset), re-enable them now. Resets are only of interest
364 * defer re-enabling the interrupt until, as an initiator,
370 if ((ahc->features & AHC_TWIN) != 0) {
377 if ((ahc->features & AHC_ULTRA2) != 0) {
379 } else if ((ahc->features & AHC_TWIN) != 0) {
384 if ((ahc->flags & AHC_TARGETROLE) != 0) {
398 if ((ahc->features & AHC_ULTRA) != 0) {
403 * Initialize SCSIRATE with the appropriate value for this target.
405 if ((ahc->features & AHC_ULTRA2) != 0) {
411 if ((ahc->flags & AHC_TARGETROLE) != 0) {
415 * driving REQ on the bus for the next byte.
422 /* Wait for the byte */
444 if ((ahc->flags & AHC_TARGETROLE) != 0) {
456 * We've just re-selected an initiator.
457 * Assert BSY and setup the phase for
502 if ((ahc->flags & AHC_PAGESCBS) != 0) {
528 /* Wait for preceding I/O session to complete. */
532 if ((ahc->features & AHC_ULTRA2) != 0) {
544 * buffer for new commands is full, return busy or queue full.
546 if ((ahc->features & AHC_HS_MAILBOX) != 0) {
562 /* Store for host */
563 if ((ahc->features & AHC_CMD_CHAN) != 0) {
573 * BIOS array for this table. Count is one less than
574 * the total for the command since we've already fetched
587 if ((ahc->features & AHC_CMD_CHAN) != 0) {
604 * data direction of the DMA. Toggle it for
615 /* XXX Watch for ATN or parity errors??? */
624 if ((ahc->features & AHC_CMD_CHAN) != 0) {
645 if ((ahc->flags & AHC_INITIATORROLE) != 0) {
658 * Main loop for information transfer phases. Wait for the
659 * target to assert REQ before checking MSG, C/D and I/O for
679 mov NONE, SCSIDATL; /* Ack the last byte */
680 if ((ahc->features & AHC_ULTRA2) != 0) {
704 if ((ahc->features & AHC_ULTRA2) != 0) {
708 if ((ahc->features & AHC_ULTRA) != 0) {
723 if ((ahc->features & AHC_CMD_CHAN) != 0) {
733 * Do we need any more segments for this transfer?
757 * so we don't end up referencing a non-existant page.
770 if ((ahc->features & AHC_ULTRA2) != 0) {
771 /* Does the hardware have space for another SG entry? */
775 if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
789 if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0 && ahc->pci_cachesize != 0) {
793 * XXX Can we optimize this for PCI writes only???
798 * there is no need for an extra segment.
807 * there is no need for an extra segment.
819 adc HCNT[1], -1;
820 adc HCNT[2], -1 ret;
827 if ((ahc->features & AHC_ULTRA2) != 0) {
834 if ((ahc->features & AHC_CMD_CHAN) != 0) {
841 * If we re-enter the data phase after going through another
843 * corrupted by the interveining, non-data, transfers. Ask
850 /* We have seen a data phase for the first time */
860 if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
864 if ((ahc->features & AHC_CMD_CHAN) != 0) {
873 if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0 && ahc->pci_cachesize != 0) {
878 if ((ahc->features & AHC_ULTRA2) == 0) {
879 if ((ahc->features & AHC_CMD_CHAN) != 0) {
891 * Turn on `Bit Bucket' mode, wait until the target takes
897 if ((ahc->features & AHC_DT) == 0) {
907 if ((ahc->features & AHC_ULTRA2) != 0) {
920 if ((ahc->features & AHC_DT) == 0) {
921 if ((ahc->flags & AHC_TARGETROLE) != 0) {
928 if ((ahc->flags & AHC_INITIATORROLE) != 0) {
945 if ((ahc->bugs & AHC_AUTOFLUSH_BUG) != 0) {
947 * On chips with broken auto-flush, start
963 * to fetch additional segments for this transfer,
1000 add SCB_RESIDUAL_SGPTR[1], -1;
1001 adc SCB_RESIDUAL_SGPTR[2], -1;
1002 adc SCB_RESIDUAL_SGPTR[3], -1;
1012 * requires similar restructuring for pre-ULTRA2
1017 if ((ahc->features & AHC_DT) == 0) {
1018 if ((ahc->bugs & AHC_AUTOFLUSH_BUG) != 0) {
1026 * It can take up to 4 clock cycles for the
1028 * and for FIFOEMP to de-assert. Here we
1030 * sure the FIFOEMP bit stays on for 5 full
1042 * We enable the auto-ack feature on DT capable
1046 * way to detect this situation is to wait for
1048 * and then test to see if the data FIFO is non-empty.
1054 * FIFOEMP can lag LAST_SEG_DONE. Wait a few
1071 if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
1073 * Keep HHADDR cleared for future, 32bit addressed
1085 * SG_LAST_SEG flag as it will always be false in the
1096 if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
1097 && ahc->pci_cachesize != 0) {
1101 if ((ahc->flags & AHC_TARGETROLE) != 0) {
1103 if ((ahc->bugs & AHC_TMODE_WIDEODD_BUG) != 0) {
1113 if ((ahc->features & AHC_CMD_CHAN) != 0) {
1122 * it makes sense that the DMA circuitry doesn't ACK when
1123 * PHASEMIS is active). If we are doing a SCSI->Host transfer,
1124 * the data FIFO should be flushed auto-magically on STCNT=0
1125 * or a phase change, so just wait for FIFO empty status.
1149 * there is space for the input latch to drain.
1151 if ((ahc->bugs & AHC_PCI_2_1_RETRY_BUG) != 0) {
1162 * Advance the scatter-gather pointers if needed
1164 if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
1165 && ahc->pci_cachesize != 0) {
1171 if ((ahc->features & AHC_CMD_CHAN) != 0) {
1194 if ((ahc->features & AHC_CMD_CHAN) != 0) {
1195 /* Wait for the idle loop to complete */
1198 test CCSGCTL, CCSGEN jnz . - 1;
1201 * Workaround for flaky external SCB RAM
1209 if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
1226 if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
1237 if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
1238 && ahc->pci_cachesize != 0) {
1246 if ((ahc->features & AHC_CMD_CHAN) != 0) {
1252 if ((ahc->flags & AHC_TARGETROLE) != 0) {
1260 * we should only loop if there is a data overrun. For
1264 if ((ahc->flags & AHC_TARGETROLE) != 0) {
1267 if ((ahc->flags & AHC_INITIATORROLE) != 0) {
1269 if ((ahc->features & AHC_DT) == 0) {
1283 if ((ahc->features & AHC_CMD_CHAN) != 0) {
1288 if ((ahc->features & AHC_ULTRA2) == 0) {
1294 if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
1306 if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
1307 && ahc->pci_cachesize != 0) {
1308 if ((ahc->features & AHC_CMD_CHAN) != 0) {
1317 if ((ahc->features & AHC_CMD_CHAN) != 0) {
1322 } else if ((ahc->features & AHC_CMD_CHAN) != 0) {
1336 if ((ahc->features & AHC_ULTRA2) != 0) {
1342 if ((ahc->flags & AHC_TARGETROLE) != 0) {
1346 * For data-in phases, wait for any pending acks from the
1348 * send Ignore Wide Residue messages for data-in phases.
1365 if ((ahc->flags & AHC_INITIATORROLE) != 0) {
1374 if ((ahc->features & AHC_ULTRA2) != 0) {
1378 } else if ((ahc->features & AHC_CMD_CHAN) != 0) {
1386 add NONE, -13, SCB_CDB_LEN;
1389 if ((ahc->features & AHC_ULTRA2) != 0) {
1393 if ((ahc->features & AHC_CMD_CHAN) != 0) {
1412 if ((ahc->features & AHC_ULTRA2) != 0) {
1415 } else if ((ahc->features & AHC_CMD_CHAN) != 0) {
1416 if ((ahc->flags & AHC_SCB_BTT) != 0) {
1430 if ((ahc->flags & AHC_SCB_BTT) != 0) {
1443 if ((ahc->features & AHC_DT) == 0) {
1445 test SSTAT1, PHASEMIS jz . - 1;
1447 * Wait for our ACK to go-away on its own
1466 * Status phase. Wait for the data byte to appear, then read it
1489 * on an SCB that might not be for the current nexus. (For example, a
1497 * in case the target decides to put us in this phase for some strange
1501 /* Turn on ATN for the retry */
1502 if ((ahc->features & AHC_DT) == 0) {
1583 if ((ahc->features & AHC_WIDE) != 0) {
1600 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1623 * for this command and setting ATN while we are still processing
1656 * Check for residuals
1681 if ((ahc->features & AHC_QUEUE_REGS) != 0) {
1688 if ((ahc->features & AHC_QUEUE_REGS) == 0) {
1693 if ((ahc->flags & AHC_INITIATORROLE) != 0) {
1697 * store the SCB id for it in our untagged target table for lookup on
1707 * XXX - Wait for more testing.
1713 if ((ahc->flags & AHC_PAGESCBS) != 0) {
1724 * Copying RAM values back to SCB, for Save Data Pointers message, but
1728 * Ack the message as soon as possible. For chips without S/G pipelining,
1729 * we can only ack the message after SHADDR has been saved. On these
1733 if ((ahc->features & AHC_ULTRA2) != 0) {
1734 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1747 if ((ahc->features & AHC_ULTRA2) != 0) {
1761 if ((ahc->features & AHC_CMD_CHAN) != 0) {
1763 if ((ahc->features & AHC_ULTRA2) == 0) {
1764 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1770 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1777 * SCB anytime we enter a data phase for the first time, so all
1780 * sure we have a clean start for the next data or command phase.
1797 if ((ahc->flags & AHC_SCB_BTT) != 0) {
1806 * Identify message? For a reconnecting target, this tells us the lun
1807 * that the reconnection is for - find the correct SCB and switch to it,
1812 * Determine whether a target is using tagged or non-tagged
1815 * for this target or the transaction is for a different lun, then
1820 if ((ahc->flags & AHC_SCB_BTT) != 0) {
1823 if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
1824 add NONE, -SCB_64_BTT, SINDEX;
1828 add NONE, -(SCB_64_BTT + 16), SINDEX;
1835 if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
1836 add NONE, -BUSY_TARGETS, SINDEX;
1840 add NONE, -(BUSY_TARGETS + 16), SINDEX;
1848 if ((ahc->flags & AHC_PAGESCBS) != 0) {
1853 if ((ahc->flags & AHC_SCB_BTT) != 0) {
1857 * We only allow one untagged command per-target
1859 * for a tag message.
1863 if ((ahc->flags & AHC_PAGESCBS) != 0) {
1867 * it there should this SCB be for another
1875 * Here we "snoop" the bus looking for a SIMPLE QUEUE TAG message.
1877 * SCB. With SCB paging, we must search for non-tagged
1883 if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
1886 mov NONE,SCSIDATL; /* ACK Identify MSG */
1888 if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
1892 if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
1897 if ((ahc->flags & AHC_PAGESCBS) != 0) {
1906 * Ensure that the SCB the tag points to is for
1910 if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
1915 if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
1922 if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
1928 if ((ahc->flags & AHC_SCB_BTT) != 0) {
1933 if ((ahc->flags & AHC_SCB_BTT) != 0) {
1945 if ((ahc->flags & AHC_PAGESCBS) != 0) {
1953 if ((ahc->features & AHC_DT) == 0) {
1963 * According to Adaptec's documentation, an ACK is not sent on input from
1964 * the target until SCSIDATL is read from. So we wait until SCSIDATL is
1969 * we send our ACK.
1979 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1982 * If there is a parity error, wait for the kernel to
1995 mov NONE,SCSIDATL ret; /*dummy read from latch to ACK*/
1998 if ((ahc->flags & AHC_TARGETROLE) != 0) {
2001 * from out to in, wait an additional data release delay before continuing.
2004 /* Wait for preceding I/O session to complete. */
2015 * we must wait at least a data release delay plus
2045 if ((ahc->flags & AHC_PAGESCBS) != 0) {
2085 if ((ahc->features & AHC_CMD_CHAN) != 0) {
2098 if ((ahc->features & AHC_CMD_CHAN) != 0) {
2113 * If there is a parity error, wait for the kernel to
2120 if ((ahc->features & AHC_DT) == 0) {
2125 if ((ahc->features & AHC_CMD_CHAN) == 0) {
2152 if ((ahc->flags & AHC_TARGETROLE) != 0) {
2198 if ((ahc->features & AHC_CMD_CHAN) != 0) {
2203 if ((ahc->flags & AHC_SCB_BTT) != 0) {
2213 if ((ahc->features & AHC_ULTRA2) == 0) {
2218 } else if ((ahc->bugs & AHC_SCBCHAN_UPLOAD_BUG) != 0) {
2249 if ((ahc->bugs & AHC_PCI_2_1_RETRY_BUG) != 0) {
2257 * happen for SCSI transfers as the SCSI module
2266 /* Wait for at least 8 bytes of data to arrive. */
2283 cmp DINDEX, A jne . - 1;
2287 add A, -SCB_BASE, DINDEX;
2327 * Wait for DMA from host memory to data FIFO to complete, then disable
2328 * DMA and wait for it to acknowledge that it's off.
2340 * to the correct/safe state. If the SCB is for a disconnected
2345 if ((ahc->flags & AHC_PAGESCBS) != 0) {
2349 if ((ahc->flags & AHC_PAGESCBS) != 0) {
2359 if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
2366 if ((ahc->flags & AHC_PAGESCBS) != 0) {
2389 * candidates for paging out an SCB if one is needed for a new command.