Lines Matching +full:0 +full:x04000
68 #define FALSE 0
73 #define ALL_CHANNELS '\0'
74 #define ALL_TARGETS_MASK 0xFFFF
75 #define INITIATOR_WILDCARD (~0)
76 #define SCB_LIST_NULL 0xFF00
78 #define QOUTFIFO_ENTRY_VALID 0x80
79 #define SCBID_IS_NULL(scbid) (((scbid) & 0xFF00 ) == SCB_LIST_NULL)
86 #define SCB_IS_SCSIBUS_B(ahd, scb) (0)
98 (0x01 << (SCB_GET_TARGET_OFFSET(ahd, scb)))
101 ((ahd_debug & AHD_SHOW_MASKED_ERRORS) == 0 \
102 && (((scb)->flags & SCB_SILENT) != 0))
105 (((scb)->flags & SCB_SILENT) != 0)
124 #define AHD_TMODE_ENABLE 0
137 } while (0)
143 } while (0)
145 #define AHD_NEVER_COL_IDX 0xFFFF
165 #define AHD_MAXTRANSFER_SIZE 0x00ffffff /* limited by 24bit counter */
211 AHD_NONE = 0x0000,
212 AHD_CHIPID_MASK = 0x00FF,
213 AHD_AIC7901 = 0x0001,
214 AHD_AIC7902 = 0x0002,
215 AHD_AIC7901A = 0x0003,
216 AHD_PCI = 0x0100, /* Bus type PCI */
217 AHD_PCIX = 0x0200, /* Bus type PCIX */
218 AHD_BUS_MASK = 0x0F00
225 AHD_FENONE = 0x00000,
226 AHD_WIDE = 0x00001,/* Wide Channel */
227 AHD_MULTI_FUNC = 0x00100,/* Multi-Function/Channel Device */
228 AHD_TARGETMODE = 0x01000,/* Has tested target mode support */
229 AHD_MULTIROLE = 0x02000,/* Space for two roles at a time */
230 AHD_RTI = 0x04000,/* Retained Training Support */
231 AHD_NEW_IOCELL_OPTS = 0x08000,/* More Signal knobs in the IOCELL */
232 AHD_NEW_DFCNTRL_OPTS = 0x10000,/* SCSIENWRDIS bit */
233 AHD_FAST_CDB_DELIVERY = 0x20000,/* CDB acks released to Output Sync */
234 AHD_REMOVABLE = 0x00000,/* Hot-Swap supported - None so far*/
244 AHD_BUGNONE = 0x0000,
249 AHD_SENT_SCB_UPDATE_BUG = 0x0001,
251 AHD_ABORT_LQI_BUG = 0x0002,
253 AHD_PKT_BITBUCKET_BUG = 0x0004,
255 AHD_LONG_SETIMO_BUG = 0x0008,
257 AHD_NLQICRC_DELAYED_BUG = 0x0010,
259 AHD_SCSIRST_BUG = 0x0020,
261 AHD_PCIX_CHIPRST_BUG = 0x0040,
263 AHD_PCIX_MMAPIO_BUG = 0x0080,
265 AHD_PCIX_SCBRAM_RD_BUG = 0x0100,
274 AHD_LQO_ATNO_BUG = 0x0200,
276 AHD_AUTOFLUSH_BUG = 0x0400,
278 AHD_CLRLQO_AUTOCLR_BUG = 0x0800,
280 AHD_PKTIZED_STATUS_BUG = 0x1000,
282 AHD_PKT_LUN_BUG = 0x2000,
287 AHD_NONPACKFIFO_BUG = 0x4000,
295 AHD_MDFF_WSCBPTR_BUG = 0x8000,
297 AHD_REG_SLOW_SETTLE_BUG = 0x10000,
303 AHD_SET_MODE_BUG = 0x20000,
305 AHD_BUSFREEREV_BUG = 0x40000,
309 * sync factor 0x7, and the offset if off by a factor of 2.
311 AHD_PACED_NEGTABLE_BUG = 0x80000,
313 AHD_LQOOVERRUN_BUG = 0x100000,
318 AHD_INTCOLLISION_BUG = 0x200000,
328 AHD_EARLY_REQ_BUG = 0x400000,
332 AHD_FAINT_LED_BUG = 0x800000
341 AHD_FNONE = 0x00000,
342 AHD_BOOT_CHANNEL = 0x00001,/* We were set as the boot channel. */
343 AHD_USEDEFAULTS = 0x00004,/*
349 AHD_SEQUENCER_DEBUG = 0x00008,
350 AHD_RESET_BUS_A = 0x00010,
351 AHD_EXTENDED_TRANS_A = 0x00020,
352 AHD_TERM_ENB_A = 0x00040,
353 AHD_SPCHK_ENB_A = 0x00080,
354 AHD_STPWLEVEL_A = 0x00100,
355 AHD_INITIATORROLE = 0x00200,/*
359 AHD_TARGETROLE = 0x00400,/*
363 AHD_RESOURCE_SHORTAGE = 0x00800,
364 AHD_TQINFIFO_BLOCKED = 0x01000,/* Blocked waiting for ATIOs */
365 AHD_INT50_SPEEDFLEX = 0x02000,/*
369 AHD_BIOS_ENABLED = 0x04000,
370 AHD_ALL_INTERRUPTS = 0x08000,
371 AHD_39BIT_ADDRESSING = 0x10000,/* Use 39 bit addressing scheme. */
372 AHD_64BIT_ADDRESSING = 0x20000,/* Use 64 bit addressing scheme. */
373 AHD_CURRENT_SENSING = 0x40000,
374 AHD_SCB_CONFIG_USED = 0x80000,/* No SEEPROM but SCB had info. */
375 AHD_HP_BOARD = 0x100000,
376 AHD_RESET_POLL_ACTIVE = 0x200000,
377 AHD_UPDATE_PEND_CMDS = 0x400000,
378 AHD_RUNNING_QOUTFIFO = 0x800000,
379 AHD_HAD_FIRST_SEL = 0x1000000,
380 AHD_SHUTDOWN_RECOVERY = 0x2000000, /* Terminate recovery thread. */
381 AHD_HOSTRAID_BOARD = 0x4000000
457 /*0*/ union {
502 #define SG_PTR_MASK 0xFFFFFFF8
507 * Our Id (bits 0-3) Their ID (bits 4-7)
542 #define AHD_DMA_LAST_SEG 0x80000000
543 #define AHD_SG_HIGH_ADDR_MASK 0x7F000000
544 #define AHD_SG_LEN_MASK 0x00FFFFFF
564 SCB_FLAG_NONE = 0x00000,
565 SCB_TRANSMISSION_ERROR = 0x00001,/*
575 SCB_OTHERTCL_TIMEOUT = 0x00002,/*
583 SCB_DEVICE_RESET = 0x00004,
584 SCB_SENSE = 0x00008,
585 SCB_CDB32_PTR = 0x00010,
586 SCB_RECOVERY_SCB = 0x00020,
587 SCB_AUTO_NEGOTIATE = 0x00040,/* Negotiate to achieve goal. */
588 SCB_NEGOTIATE = 0x00080,/* Negotiation forced for command. */
589 SCB_ABORT = 0x00100,
590 SCB_ACTIVE = 0x00200,
591 SCB_TARGET_IMMEDIATE = 0x00400,
592 SCB_PACKETIZED = 0x00800,
593 SCB_EXPECT_PPR_BUSFREE = 0x01000,
594 SCB_PKT_SENSE = 0x02000,
595 SCB_CMDPHASE_ABORT = 0x04000,
596 SCB_ON_COL_LIST = 0x08000,
597 SCB_SILENT = 0x10000,/*
603 SCB_TIMEDOUT = 0x20000/*
702 * bytes terminated by 0xFF. The remainder
727 #define EVENT_TYPE_BUS_RESET 0xFF
752 #define AHD_TRANS_CUR 0x01 /* Modify current neogtiation status */
753 #define AHD_TRANS_ACTIVE 0x03 /* Assume this target is on the bus */
754 #define AHD_TRANS_GOAL 0x04 /* Modify negotiation goal */
755 #define AHD_TRANS_USER 0x08 /* Modify user negotiation settings */
756 #define AHD_PERIOD_10MHz 0x19
758 #define AHD_WIDTH_UNKNOWN 0xFF
759 #define AHD_PERIOD_UNKNOWN 0xFF
760 #define AHD_OFFSET_UNKNOWN 0xFF
761 #define AHD_PPR_OPTS_UNKNOWN 0xFF
805 #define AHD_SYNCRATE_160 0x8
806 #define AHD_SYNCRATE_PACED 0x8
807 #define AHD_SYNCRATE_DT 0x9
808 #define AHD_SYNCRATE_ULTRA2 0xa
809 #define AHD_SYNCRATE_ULTRA 0xc
810 #define AHD_SYNCRATE_FAST 0x19
812 #define AHD_SYNCRATE_SYNC 0x32
813 #define AHD_SYNCRATE_MIN 0x60
814 #define AHD_SYNCRATE_ASYNC 0xFF
818 #define AHD_ASYNC_XFER_PERIOD 0x44
827 #define AHD_SYNCRATE_REVA_120 0x8
828 #define AHD_SYNCRATE_REVA_160 0x7
847 uint16_t device_flags[16]; /* words 0-15 */
848 #define CFXFER 0x003F /* synchronous transfer rate */
849 #define CFXFER_ASYNC 0x3F
850 #define CFQAS 0x0040 /* Negotiate QAS */
851 #define CFPACKETIZED 0x0080 /* Negotiate Packetized Transfers */
852 #define CFSTART 0x0100 /* send start unit SCSI command */
853 #define CFINCBIOS 0x0200 /* include in BIOS scan */
854 #define CFDISC 0x0400 /* enable disconnection */
855 #define CFMULTILUNDEV 0x0800 /* Probe multiple luns in BIOS scan */
856 #define CFWIDEB 0x1000 /* wide bus device */
857 #define CFHOSTMANAGED 0x8000 /* Managed by a RAID controller */
863 #define CFSUPREM 0x0001 /* support all removeable drives */
864 #define CFSUPREMB 0x0002 /* support removeable boot drives */
865 #define CFBIOSSTATE 0x000C /* BIOS Action State */
866 #define CFBS_DISABLED 0x00
867 #define CFBS_ENABLED 0x04
868 #define CFBS_DISABLED_SCAN 0x08
869 #define CFENABLEDV 0x0010 /* Perform Domain Validation */
870 #define CFCTRL_A 0x0020 /* BIOS displays Ctrl-A message */
871 #define CFSPARITY 0x0040 /* SCSI parity */
872 #define CFEXTEND 0x0080 /* extended translation enabled */
873 #define CFBOOTCD 0x0100 /* Support Bootable CD-ROM */
874 #define CFMSG_LEVEL 0x0600 /* BIOS Message Level */
875 #define CFMSG_VERBOSE 0x0000
876 #define CFMSG_SILENT 0x0200
877 #define CFMSG_DIAG 0x0400
878 #define CFRESETB 0x0800 /* reset SCSI bus at boot */
879 /* UNUSED 0xf000 */
885 #define CFAUTOTERM 0x0001 /* Perform Auto termination */
886 #define CFSTERM 0x0002 /* SCSI low byte termination */
887 #define CFWSTERM 0x0004 /* SCSI high byte termination */
888 #define CFSEAUTOTERM 0x0008 /* Ultra2 Perform secondary Auto Term*/
889 #define CFSELOWTERM 0x0010 /* Ultra2 secondary low term */
890 #define CFSEHIGHTERM 0x0020 /* Ultra2 secondary high term */
891 #define CFSTPWLEVEL 0x0040 /* Termination level control */
892 #define CFBIOSAUTOTERM 0x0080 /* Perform Auto termination */
893 #define CFTERM_MENU 0x0100 /* BIOS displays termination menu */
894 #define CFCLUSTERENB 0x8000 /* Cluster Enable */
900 #define CFSCSIID 0x000f /* host adapter SCSI ID */
901 /* UNUSED 0x00f0 */
902 #define CFBRTIME 0xff00 /* bus release time/PCI Latency Time */
908 #define CFMAXTARG 0x00ff /* maximum targets */
909 #define CFBOOTLUN 0x0f00 /* Lun to boot from */
910 #define CFBOOTID 0xf000 /* Target to boot from */
913 #define CFSIGNATURE 0x400
922 #define VPDMASTERBIOS 0x0001
923 #define VPDBOOTHOST 0x0002
952 #define FLXADDR_TERMCTL 0x0
953 #define FLX_TERMCTL_ENSECHIGH 0x8
954 #define FLX_TERMCTL_ENSECLOW 0x4
955 #define FLX_TERMCTL_ENPRIHIGH 0x2
956 #define FLX_TERMCTL_ENPRILOW 0x1
957 #define FLXADDR_ROMSTAT_CURSENSECTL 0x1
958 #define FLX_ROMSTAT_SEECFG 0xF0
959 #define FLX_ROMSTAT_EECFG 0x0F
960 #define FLX_ROMSTAT_SEE_93C66 0x00
961 #define FLX_ROMSTAT_SEE_NONE 0xF0
962 #define FLX_ROMSTAT_EE_512x8 0x0
963 #define FLX_ROMSTAT_EE_1MBx8 0x1
964 #define FLX_ROMSTAT_EE_2MBx8 0x2
965 #define FLX_ROMSTAT_EE_4MBx8 0x3
966 #define FLX_ROMSTAT_EE_16MBx8 0x4
967 #define CURSENSE_ENB 0x1
968 #define FLXADDR_FLEXSTAT 0x2
969 #define FLX_FSTAT_BUSY 0x1
970 #define FLXADDR_CURRENT_STAT 0x4
971 #define FLX_CSTAT_SEC_HIGH 0xC0
972 #define FLX_CSTAT_SEC_LOW 0x30
973 #define FLX_CSTAT_PRI_HIGH 0x0C
974 #define FLX_CSTAT_PRI_LOW 0x03
975 #define FLX_CSTAT_MASK 0x03
977 #define FLX_CSTAT_OKAY 0x0
978 #define FLX_CSTAT_OVER 0x1
979 #define FLX_CSTAT_UNDER 0x2
980 #define FLX_CSTAT_INVALID 0x3
995 MSG_FLAG_NONE = 0x00,
996 MSG_FLAG_EXPECT_PPR_BUSFREE = 0x01,
997 MSG_FLAG_IU_REQ_CHANGED = 0x02,
998 MSG_FLAG_EXPECT_IDE_BUSFREE = 0x04,
999 MSG_FLAG_EXPECT_QASREJ_BUSFREE = 0x08,
1000 MSG_FLAG_PACKETIZED = 0x10
1004 MSG_TYPE_NONE = 0x00,
1005 MSG_TYPE_INITIATOR_MSGOUT = 0x01,
1006 MSG_TYPE_INITIATOR_MSGIN = 0x02,
1007 MSG_TYPE_TARGET_MSGOUT = 0x03,
1008 MSG_TYPE_TARGET_MSGIN = 0x04
1053 #define AHD_MK_MSK(x) (0x01 << (x))
1060 #define AHD_MODE_ANY_MSK (~0)
1325 } while (0)
1332 } while (0)
1339 } while (0)
1362 #define AHD_PCI_IOADDR0 PCIR_BAR(0) /* I/O BAR*/
1548 #define AHD_TMODE_ENABLE 0
1554 #define AHD_SHOW_MISC 0x00001
1555 #define AHD_SHOW_SENSE 0x00002
1556 #define AHD_SHOW_RECOVERY 0x00004
1557 #define AHD_DUMP_SEEPROM 0x00008
1558 #define AHD_SHOW_TERMCTL 0x00010
1559 #define AHD_SHOW_MEMORY 0x00020
1560 #define AHD_SHOW_MESSAGES 0x00040
1561 #define AHD_SHOW_MODEPTR 0x00080
1562 #define AHD_SHOW_SELTO 0x00100
1563 #define AHD_SHOW_FIFOS 0x00200
1564 #define AHD_SHOW_QFULL 0x00400
1565 #define AHD_SHOW_DV 0x00800
1566 #define AHD_SHOW_MASKED_ERRORS 0x01000
1567 #define AHD_SHOW_QUEUE 0x02000
1568 #define AHD_SHOW_TQIN 0x04000
1569 #define AHD_SHOW_SG 0x08000
1570 #define AHD_SHOW_INT_COALESCING 0x10000
1571 #define AHD_DEBUG_SEQUENCER 0x20000