Lines Matching refs:user_tinfo
6901 struct ahd_transinfo *user_tinfo; in ahd_parse_cfgdata() local
6907 user_tinfo = &tinfo->user; in ahd_parse_cfgdata()
6930 user_tinfo->ppr_options = 0; in ahd_parse_cfgdata()
6931 user_tinfo->period = (sc->device_flags[targ] & CFXFER); in ahd_parse_cfgdata()
6932 if (user_tinfo->period < CFXFER_ASYNC) { in ahd_parse_cfgdata()
6933 if (user_tinfo->period <= AHD_PERIOD_10MHz) in ahd_parse_cfgdata()
6934 user_tinfo->ppr_options |= MSG_EXT_PPR_DT_REQ; in ahd_parse_cfgdata()
6935 user_tinfo->offset = MAX_OFFSET; in ahd_parse_cfgdata()
6937 user_tinfo->offset = 0; in ahd_parse_cfgdata()
6938 user_tinfo->period = AHD_ASYNC_XFER_PERIOD; in ahd_parse_cfgdata()
6941 if (user_tinfo->period <= AHD_SYNCRATE_160) in ahd_parse_cfgdata()
6942 user_tinfo->period = AHD_SYNCRATE_DT; in ahd_parse_cfgdata()
6946 user_tinfo->ppr_options |= MSG_EXT_PPR_RD_STRM in ahd_parse_cfgdata()
6951 user_tinfo->ppr_options |= MSG_EXT_PPR_RTI; in ahd_parse_cfgdata()
6955 user_tinfo->ppr_options |= MSG_EXT_PPR_QAS_REQ; in ahd_parse_cfgdata()
6958 user_tinfo->width = MSG_EXT_WDTR_BUS_16_BIT; in ahd_parse_cfgdata()
6960 user_tinfo->width = MSG_EXT_WDTR_BUS_8_BIT; in ahd_parse_cfgdata()
6963 printf("(%d): %x:%x:%x:%x\n", targ, user_tinfo->width, in ahd_parse_cfgdata()
6964 user_tinfo->period, user_tinfo->offset, in ahd_parse_cfgdata()
6965 user_tinfo->ppr_options); in ahd_parse_cfgdata()