Lines Matching +full:irq +full:- +full:status +full:- +full:read +full:- +full:quirk
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2009-2012 Alexander Motin <mav@FreeBSD.org>
108 return ch->disablephy ? ATA_SC_DET_DISABLE : val; in ahci_ch_detval()
116 ATA_OUTL(ctlr->r_mem, AHCI_IS, ATA_INL(ctlr->r_mem, AHCI_IS)); in ahci_ctlr_setup()
118 if (ctlr->ccc) { in ahci_ctlr_setup()
119 ATA_OUTL(ctlr->r_mem, AHCI_CCCP, ATA_INL(ctlr->r_mem, AHCI_PI)); in ahci_ctlr_setup()
120 ATA_OUTL(ctlr->r_mem, AHCI_CCCC, in ahci_ctlr_setup()
121 (ctlr->ccc << AHCI_CCCC_TV_SHIFT) | in ahci_ctlr_setup()
124 ctlr->cccv = (ATA_INL(ctlr->r_mem, AHCI_CCCC) & in ahci_ctlr_setup()
129 ctlr->ccc, ctlr->cccv); in ahci_ctlr_setup()
133 ATA_OUTL(ctlr->r_mem, AHCI_GHC, in ahci_ctlr_setup()
134 ATA_INL(ctlr->r_mem, AHCI_GHC) | AHCI_GHC_IE); in ahci_ctlr_setup()
146 if ((ATA_INL(ctlr->r_mem, AHCI_VS) >= 0x00010200) && in ahci_ctlr_reset()
147 (ATA_INL(ctlr->r_mem, AHCI_CAP2) & AHCI_CAP2_BOH) && in ahci_ctlr_reset()
148 ((v = ATA_INL(ctlr->r_mem, AHCI_BOHC)) & AHCI_BOHC_OOS) == 0) { in ahci_ctlr_reset()
150 ATA_OUTL(ctlr->r_mem, AHCI_BOHC, v | AHCI_BOHC_OOS); in ahci_ctlr_reset()
155 v = ATA_INL(ctlr->r_mem, AHCI_BOHC); in ahci_ctlr_reset()
164 ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); in ahci_ctlr_reset()
166 ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE|AHCI_GHC_HR); in ahci_ctlr_reset()
167 for (timeout = 1000; timeout > 0; timeout--) { in ahci_ctlr_reset()
169 if ((ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_HR) == 0) in ahci_ctlr_reset()
177 ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); in ahci_ctlr_reset()
179 if (ctlr->quirks & AHCI_Q_RESTORE_CAP) { in ahci_ctlr_reset()
182 * This is write to a read-only register to restore its state. in ahci_ctlr_reset()
183 * On fully standard-compliant hardware this is not needed and in ahci_ctlr_reset()
185 * platforms using this quirk. in ahci_ctlr_reset()
187 ATA_OUTL(ctlr->r_mem, AHCI_CAP, ctlr->caps); in ahci_ctlr_reset()
201 ctlr->dev = dev; in ahci_attach()
202 ctlr->ccc = 0; in ahci_attach()
204 device_get_unit(dev), "ccc", &ctlr->ccc); in ahci_attach()
205 mtx_init(&ctlr->ch_mtx, "AHCI channels lock", NULL, MTX_DEF); in ahci_attach()
208 ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); in ahci_attach()
209 ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); in ahci_attach()
210 ctlr->sc_iomem.rm_type = RMAN_ARRAY; in ahci_attach()
211 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; in ahci_attach()
212 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { in ahci_attach()
216 if ((error = rman_manage_region(&ctlr->sc_iomem, in ahci_attach()
217 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { in ahci_attach()
219 rman_fini(&ctlr->sc_iomem); in ahci_attach()
223 version = ATA_INL(ctlr->r_mem, AHCI_VS); in ahci_attach()
224 ctlr->caps = ATA_INL(ctlr->r_mem, AHCI_CAP); in ahci_attach()
226 ctlr->caps2 = ATA_INL(ctlr->r_mem, AHCI_CAP2); in ahci_attach()
227 if (ctlr->caps & AHCI_CAP_EMS) in ahci_attach()
228 ctlr->capsem = ATA_INL(ctlr->r_mem, AHCI_EM_CTL); in ahci_attach()
230 if (ctlr->quirks & AHCI_Q_FORCE_PI) { in ahci_attach()
237 int nports = (ctlr->caps & AHCI_CAP_NPMASK) + 1; in ahci_attach()
238 int nmask = (1 << nports) - 1; in ahci_attach()
240 ATA_OUTL(ctlr->r_mem, AHCI_PI, nmask); in ahci_attach()
245 ctlr->ichannels = ATA_INL(ctlr->r_mem, AHCI_PI); in ahci_attach()
248 if ((ctlr->quirks & AHCI_Q_ALTSIG) && in ahci_attach()
249 (ctlr->caps & AHCI_CAP_SPM) == 0) in ahci_attach()
250 ctlr->quirks |= AHCI_Q_NOBSYRES; in ahci_attach()
252 if (ctlr->quirks & AHCI_Q_1CH) { in ahci_attach()
253 ctlr->caps &= ~AHCI_CAP_NPMASK; in ahci_attach()
254 ctlr->ichannels &= 0x01; in ahci_attach()
256 if (ctlr->quirks & AHCI_Q_2CH) { in ahci_attach()
257 ctlr->caps &= ~AHCI_CAP_NPMASK; in ahci_attach()
258 ctlr->caps |= 1; in ahci_attach()
259 ctlr->ichannels &= 0x03; in ahci_attach()
261 if (ctlr->quirks & AHCI_Q_4CH) { in ahci_attach()
262 ctlr->caps &= ~AHCI_CAP_NPMASK; in ahci_attach()
263 ctlr->caps |= 3; in ahci_attach()
264 ctlr->ichannels &= 0x0f; in ahci_attach()
266 ctlr->channels = MAX(flsl(ctlr->ichannels), in ahci_attach()
267 (ctlr->caps & AHCI_CAP_NPMASK) + 1); in ahci_attach()
268 if (ctlr->quirks & AHCI_Q_NOPMP) in ahci_attach()
269 ctlr->caps &= ~AHCI_CAP_SPM; in ahci_attach()
270 if (ctlr->quirks & AHCI_Q_NONCQ) in ahci_attach()
271 ctlr->caps &= ~AHCI_CAP_SNCQ; in ahci_attach()
272 if ((ctlr->caps & AHCI_CAP_CCCS) == 0) in ahci_attach()
273 ctlr->ccc = 0; in ahci_attach()
274 ctlr->emloc = ATA_INL(ctlr->r_mem, AHCI_EM_LOC); in ahci_attach()
276 /* Create controller-wide DMA tag. */ in ahci_attach()
278 (ctlr->caps & AHCI_CAP_64BIT) ? BUS_SPACE_MAXADDR : in ahci_attach()
281 ctlr->dma_coherent ? BUS_DMA_COHERENT : 0, NULL, NULL, in ahci_attach()
282 &ctlr->dma_tag)) { in ahci_attach()
284 rman_fini(&ctlr->sc_iomem); in ahci_attach()
292 bus_dma_tag_destroy(ctlr->dma_tag); in ahci_attach()
294 rman_fini(&ctlr->sc_iomem); in ahci_attach()
299 for (u = ctlr->ichannels; u != 0; u >>= 1) in ahci_attach()
301 ctlr->direct = (ctlr->msi && (ctlr->numirqs > 1 || i <= 3)); in ahci_attach()
303 "direct", &ctlr->direct); in ahci_attach()
305 speed = (ctlr->caps & AHCI_CAP_ISS) >> AHCI_CAP_ISS_SHIFT; in ahci_attach()
310 (ctlr->caps & AHCI_CAP_NPMASK) + 1, in ahci_attach()
313 (ctlr->caps & AHCI_CAP_SPM) ? in ahci_attach()
315 (ctlr->caps & AHCI_CAP_FBSS) ? in ahci_attach()
317 if (ctlr->quirks != 0) { in ahci_attach()
318 device_printf(dev, "quirks=0x%b\n", ctlr->quirks, in ahci_attach()
323 (ctlr->caps & AHCI_CAP_64BIT) ? " 64bit":"", in ahci_attach()
324 (ctlr->caps & AHCI_CAP_SNCQ) ? " NCQ":"", in ahci_attach()
325 (ctlr->caps & AHCI_CAP_SSNTF) ? " SNTF":"", in ahci_attach()
326 (ctlr->caps & AHCI_CAP_SMPS) ? " MPS":"", in ahci_attach()
327 (ctlr->caps & AHCI_CAP_SSS) ? " SS":"", in ahci_attach()
328 (ctlr->caps & AHCI_CAP_SALP) ? " ALP":"", in ahci_attach()
329 (ctlr->caps & AHCI_CAP_SAL) ? " AL":"", in ahci_attach()
330 (ctlr->caps & AHCI_CAP_SCLO) ? " CLO":"", in ahci_attach()
334 (ctlr->caps & AHCI_CAP_SAM) ? " AM":"", in ahci_attach()
335 (ctlr->caps & AHCI_CAP_SPM) ? " PM":"", in ahci_attach()
336 (ctlr->caps & AHCI_CAP_FBSS) ? " FBS":"", in ahci_attach()
337 (ctlr->caps & AHCI_CAP_PMD) ? " PMD":"", in ahci_attach()
338 (ctlr->caps & AHCI_CAP_SSC) ? " SSC":"", in ahci_attach()
339 (ctlr->caps & AHCI_CAP_PSC) ? " PSC":"", in ahci_attach()
340 ((ctlr->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1, in ahci_attach()
341 (ctlr->caps & AHCI_CAP_CCCS) ? " CCC":"", in ahci_attach()
342 (ctlr->caps & AHCI_CAP_EMS) ? " EM":"", in ahci_attach()
343 (ctlr->caps & AHCI_CAP_SXS) ? " eSATA":"", in ahci_attach()
344 (ctlr->caps & AHCI_CAP_NPMASK) + 1); in ahci_attach()
348 (ctlr->caps2 & AHCI_CAP2_DESO) ? " DESO":"", in ahci_attach()
349 (ctlr->caps2 & AHCI_CAP2_SADM) ? " SADM":"", in ahci_attach()
350 (ctlr->caps2 & AHCI_CAP2_SDS) ? " SDS":"", in ahci_attach()
351 (ctlr->caps2 & AHCI_CAP2_APST) ? " APST":"", in ahci_attach()
352 (ctlr->caps2 & AHCI_CAP2_NVMP) ? " NVMP":"", in ahci_attach()
353 (ctlr->caps2 & AHCI_CAP2_BOH) ? " BOH":""); in ahci_attach()
356 for (unit = 0; unit < ctlr->channels; unit++) { in ahci_attach()
363 if ((ctlr->ichannels & (1 << unit)) == 0) in ahci_attach()
367 for (; unit < ctlr->channels + ctlr->remapped_devices; unit++) { in ahci_attach()
376 int em = (ctlr->caps & AHCI_CAP_EMS) != 0; in ahci_attach()
402 for (i = 0; i < ctlr->numirqs; i++) { in ahci_detach()
403 if (ctlr->irqs[i].r_irq) { in ahci_detach()
404 bus_teardown_intr(dev, ctlr->irqs[i].r_irq, in ahci_detach()
405 ctlr->irqs[i].handle); in ahci_detach()
407 ctlr->irqs[i].r_irq_rid, ctlr->irqs[i].r_irq); in ahci_detach()
410 bus_dma_tag_destroy(ctlr->dma_tag); in ahci_detach()
412 rman_fini(&ctlr->sc_iomem); in ahci_detach()
414 mtx_destroy(&ctlr->ch_mtx); in ahci_detach()
424 if (ctlr->r_mem) in ahci_free_mem()
425 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); in ahci_free_mem()
426 if (ctlr->r_msix_table) in ahci_free_mem()
428 ctlr->r_msix_tab_rid, ctlr->r_msix_table); in ahci_free_mem()
429 if (ctlr->r_msix_pba) in ahci_free_mem()
431 ctlr->r_msix_pba_rid, ctlr->r_msix_pba); in ahci_free_mem()
433 ctlr->r_msix_pba = ctlr->r_mem = ctlr->r_msix_table = NULL; in ahci_free_mem()
443 if (ctlr->numirqs > 1 && in ahci_setup_interrupt()
444 (ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_MRSM) != 0) { in ahci_setup_interrupt()
446 ctlr->numirqs = 1; in ahci_setup_interrupt()
450 if (ctlr->numirqs > AHCI_MAX_IRQS) { in ahci_setup_interrupt()
452 ctlr->numirqs, AHCI_MAX_IRQS); in ahci_setup_interrupt()
453 ctlr->numirqs = AHCI_MAX_IRQS; in ahci_setup_interrupt()
457 for (i = 0; i < ctlr->numirqs; i++) { in ahci_setup_interrupt()
458 ctlr->irqs[i].ctlr = ctlr; in ahci_setup_interrupt()
459 ctlr->irqs[i].r_irq_rid = i + (ctlr->msi ? 1 : 0); in ahci_setup_interrupt()
460 if (ctlr->channels == 1 && !ctlr->ccc && ctlr->msi) in ahci_setup_interrupt()
461 ctlr->irqs[i].mode = AHCI_IRQ_MODE_ONE; in ahci_setup_interrupt()
462 else if (ctlr->numirqs == 1 || i >= ctlr->channels || in ahci_setup_interrupt()
463 (ctlr->ccc && i == ctlr->cccv)) in ahci_setup_interrupt()
464 ctlr->irqs[i].mode = AHCI_IRQ_MODE_ALL; in ahci_setup_interrupt()
465 else if (ctlr->channels > ctlr->numirqs && in ahci_setup_interrupt()
466 i == ctlr->numirqs - 1) in ahci_setup_interrupt()
467 ctlr->irqs[i].mode = AHCI_IRQ_MODE_AFTER; in ahci_setup_interrupt()
469 ctlr->irqs[i].mode = AHCI_IRQ_MODE_ONE; in ahci_setup_interrupt()
470 if (!(ctlr->irqs[i].r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, in ahci_setup_interrupt()
471 &ctlr->irqs[i].r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { in ahci_setup_interrupt()
475 if ((bus_setup_intr(dev, ctlr->irqs[i].r_irq, ATA_INTR_FLAGS, NULL, in ahci_setup_interrupt()
476 (ctlr->irqs[i].mode != AHCI_IRQ_MODE_ONE) ? ahci_intr : in ahci_setup_interrupt()
477 ((ctlr->quirks & AHCI_Q_EDGEIS) ? ahci_intr_one_edge : in ahci_setup_interrupt()
479 &ctlr->irqs[i], &ctlr->irqs[i].handle))) { in ahci_setup_interrupt()
484 if (ctlr->numirqs > 1) { in ahci_setup_interrupt()
485 bus_describe_intr(dev, ctlr->irqs[i].r_irq, in ahci_setup_interrupt()
486 ctlr->irqs[i].handle, in ahci_setup_interrupt()
487 ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE ? in ahci_setup_interrupt()
500 struct ahci_controller_irq *irq = data; in ahci_intr() local
501 struct ahci_controller *ctlr = irq->ctlr; in ahci_intr()
506 if (irq->mode == AHCI_IRQ_MODE_ALL) { in ahci_intr()
508 if (ctlr->ccc) in ahci_intr()
509 is = ctlr->ichannels; in ahci_intr()
511 is = ATA_INL(ctlr->r_mem, AHCI_IS); in ahci_intr()
513 unit = irq->r_irq_rid - 1; in ahci_intr()
514 is = ATA_INL(ctlr->r_mem, AHCI_IS); in ahci_intr()
518 if (ctlr->ccc) in ahci_intr()
519 ise = 1 << ctlr->cccv; in ahci_intr()
521 if (ctlr->quirks & AHCI_Q_EDGEIS) in ahci_intr()
524 ATA_OUTL(ctlr->r_mem, AHCI_IS, ise); in ahci_intr()
525 for (; unit < ctlr->channels; unit++) { in ahci_intr()
527 (arg = ctlr->interrupt[unit].argument)) { in ahci_intr()
528 ctlr->interrupt[unit].function(arg); in ahci_intr()
531 for (; unit < ctlr->channels + ctlr->remapped_devices; unit++) { in ahci_intr()
532 if ((arg = ctlr->interrupt[unit].argument)) { in ahci_intr()
533 ctlr->interrupt[unit].function(arg); in ahci_intr()
538 if (!(ctlr->quirks & AHCI_Q_EDGEIS)) in ahci_intr()
539 ATA_OUTL(ctlr->r_mem, AHCI_IS, is); in ahci_intr()
540 ATA_RBL(ctlr->r_mem, AHCI_IS); in ahci_intr()
549 struct ahci_controller_irq *irq = data; in ahci_intr_one() local
550 struct ahci_controller *ctlr = irq->ctlr; in ahci_intr_one()
554 unit = irq->r_irq_rid - 1; in ahci_intr_one()
555 if ((arg = ctlr->interrupt[unit].argument)) in ahci_intr_one()
556 ctlr->interrupt[unit].function(arg); in ahci_intr_one()
558 ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); in ahci_intr_one()
559 ATA_RBL(ctlr->r_mem, AHCI_IS); in ahci_intr_one()
565 struct ahci_controller_irq *irq = data; in ahci_intr_one_edge() local
566 struct ahci_controller *ctlr = irq->ctlr; in ahci_intr_one_edge()
570 unit = irq->r_irq_rid - 1; in ahci_intr_one_edge()
572 ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); in ahci_intr_one_edge()
573 if ((arg = ctlr->interrupt[unit].argument)) in ahci_intr_one_edge()
574 ctlr->interrupt[unit].function(arg); in ahci_intr_one_edge()
575 ATA_RBL(ctlr->r_mem, AHCI_IS); in ahci_intr_one_edge()
592 unit -= ctlr->channels; in ahci_alloc_resource()
602 offset = ctlr->remap_offset + unit * ctlr->remap_size; in ahci_alloc_resource()
603 size = ctlr->remap_size; in ahci_alloc_resource()
607 } else if ((ctlr->caps & AHCI_CAP_EMS) == 0) { in ahci_alloc_resource()
613 offset = (ctlr->emloc & 0xffff0000) >> 14; in ahci_alloc_resource()
614 size = (ctlr->emloc & 0x0000ffff) << 2; in ahci_alloc_resource()
616 if (*rid == 2 && (ctlr->capsem & in ahci_alloc_resource()
623 st = rman_get_start(ctlr->r_mem); in ahci_alloc_resource()
624 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, in ahci_alloc_resource()
625 st + offset + size - 1, size, RF_ACTIVE, child); in ahci_alloc_resource()
629 bsh = rman_get_bushandle(ctlr->r_mem); in ahci_alloc_resource()
630 bst = rman_get_bustag(ctlr->r_mem); in ahci_alloc_resource()
638 res = ctlr->irqs[0].r_irq; in ahci_alloc_resource()
661 ahci_setup_intr(device_t dev, device_t child, struct resource *irq, in ahci_setup_intr() argument
672 ctlr->interrupt[unit].function = function; in ahci_setup_intr()
673 ctlr->interrupt[unit].argument = argument; in ahci_setup_intr()
678 ahci_teardown_intr(device_t dev, device_t child, struct resource *irq, in ahci_teardown_intr() argument
684 ctlr->interrupt[unit].function = NULL; in ahci_teardown_intr()
685 ctlr->interrupt[unit].argument = NULL; in ahci_teardown_intr()
719 return (ctlr->dma_tag); in ahci_get_dma_tag()
727 mtx_lock(&ctlr->ch_mtx); in ahci_attached()
728 ctlr->ch[ch->unit] = ch; in ahci_attached()
729 mtx_unlock(&ctlr->ch_mtx); in ahci_attached()
737 mtx_lock(&ctlr->ch_mtx); in ahci_detached()
738 mtx_lock(&ch->mtx); in ahci_detached()
739 ctlr->ch[ch->unit] = NULL; in ahci_detached()
740 mtx_unlock(&ch->mtx); in ahci_detached()
741 mtx_unlock(&ctlr->ch_mtx); in ahci_detached()
751 mtx_lock(&ctlr->ch_mtx); in ahci_getch()
752 ch = ctlr->ch[n]; in ahci_getch()
754 mtx_lock(&ch->mtx); in ahci_getch()
755 mtx_unlock(&ctlr->ch_mtx); in ahci_getch()
763 mtx_unlock(&ch->mtx); in ahci_putch()
781 value = ch->disablephy; in ahci_ch_disablephy_proc()
783 if (error != 0 || req->newptr == NULL || (value != 0 && value != 1)) in ahci_ch_disablephy_proc()
786 mtx_lock(&ch->mtx); in ahci_ch_disablephy_proc()
787 ch->disablephy = value; in ahci_ch_disablephy_proc()
789 ahci_ch_deinit(ch->dev); in ahci_ch_disablephy_proc()
791 ahci_ch_init(ch->dev); in ahci_ch_disablephy_proc()
794 mtx_unlock(&ch->mtx); in ahci_ch_disablephy_proc()
810 ch->dev = dev; in ahci_ch_attach()
811 ch->unit = (intptr_t)device_get_ivars(dev); in ahci_ch_attach()
812 ch->caps = ctlr->caps; in ahci_ch_attach()
813 ch->caps2 = ctlr->caps2; in ahci_ch_attach()
814 ch->start = ctlr->ch_start; in ahci_ch_attach()
815 ch->quirks = ctlr->quirks; in ahci_ch_attach()
816 ch->vendorid = ctlr->vendorid; in ahci_ch_attach()
817 ch->deviceid = ctlr->deviceid; in ahci_ch_attach()
818 ch->subvendorid = ctlr->subvendorid; in ahci_ch_attach()
819 ch->subdeviceid = ctlr->subdeviceid; in ahci_ch_attach()
820 ch->numslots = ((ch->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1; in ahci_ch_attach()
821 mtx_init(&ch->mtx, "AHCI channel lock", NULL, MTX_DEF); in ahci_ch_attach()
822 ch->pm_level = 0; in ahci_ch_attach()
824 device_get_unit(dev), "pm_level", &ch->pm_level); in ahci_ch_attach()
825 STAILQ_INIT(&ch->doneq); in ahci_ch_attach()
826 if (ch->pm_level > 3) in ahci_ch_attach()
827 callout_init_mtx(&ch->pm_timer, &ch->mtx, 0); in ahci_ch_attach()
828 callout_init_mtx(&ch->reset_timer, &ch->mtx, 0); in ahci_ch_attach()
830 if ((ctlr->quirks & AHCI_Q_SATA1_UNIT0) && ch->unit == 0) in ahci_ch_attach()
832 if (ch->quirks & AHCI_Q_SATA2) in ahci_ch_attach()
837 ch->user[i].revision = sata_rev; in ahci_ch_attach()
838 ch->user[i].mode = 0; in ahci_ch_attach()
839 ch->user[i].bytecount = 8192; in ahci_ch_attach()
840 ch->user[i].tags = ch->numslots; in ahci_ch_attach()
841 ch->user[i].caps = 0; in ahci_ch_attach()
842 ch->curr[i] = ch->user[i]; in ahci_ch_attach()
843 if (ch->pm_level) { in ahci_ch_attach()
844 ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ | in ahci_ch_attach()
848 ch->user[i].caps |= CTS_SATA_CAPS_H_DMAAA | in ahci_ch_attach()
852 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, in ahci_ch_attach()
855 ch->chcaps = ATA_INL(ch->r_mem, AHCI_P_CMD); in ahci_ch_attach()
856 version = ATA_INL(ctlr->r_mem, AHCI_VS); in ahci_ch_attach()
857 if (version < 0x00010200 && (ctlr->caps & AHCI_CAP_FBSS)) in ahci_ch_attach()
858 ch->chcaps |= AHCI_P_CMD_FBSCP; in ahci_ch_attach()
859 if (ch->caps2 & AHCI_CAP2_SDS) in ahci_ch_attach()
860 ch->chscaps = ATA_INL(ch->r_mem, AHCI_P_DEVSLP); in ahci_ch_attach()
863 (ch->chcaps & AHCI_P_CMD_HPCP) ? " HPCP":"", in ahci_ch_attach()
864 (ch->chcaps & AHCI_P_CMD_MPSP) ? " MPSP":"", in ahci_ch_attach()
865 (ch->chcaps & AHCI_P_CMD_CPD) ? " CPD":"", in ahci_ch_attach()
866 (ch->chcaps & AHCI_P_CMD_ESP) ? " ESP":"", in ahci_ch_attach()
867 (ch->chcaps & AHCI_P_CMD_FBSCP) ? " FBSCP":"", in ahci_ch_attach()
868 (ch->chscaps & AHCI_P_DEVSLP_DSP) ? " DSP":""); in ahci_ch_attach()
872 mtx_lock(&ch->mtx); in ahci_ch_attach()
875 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, in ahci_ch_attach()
881 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, in ahci_ch_attach()
882 ctlr->direct ? ahci_ch_intr_direct : ahci_ch_intr, in ahci_ch_attach()
883 ch, &ch->ih))) { in ahci_ch_attach()
889 devq = cam_simq_alloc(ch->numslots); in ahci_ch_attach()
896 ch->sim = cam_sim_alloc(ahciaction, ahcipoll, "ahcich", ch, in ahci_ch_attach()
897 device_get_unit(dev), (struct mtx *)&ch->mtx, in ahci_ch_attach()
898 (ch->quirks & AHCI_Q_NOCCS) ? 1 : min(2, ch->numslots), in ahci_ch_attach()
899 (ch->caps & AHCI_CAP_SNCQ) ? ch->numslots : 0, in ahci_ch_attach()
901 if (ch->sim == NULL) { in ahci_ch_attach()
907 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { in ahci_ch_attach()
912 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), in ahci_ch_attach()
918 if (ch->pm_level > 3) { in ahci_ch_attach()
919 callout_reset(&ch->pm_timer, in ahci_ch_attach()
920 (ch->pm_level == 4) ? hz / 1000 : hz / 8, in ahci_ch_attach()
923 mtx_unlock(&ch->mtx); in ahci_ch_attach()
933 xpt_bus_deregister(cam_sim_path(ch->sim)); in ahci_ch_attach()
935 cam_sim_free(ch->sim, /*free_devq*/TRUE); in ahci_ch_attach()
937 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); in ahci_ch_attach()
939 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); in ahci_ch_attach()
940 mtx_unlock(&ch->mtx); in ahci_ch_attach()
941 mtx_destroy(&ch->mtx); in ahci_ch_attach()
951 mtx_lock(&ch->mtx); in ahci_ch_detach()
952 xpt_async(AC_LOST_DEVICE, ch->path, NULL); in ahci_ch_detach()
954 if (ch->resetting) { in ahci_ch_detach()
955 ch->resetting = 0; in ahci_ch_detach()
956 xpt_release_simq(ch->sim, TRUE); in ahci_ch_detach()
958 xpt_free_path(ch->path); in ahci_ch_detach()
959 xpt_bus_deregister(cam_sim_path(ch->sim)); in ahci_ch_detach()
960 cam_sim_free(ch->sim, /*free_devq*/TRUE); in ahci_ch_detach()
961 mtx_unlock(&ch->mtx); in ahci_ch_detach()
963 if (ch->pm_level > 3) in ahci_ch_detach()
964 callout_drain(&ch->pm_timer); in ahci_ch_detach()
965 callout_drain(&ch->reset_timer); in ahci_ch_detach()
966 bus_teardown_intr(dev, ch->r_irq, ch->ih); in ahci_ch_detach()
967 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); in ahci_ch_detach()
973 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); in ahci_ch_detach()
974 mtx_destroy(&ch->mtx); in ahci_ch_detach()
985 ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); in ahci_ch_init()
987 work = ch->dma.work_bus + AHCI_CL_OFFSET; in ahci_ch_init()
988 ATA_OUTL(ch->r_mem, AHCI_P_CLB, work & 0xffffffff); in ahci_ch_init()
989 ATA_OUTL(ch->r_mem, AHCI_P_CLBU, work >> 32); in ahci_ch_init()
990 work = ch->dma.rfis_bus; in ahci_ch_init()
991 ATA_OUTL(ch->r_mem, AHCI_P_FB, work & 0xffffffff); in ahci_ch_init()
992 ATA_OUTL(ch->r_mem, AHCI_P_FBU, work >> 32); in ahci_ch_init()
994 ATA_OUTL(ch->r_mem, AHCI_P_CMD, in ahci_ch_init()
996 ((ch->pm_level == 2 || ch->pm_level == 3) ? AHCI_P_CMD_ALPE : 0) | in ahci_ch_init()
997 ((ch->pm_level > 2) ? AHCI_P_CMD_ASP : 0 ))); in ahci_ch_init()
1009 ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); in ahci_ch_deinit()
1013 ATA_OUTL(ch->r_mem, AHCI_P_CMD, 0); in ahci_ch_deinit()
1015 ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 0); in ahci_ch_deinit()
1017 ATA_OUTL(ch->r_mem, AHCI_P_CMD, AHCI_P_CMD_SLUMBER); in ahci_ch_deinit()
1020 ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); in ahci_ch_deinit()
1029 mtx_lock(&ch->mtx); in ahci_ch_suspend()
1030 xpt_freeze_simq(ch->sim, 1); in ahci_ch_suspend()
1032 if (ch->resetting) { in ahci_ch_suspend()
1033 ch->resetting = 0; in ahci_ch_suspend()
1034 callout_stop(&ch->reset_timer); in ahci_ch_suspend()
1035 xpt_release_simq(ch->sim, TRUE); in ahci_ch_suspend()
1037 while (ch->oslots) in ahci_ch_suspend()
1038 msleep(ch, &ch->mtx, PRIBIO, "ahcisusp", hz/100); in ahci_ch_suspend()
1040 mtx_unlock(&ch->mtx); in ahci_ch_suspend()
1049 mtx_lock(&ch->mtx); in ahci_ch_resume()
1052 xpt_release_simq(ch->sim, TRUE); in ahci_ch_resume()
1053 mtx_unlock(&ch->mtx); in ahci_ch_resume()
1089 0, NULL, NULL, &ch->dma.work_tag); in ahci_dmainit()
1092 error = bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, in ahci_dmainit()
1093 BUS_DMA_ZERO, &ch->dma.work_map); in ahci_dmainit()
1096 error = bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, in ahci_dmainit()
1099 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); in ahci_dmainit()
1102 ch->dma.work_bus = dcba.maddr; in ahci_dmainit()
1104 if (ch->chcaps & AHCI_P_CMD_FBSCP) in ahci_dmainit()
1111 0, NULL, NULL, &ch->dma.rfis_tag); in ahci_dmainit()
1114 error = bus_dmamem_alloc(ch->dma.rfis_tag, (void **)&ch->dma.rfis, 0, in ahci_dmainit()
1115 &ch->dma.rfis_map); in ahci_dmainit()
1118 error = bus_dmamap_load(ch->dma.rfis_tag, ch->dma.rfis_map, ch->dma.rfis, in ahci_dmainit()
1121 bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); in ahci_dmainit()
1124 ch->dma.rfis_bus = dcba.maddr; in ahci_dmainit()
1130 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag); in ahci_dmainit()
1136 device_printf(dev, "WARNING - DMA initialization failed, error %d\n", in ahci_dmainit()
1146 if (!(dcba->error = error)) in ahci_dmasetupc_cb()
1147 dcba->maddr = segs[0].ds_addr; in ahci_dmasetupc_cb()
1155 if (ch->dma.data_tag) { in ahci_dmafini()
1156 bus_dma_tag_destroy(ch->dma.data_tag); in ahci_dmafini()
1157 ch->dma.data_tag = NULL; in ahci_dmafini()
1159 if (ch->dma.rfis_bus) { in ahci_dmafini()
1160 bus_dmamap_unload(ch->dma.rfis_tag, ch->dma.rfis_map); in ahci_dmafini()
1161 bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); in ahci_dmafini()
1162 ch->dma.rfis_bus = 0; in ahci_dmafini()
1163 ch->dma.rfis = NULL; in ahci_dmafini()
1165 if (ch->dma.work_bus) { in ahci_dmafini()
1166 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); in ahci_dmafini()
1167 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); in ahci_dmafini()
1168 ch->dma.work_bus = 0; in ahci_dmafini()
1169 ch->dma.work = NULL; in ahci_dmafini()
1171 if (ch->dma.work_tag) { in ahci_dmafini()
1172 bus_dma_tag_destroy(ch->dma.work_tag); in ahci_dmafini()
1173 ch->dma.work_tag = NULL; in ahci_dmafini()
1184 bzero(ch->slot, sizeof(ch->slot)); in ahci_slotsalloc()
1185 for (i = 0; i < ch->numslots; i++) { in ahci_slotsalloc()
1186 struct ahci_slot *slot = &ch->slot[i]; in ahci_slotsalloc()
1188 slot->ch = ch; in ahci_slotsalloc()
1189 slot->slot = i; in ahci_slotsalloc()
1190 slot->state = AHCI_SLOT_EMPTY; in ahci_slotsalloc()
1191 slot->ct_offset = AHCI_CT_OFFSET + AHCI_CT_SIZE * i; in ahci_slotsalloc()
1192 slot->ccb = NULL; in ahci_slotsalloc()
1193 callout_init_mtx(&slot->timeout, &ch->mtx, 0); in ahci_slotsalloc()
1195 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) in ahci_slotsalloc()
1196 device_printf(ch->dev, "FAILURE - create data_map\n"); in ahci_slotsalloc()
1207 for (i = 0; i < ch->numslots; i++) { in ahci_slotsfree()
1208 struct ahci_slot *slot = &ch->slot[i]; in ahci_slotsfree()
1210 callout_drain(&slot->timeout); in ahci_slotsfree()
1211 if (slot->dma.data_map) { in ahci_slotsfree()
1212 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); in ahci_slotsfree()
1213 slot->dma.data_map = NULL; in ahci_slotsfree()
1222 if (((ch->pm_level == 0) && (serr & ATA_SE_PHY_CHANGED)) || in ahci_phy_check_events()
1223 ((ch->pm_level != 0 || ch->listening) && (serr & ATA_SE_EXCHANGED))) { in ahci_phy_check_events()
1224 u_int32_t status = ATA_INL(ch->r_mem, AHCI_P_SSTS); in ahci_phy_check_events() local
1228 if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) in ahci_phy_check_events()
1229 device_printf(ch->dev, "CONNECT requested\n"); in ahci_phy_check_events()
1231 device_printf(ch->dev, "DISCONNECT requested\n"); in ahci_phy_check_events()
1236 if (xpt_create_path(&ccb->ccb_h.path, NULL, in ahci_phy_check_events()
1237 cam_sim_path(ch->sim), in ahci_phy_check_events()
1251 u_int32_t status; in ahci_cpd_check_events() local
1255 if (ch->pm_level == 0) in ahci_cpd_check_events()
1258 status = ATA_INL(ch->r_mem, AHCI_P_CMD); in ahci_cpd_check_events()
1259 if ((status & AHCI_P_CMD_CPD) == 0) in ahci_cpd_check_events()
1263 dev = ch->dev; in ahci_cpd_check_events()
1264 if (status & AHCI_P_CMD_CPS) { in ahci_cpd_check_events()
1272 if (xpt_create_path(&ccb->ccb_h.path, NULL, cam_sim_path(ch->sim), in ahci_cpd_check_events()
1281 ahci_notify_events(struct ahci_channel *ch, u_int32_t status) in ahci_notify_events() argument
1286 if (ch->caps & AHCI_CAP_SSNTF) in ahci_notify_events()
1287 ATA_OUTL(ch->r_mem, AHCI_P_SNTF, status); in ahci_notify_events()
1289 device_printf(ch->dev, "SNTF 0x%04x\n", status); in ahci_notify_events()
1291 if ((status & (1 << i)) == 0) in ahci_notify_events()
1294 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { in ahci_notify_events()
1305 mtx_assert(&ch->mtx, MA_OWNED); in ahci_done()
1306 if ((ccb->ccb_h.func_code & XPT_FC_QUEUED) == 0 || in ahci_done()
1307 ch->batch == 0) { in ahci_done()
1312 STAILQ_INSERT_TAIL(&ch->doneq, &ccb->ccb_h, sim_links.stqe); in ahci_done()
1321 /* Read interrupt statuses. */ in ahci_ch_intr()
1322 istatus = ATA_INL(ch->r_mem, AHCI_P_IS); in ahci_ch_intr()
1324 mtx_lock(&ch->mtx); in ahci_ch_intr()
1326 mtx_unlock(&ch->mtx); in ahci_ch_intr()
1337 /* Read interrupt statuses. */ in ahci_ch_intr_direct()
1338 istatus = ATA_INL(ch->r_mem, AHCI_P_IS); in ahci_ch_intr_direct()
1340 mtx_lock(&ch->mtx); in ahci_ch_intr_direct()
1341 ch->batch = 1; in ahci_ch_intr_direct()
1343 ch->batch = 0; in ahci_ch_intr_direct()
1348 STAILQ_CONCAT(&tmp_doneq, &ch->doneq); in ahci_ch_intr_direct()
1349 mtx_unlock(&ch->mtx); in ahci_ch_intr_direct()
1362 if (ch->numrslots != 0) in ahci_ch_pm()
1364 work = ATA_INL(ch->r_mem, AHCI_P_CMD); in ahci_ch_pm()
1365 if (ch->pm_level == 4) in ahci_ch_pm()
1369 ATA_OUTL(ch->r_mem, AHCI_P_CMD, work); in ahci_ch_pm()
1380 ATA_OUTL(ch->r_mem, AHCI_P_IS, istatus); in ahci_ch_intr_main()
1381 /* Read command statuses. */ in ahci_ch_intr_main()
1382 if (ch->numtslots != 0) in ahci_ch_intr_main()
1383 cstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); in ahci_ch_intr_main()
1386 if (ch->numrslots != ch->numtslots) in ahci_ch_intr_main()
1387 cstatus |= ATA_INL(ch->r_mem, AHCI_P_CI); in ahci_ch_intr_main()
1388 /* Read SNTF in one of possible ways. */ in ahci_ch_intr_main()
1390 (ch->pm_present || ch->curr[0].atapi != 0)) { in ahci_ch_intr_main()
1391 if (ch->caps & AHCI_CAP_SSNTF) in ahci_ch_intr_main()
1392 sntf = ATA_INL(ch->r_mem, AHCI_P_SNTF); in ahci_ch_intr_main()
1393 else if (ch->fbs_enabled) { in ahci_ch_intr_main()
1394 u_int8_t *fis = ch->dma.rfis + 0x58; in ahci_ch_intr_main()
1404 u_int8_t *fis = ch->dma.rfis + 0x58; in ahci_ch_intr_main()
1413 serr = ATA_INL(ch->r_mem, AHCI_P_SERR); in ahci_ch_intr_main()
1415 ATA_OUTL(ch->r_mem, AHCI_P_SERR, serr); in ahci_ch_intr_main()
1425 if (ch->quirks & AHCI_Q_NOCCS) { in ahci_ch_intr_main()
1430 cstatus |= ch->rslots; in ahci_ch_intr_main()
1433 ccs = powerof2(cstatus) ? ffs(cstatus) - 1 : -1; in ahci_ch_intr_main()
1435 ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & in ahci_ch_intr_main()
1439 // __func__, istatus, cstatus, sstatus, ch->rslots, ATA_INL(ch->r_mem, AHCI_P_TFD), in ahci_ch_intr_main()
1440 // serr, ATA_INL(ch->r_mem, AHCI_P_FBS), ccs); in ahci_ch_intr_main()
1441 port = -1; in ahci_ch_intr_main()
1442 if (ch->fbs_enabled) { in ahci_ch_intr_main()
1443 uint32_t fbs = ATA_INL(ch->r_mem, AHCI_P_FBS); in ahci_ch_intr_main()
1449 if (ch->numrslotspd[i] == 0) in ahci_ch_intr_main()
1451 if (port == -1) in ahci_ch_intr_main()
1454 port = -2; in ahci_ch_intr_main()
1460 err = ch->rslots & cstatus; in ahci_ch_intr_main()
1464 port = -1; in ahci_ch_intr_main()
1467 ok = ch->rslots & ~cstatus; in ahci_ch_intr_main()
1468 for (i = 0; i < ch->numslots; i++) { in ahci_ch_intr_main()
1470 ahci_end_transaction(&ch->slot[i], AHCI_ERR_NONE); in ahci_ch_intr_main()
1474 if (ch->frozen) { in ahci_ch_intr_main()
1475 union ccb *fccb = ch->frozen; in ahci_ch_intr_main()
1476 ch->frozen = NULL; in ahci_ch_intr_main()
1477 fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; in ahci_ch_intr_main()
1478 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { in ahci_ch_intr_main()
1479 xpt_freeze_devq(fccb->ccb_h.path, 1); in ahci_ch_intr_main()
1480 fccb->ccb_h.status |= CAM_DEV_QFRZN; in ahci_ch_intr_main()
1484 for (i = 0; i < ch->numslots; i++) { in ahci_ch_intr_main()
1489 ch->slot[i].ccb->ccb_h.target_id != port) in ahci_ch_intr_main()
1492 if (port != -2) { in ahci_ch_intr_main()
1494 if (ch->numtslotspd[ in ahci_ch_intr_main()
1495 ch->slot[i].ccb->ccb_h.target_id] == 0) { in ahci_ch_intr_main()
1507 ch->fatalerr = 1; in ahci_ch_intr_main()
1510 if (ch->numtslots == 0 && i != ccs && port != -2) in ahci_ch_intr_main()
1516 ahci_end_transaction(&ch->slot[i], et); in ahci_ch_intr_main()
1522 if (ch->rslots != 0 && !ch->recoverycmd) in ahci_ch_intr_main()
1523 ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | AHCI_P_FBS_DEC); in ahci_ch_intr_main()
1534 int t = ccb->ccb_h.target_id; in ahci_check_collision()
1536 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && in ahci_check_collision()
1537 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { in ahci_check_collision()
1539 if (((~ch->oslots) & (0xffffffff >> (32 - in ahci_check_collision()
1540 ch->curr[t].tags))) == 0) in ahci_check_collision()
1543 if (ch->fbs_enabled) { in ahci_check_collision()
1545 if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] == 0) in ahci_check_collision()
1549 if (ch->numrslots != 0 && ch->numtslots == 0) in ahci_check_collision()
1552 if (ch->numtslots != 0 && in ahci_check_collision()
1553 ch->taggedtarget != ccb->ccb_h.target_id) in ahci_check_collision()
1558 if (ch->fbs_enabled) { in ahci_check_collision()
1560 if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] != 0) in ahci_check_collision()
1564 if (ch->numrslots != 0 && ch->numtslots != 0) in ahci_check_collision()
1568 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && in ahci_check_collision()
1569 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { in ahci_check_collision()
1571 if (ch->numrslots != 0) in ahci_check_collision()
1575 if (ch->aslots != 0) in ahci_check_collision()
1588 tags = ch->numslots; in ahci_begin_transaction()
1589 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && in ahci_begin_transaction()
1590 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) in ahci_begin_transaction()
1591 tags = ch->curr[ccb->ccb_h.target_id].tags; in ahci_begin_transaction()
1592 if (ch->lastslot + 1 < tags) in ahci_begin_transaction()
1593 tag = ffs(~(ch->oslots >> (ch->lastslot + 1))); in ahci_begin_transaction()
1596 if (tag == 0 || tag + ch->lastslot >= tags) in ahci_begin_transaction()
1597 tag = ffs(~ch->oslots) - 1; in ahci_begin_transaction()
1599 tag += ch->lastslot; in ahci_begin_transaction()
1600 ch->lastslot = tag; in ahci_begin_transaction()
1602 slot = &ch->slot[tag]; in ahci_begin_transaction()
1603 slot->ccb = ccb; in ahci_begin_transaction()
1605 if (ch->numrslots == 0 && ch->pm_level > 3) in ahci_begin_transaction()
1606 callout_stop(&ch->pm_timer); in ahci_begin_transaction()
1608 ch->oslots |= (1 << tag); in ahci_begin_transaction()
1609 ch->numrslots++; in ahci_begin_transaction()
1610 ch->numrslotspd[ccb->ccb_h.target_id]++; in ahci_begin_transaction()
1611 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && in ahci_begin_transaction()
1612 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { in ahci_begin_transaction()
1613 ch->numtslots++; in ahci_begin_transaction()
1614 ch->numtslotspd[ccb->ccb_h.target_id]++; in ahci_begin_transaction()
1615 ch->taggedtarget = ccb->ccb_h.target_id; in ahci_begin_transaction()
1617 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && in ahci_begin_transaction()
1618 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) in ahci_begin_transaction()
1619 ch->aslots |= (1 << tag); in ahci_begin_transaction()
1620 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { in ahci_begin_transaction()
1621 slot->state = AHCI_SLOT_LOADING; in ahci_begin_transaction()
1622 bus_dmamap_load_ccb(ch->dma.data_tag, slot->dma.data_map, ccb, in ahci_begin_transaction()
1625 slot->dma.nsegs = 0; in ahci_begin_transaction()
1635 struct ahci_channel *ch = slot->ch; in ahci_dmasetprd()
1641 device_printf(ch->dev, "DMA load error\n"); in ahci_dmasetprd()
1647 ctp = (struct ahci_cmd_tab *)(ch->dma.work + slot->ct_offset); in ahci_dmasetprd()
1649 prd = &ctp->prd_tab[0]; in ahci_dmasetprd()
1652 prd[i].dbc = htole32((segs[i].ds_len - 1) & AHCI_PRD_MASK); in ahci_dmasetprd()
1654 slot->dma.nsegs = nsegs; in ahci_dmasetprd()
1655 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, in ahci_dmasetprd()
1656 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? in ahci_dmasetprd()
1665 struct ahci_channel *ch = slot->ch; in ahci_execute_transaction()
1668 union ccb *ccb = slot->ccb; in ahci_execute_transaction()
1669 int port = ccb->ccb_h.target_id & 0x0f; in ahci_execute_transaction()
1671 uint8_t *fis = ch->dma.rfis + 0x40; in ahci_execute_transaction()
1676 ctp = (struct ahci_cmd_tab *)(ch->dma.work + slot->ct_offset); in ahci_execute_transaction()
1678 if (!(fis_size = ahci_setup_fis(ch, ctp, ccb, slot->slot))) { in ahci_execute_transaction()
1679 device_printf(ch->dev, "Setting up SATA FIS failed\n"); in ahci_execute_transaction()
1685 (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); in ahci_execute_transaction()
1687 (ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) | in ahci_execute_transaction()
1688 (ccb->ccb_h.func_code == XPT_SCSI_IO ? in ahci_execute_transaction()
1692 clp->prd_length = htole16(slot->dma.nsegs); in ahci_execute_transaction()
1694 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && in ahci_execute_transaction()
1695 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) { in ahci_execute_transaction()
1696 if (ccb->ataio.cmd.control & ATA_A_RESET) { in ahci_execute_transaction()
1711 clp->bytecount = 0; in ahci_execute_transaction()
1712 clp->cmd_flags = htole16(cmd_flags); in ahci_execute_transaction()
1713 clp->cmd_table_phys = htole64(ch->dma.work_bus + slot->ct_offset); in ahci_execute_transaction()
1714 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, in ahci_execute_transaction()
1716 bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, in ahci_execute_transaction()
1719 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && in ahci_execute_transaction()
1720 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { in ahci_execute_transaction()
1721 ATA_OUTL(ch->r_mem, AHCI_P_SACT, 1 << slot->slot); in ahci_execute_transaction()
1724 if (ch->fbs_enabled) { in ahci_execute_transaction()
1725 ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | in ahci_execute_transaction()
1729 slot->state = AHCI_SLOT_RUNNING; in ahci_execute_transaction()
1730 ch->rslots |= (1 << slot->slot); in ahci_execute_transaction()
1731 ATA_OUTL(ch->r_mem, AHCI_P_CI, (1 << slot->slot)); in ahci_execute_transaction()
1733 if (ccb->ccb_h.func_code == XPT_ATA_IO && in ahci_execute_transaction()
1734 (ccb->ataio.cmd.command == ATA_DEVICE_RESET || softreset)) { in ahci_execute_transaction()
1735 int count, timeout = ccb->ccb_h.timeout * 100; in ahci_execute_transaction()
1740 if (!(ATA_INL(ch->r_mem, AHCI_P_CI) & (1 << slot->slot))) in ahci_execute_transaction()
1742 if ((ATA_INL(ch->r_mem, AHCI_P_TFD) & ATA_S_ERROR) && in ahci_execute_transaction()
1745 device_printf(ch->dev, in ahci_execute_transaction()
1747 slot->slot, ATA_INL(ch->r_mem, AHCI_P_TFD)); in ahci_execute_transaction()
1753 if (ccb->ccb_h.target_id == 15 && in ahci_execute_transaction()
1754 (ch->quirks & AHCI_Q_ATI_PMP_BUG) && in ahci_execute_transaction()
1755 (ATA_INL(ch->r_mem, AHCI_P_IS) & AHCI_P_IX_IPM)) { in ahci_execute_transaction()
1766 if (ch->quirks & AHCI_Q_MRVL_SR_DEL) in ahci_execute_transaction()
1770 * Marvell HBAs with non-RAID firmware do not wait for in ahci_execute_transaction()
1776 if ((ch->quirks & AHCI_Q_NOBSYRES) == 0 && in ahci_execute_transaction()
1777 (ch->quirks & AHCI_Q_ATI_PMP_BUG) == 0 && in ahci_execute_transaction()
1780 bus_dmamap_sync(ch->dma.rfis_tag, in ahci_execute_transaction()
1781 ch->dma.rfis_map, BUS_DMASYNC_POSTREAD); in ahci_execute_transaction()
1783 bus_dmamap_sync(ch->dma.rfis_tag, in ahci_execute_transaction()
1784 ch->dma.rfis_map, BUS_DMASYNC_PREREAD); in ahci_execute_transaction()
1792 device_printf(ch->dev, "Poll timeout on slot %d port %d\n", in ahci_execute_transaction()
1793 slot->slot, port); in ahci_execute_transaction()
1794 device_printf(ch->dev, "is %08x cs %08x ss %08x " in ahci_execute_transaction()
1796 ATA_INL(ch->r_mem, AHCI_P_IS), in ahci_execute_transaction()
1797 ATA_INL(ch->r_mem, AHCI_P_CI), in ahci_execute_transaction()
1798 ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, in ahci_execute_transaction()
1799 ATA_INL(ch->r_mem, AHCI_P_TFD), in ahci_execute_transaction()
1800 ATA_INL(ch->r_mem, AHCI_P_SERR), in ahci_execute_transaction()
1801 ATA_INL(ch->r_mem, AHCI_P_CMD)); in ahci_execute_transaction()
1807 ch->eslots |= (1 << slot->slot); in ahci_execute_transaction()
1812 callout_reset_sbt(&slot->timeout, SBT_1MS * ccb->ccb_h.timeout / 2, in ahci_execute_transaction()
1823 mtx_assert(&ch->mtx, MA_OWNED); in ahci_process_timeout()
1825 for (i = 0; i < ch->numslots; i++) { in ahci_process_timeout()
1827 if (ch->slot[i].state < AHCI_SLOT_RUNNING) in ahci_process_timeout()
1829 ahci_end_transaction(&ch->slot[i], AHCI_ERR_TIMEOUT); in ahci_process_timeout()
1839 mtx_assert(&ch->mtx, MA_OWNED); in ahci_rearm_timeout()
1840 for (i = 0; i < ch->numslots; i++) { in ahci_rearm_timeout()
1841 struct ahci_slot *slot = &ch->slot[i]; in ahci_rearm_timeout()
1844 if (slot->state < AHCI_SLOT_RUNNING) in ahci_rearm_timeout()
1846 if ((ch->toslots & (1 << i)) == 0) in ahci_rearm_timeout()
1848 callout_reset_sbt(&slot->timeout, in ahci_rearm_timeout()
1849 SBT_1MS * slot->ccb->ccb_h.timeout / 2, 0, in ahci_rearm_timeout()
1859 struct ahci_channel *ch = slot->ch; in ahci_timeout()
1860 device_t dev = ch->dev; in ahci_timeout()
1866 if (slot->state < AHCI_SLOT_RUNNING) in ahci_timeout()
1870 if (slot->state < AHCI_SLOT_EXECUTING) { in ahci_timeout()
1872 sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); in ahci_timeout()
1873 ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) in ahci_timeout()
1875 if ((sstatus & (1 << slot->slot)) != 0 || ccs == slot->slot || in ahci_timeout()
1876 ch->fbs_enabled || ch->wrongccs) in ahci_timeout()
1877 slot->state = AHCI_SLOT_EXECUTING; in ahci_timeout()
1878 else if ((ch->rslots & (1 << ccs)) == 0) { in ahci_timeout()
1879 ch->wrongccs = 1; in ahci_timeout()
1880 slot->state = AHCI_SLOT_EXECUTING; in ahci_timeout()
1883 callout_reset_sbt(&slot->timeout, in ahci_timeout()
1884 SBT_1MS * slot->ccb->ccb_h.timeout / 2, 0, in ahci_timeout()
1890 slot->slot, slot->ccb->ccb_h.target_id & 0x0f); in ahci_timeout()
1893 ATA_INL(ch->r_mem, AHCI_P_IS), ATA_INL(ch->r_mem, AHCI_P_CI), in ahci_timeout()
1894 ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, in ahci_timeout()
1895 ATA_INL(ch->r_mem, AHCI_P_TFD), ATA_INL(ch->r_mem, AHCI_P_SERR), in ahci_timeout()
1896 ATA_INL(ch->r_mem, AHCI_P_CMD)); in ahci_timeout()
1899 if (ch->frozen) { in ahci_timeout()
1900 union ccb *fccb = ch->frozen; in ahci_timeout()
1901 ch->frozen = NULL; in ahci_timeout()
1902 fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; in ahci_timeout()
1903 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { in ahci_timeout()
1904 xpt_freeze_devq(fccb->ccb_h.path, 1); in ahci_timeout()
1905 fccb->ccb_h.status |= CAM_DEV_QFRZN; in ahci_timeout()
1909 if (!ch->fbs_enabled && !ch->wrongccs) { in ahci_timeout()
1911 ch->fatalerr = 1; in ahci_timeout()
1913 ahci_end_transaction(&ch->slot[slot->slot], AHCI_ERR_TIMEOUT); in ahci_timeout()
1915 for (i = 0; i < ch->numslots; i++) { in ahci_timeout()
1917 if (ch->slot[i].state < AHCI_SLOT_RUNNING) in ahci_timeout()
1919 ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); in ahci_timeout()
1923 if (ch->toslots == 0) in ahci_timeout()
1924 xpt_freeze_simq(ch->sim, 1); in ahci_timeout()
1925 ch->toslots |= (1 << slot->slot); in ahci_timeout()
1926 if ((ch->rslots & ~ch->toslots) == 0) in ahci_timeout()
1930 ch->rslots & ~ch->toslots); in ahci_timeout()
1938 struct ahci_channel *ch = slot->ch; in ahci_end_transaction()
1939 union ccb *ccb = slot->ccb; in ahci_end_transaction()
1944 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, in ahci_end_transaction()
1947 (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); in ahci_end_transaction()
1948 /* Read result registers to the result struct in ahci_end_transaction()
1950 * so read only when sure or have to. in ahci_end_transaction()
1952 if (ccb->ccb_h.func_code == XPT_ATA_IO) { in ahci_end_transaction()
1953 struct ata_res *res = &ccb->ataio.res; in ahci_end_transaction()
1956 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { in ahci_end_transaction()
1957 u_int8_t *fis = ch->dma.rfis + 0x40; in ahci_end_transaction()
1959 bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, in ahci_end_transaction()
1961 if (ch->fbs_enabled) { in ahci_end_transaction()
1962 fis += ccb->ccb_h.target_id * 256; in ahci_end_transaction()
1963 res->status = fis[2]; in ahci_end_transaction()
1964 res->error = fis[3]; in ahci_end_transaction()
1966 uint16_t tfd = ATA_INL(ch->r_mem, AHCI_P_TFD); in ahci_end_transaction()
1968 res->status = tfd; in ahci_end_transaction()
1969 res->error = tfd >> 8; in ahci_end_transaction()
1971 res->lba_low = fis[4]; in ahci_end_transaction()
1972 res->lba_mid = fis[5]; in ahci_end_transaction()
1973 res->lba_high = fis[6]; in ahci_end_transaction()
1974 res->device = fis[7]; in ahci_end_transaction()
1975 res->lba_low_exp = fis[8]; in ahci_end_transaction()
1976 res->lba_mid_exp = fis[9]; in ahci_end_transaction()
1977 res->lba_high_exp = fis[10]; in ahci_end_transaction()
1978 res->sector_count = fis[12]; in ahci_end_transaction()
1979 res->sector_count_exp = fis[13]; in ahci_end_transaction()
1983 * FIS receive area. Read it from PxSIG register. in ahci_end_transaction()
1985 if ((ch->quirks & AHCI_Q_ALTSIG) && in ahci_end_transaction()
1986 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && in ahci_end_transaction()
1987 (ccb->ataio.cmd.control & ATA_A_RESET) == 0) { in ahci_end_transaction()
1988 sig = ATA_INL(ch->r_mem, AHCI_P_SIG); in ahci_end_transaction()
1989 res->lba_high = sig >> 24; in ahci_end_transaction()
1990 res->lba_mid = sig >> 16; in ahci_end_transaction()
1991 res->lba_low = sig >> 8; in ahci_end_transaction()
1992 res->sector_count = sig; in ahci_end_transaction()
1996 if ((ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) == 0 && in ahci_end_transaction()
1997 (ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && in ahci_end_transaction()
1998 (ch->quirks & AHCI_Q_NOCOUNT) == 0) { in ahci_end_transaction()
1999 ccb->ataio.resid = in ahci_end_transaction()
2000 ccb->ataio.dxfer_len - le32toh(clp->bytecount); in ahci_end_transaction()
2003 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && in ahci_end_transaction()
2004 (ch->quirks & AHCI_Q_NOCOUNT) == 0) { in ahci_end_transaction()
2005 ccb->csio.resid = in ahci_end_transaction()
2006 ccb->csio.dxfer_len - le32toh(clp->bytecount); in ahci_end_transaction()
2009 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { in ahci_end_transaction()
2010 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, in ahci_end_transaction()
2011 (ccb->ccb_h.flags & CAM_DIR_IN) ? in ahci_end_transaction()
2013 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); in ahci_end_transaction()
2016 ch->eslots |= (1 << slot->slot); in ahci_end_transaction()
2018 if ((et != AHCI_ERR_NONE) && (!ch->recoverycmd) && in ahci_end_transaction()
2019 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { in ahci_end_transaction()
2020 xpt_freeze_devq(ccb->ccb_h.path, 1); in ahci_end_transaction()
2021 ccb->ccb_h.status |= CAM_DEV_QFRZN; in ahci_end_transaction()
2023 /* Set proper result status. */ in ahci_end_transaction()
2024 ccb->ccb_h.status &= ~CAM_STATUS_MASK; in ahci_end_transaction()
2027 ccb->ccb_h.status |= CAM_REQ_CMP; in ahci_end_transaction()
2028 if (ccb->ccb_h.func_code == XPT_SCSI_IO) in ahci_end_transaction()
2029 ccb->csio.scsi_status = SCSI_STATUS_OK; in ahci_end_transaction()
2032 ch->fatalerr = 1; in ahci_end_transaction()
2033 ccb->ccb_h.status |= CAM_REQ_INVALID; in ahci_end_transaction()
2036 ccb->ccb_h.status |= CAM_REQUEUE_REQ; in ahci_end_transaction()
2040 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { in ahci_end_transaction()
2041 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; in ahci_end_transaction()
2042 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; in ahci_end_transaction()
2044 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; in ahci_end_transaction()
2048 ch->fatalerr = 1; in ahci_end_transaction()
2049 if (!ch->recoverycmd) { in ahci_end_transaction()
2050 xpt_freeze_simq(ch->sim, 1); in ahci_end_transaction()
2051 ccb->ccb_h.status &= ~CAM_STATUS_MASK; in ahci_end_transaction()
2052 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; in ahci_end_transaction()
2054 ccb->ccb_h.status |= CAM_UNCOR_PARITY; in ahci_end_transaction()
2057 if (!ch->recoverycmd) { in ahci_end_transaction()
2058 xpt_freeze_simq(ch->sim, 1); in ahci_end_transaction()
2059 ccb->ccb_h.status &= ~CAM_STATUS_MASK; in ahci_end_transaction()
2060 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; in ahci_end_transaction()
2062 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; in ahci_end_transaction()
2065 ch->fatalerr = 1; in ahci_end_transaction()
2066 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; in ahci_end_transaction()
2069 ch->oslots &= ~(1 << slot->slot); in ahci_end_transaction()
2070 ch->rslots &= ~(1 << slot->slot); in ahci_end_transaction()
2071 ch->aslots &= ~(1 << slot->slot); in ahci_end_transaction()
2072 slot->state = AHCI_SLOT_EMPTY; in ahci_end_transaction()
2073 slot->ccb = NULL; in ahci_end_transaction()
2075 ch->numrslots--; in ahci_end_transaction()
2076 ch->numrslotspd[ccb->ccb_h.target_id]--; in ahci_end_transaction()
2077 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && in ahci_end_transaction()
2078 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { in ahci_end_transaction()
2079 ch->numtslots--; in ahci_end_transaction()
2080 ch->numtslotspd[ccb->ccb_h.target_id]--; in ahci_end_transaction()
2084 lastto = (ch->toslots == (1 << slot->slot)); in ahci_end_transaction()
2085 ch->toslots &= ~(1 << slot->slot); in ahci_end_transaction()
2087 xpt_release_simq(ch->sim, TRUE); in ahci_end_transaction()
2091 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && in ahci_end_transaction()
2092 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && in ahci_end_transaction()
2093 (ccb->ataio.cmd.control & ATA_A_RESET) && in ahci_end_transaction()
2095 ccb->ataio.cmd.control &= ~ATA_A_RESET; in ahci_end_transaction()
2099 /* If it was our READ LOG command - process it. */ in ahci_end_transaction()
2100 if (ccb->ccb_h.recovery_type == RECOVERY_READ_LOG) { in ahci_end_transaction()
2102 /* If it was our REQUEST SENSE command - process it. */ in ahci_end_transaction()
2103 } else if (ccb->ccb_h.recovery_type == RECOVERY_REQUEST_SENSE) { in ahci_end_transaction()
2107 ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR && in ahci_end_transaction()
2108 (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)) { in ahci_end_transaction()
2109 ch->hold[slot->slot] = ccb; in ahci_end_transaction()
2110 ch->numhslots++; in ahci_end_transaction()
2114 if (ch->rslots == 0) { in ahci_end_transaction()
2115 /* if there was fatal error - reset port. */ in ahci_end_transaction()
2116 if (ch->toslots != 0 || ch->fatalerr) { in ahci_end_transaction()
2120 if (ch->eslots != 0) { in ahci_end_transaction()
2125 /* if there commands on hold, we can do READ LOG. */ in ahci_end_transaction()
2126 if (!ch->recoverycmd && ch->numhslots) in ahci_end_transaction()
2129 /* If all the rest of commands are in timeout - give them chance. */ in ahci_end_transaction()
2130 } else if ((ch->rslots & ~ch->toslots) == 0 && in ahci_end_transaction()
2134 if (ch->frozen && !ahci_check_collision(ch, ch->frozen)) { in ahci_end_transaction()
2135 union ccb *fccb = ch->frozen; in ahci_end_transaction()
2136 ch->frozen = NULL; in ahci_end_transaction()
2138 xpt_release_simq(ch->sim, TRUE); in ahci_end_transaction()
2141 if (ch->numrslots == 0 && ch->pm_level > 3 && in ahci_end_transaction()
2142 (ch->curr[ch->pm_present ? 15 : 0].caps & CTS_SATA_CAPS_D_PMREQ)) { in ahci_end_transaction()
2143 callout_schedule(&ch->pm_timer, in ahci_end_transaction()
2144 (ch->pm_level == 4) ? hz / 1000 : hz / 8); in ahci_end_transaction()
2157 for (i = 0; i < ch->numslots; i++) { in ahci_issue_recovery()
2158 if (ch->hold[i]) in ahci_issue_recovery()
2163 device_printf(ch->dev, "Unable to allocate recovery command\n"); in ahci_issue_recovery()
2165 /* We can't do anything -- complete held commands. */ in ahci_issue_recovery()
2166 for (i = 0; i < ch->numslots; i++) { in ahci_issue_recovery()
2167 if (ch->hold[i] == NULL) in ahci_issue_recovery()
2169 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; in ahci_issue_recovery()
2170 ch->hold[i]->ccb_h.status |= CAM_RESRC_UNAVAIL; in ahci_issue_recovery()
2171 ahci_done(ch, ch->hold[i]); in ahci_issue_recovery()
2172 ch->hold[i] = NULL; in ahci_issue_recovery()
2173 ch->numhslots--; in ahci_issue_recovery()
2178 xpt_setup_ccb(&ccb->ccb_h, ch->hold[i]->ccb_h.path, in ahci_issue_recovery()
2179 ch->hold[i]->ccb_h.pinfo.priority); in ahci_issue_recovery()
2180 if (ch->hold[i]->ccb_h.func_code == XPT_ATA_IO) { in ahci_issue_recovery()
2181 /* READ LOG */ in ahci_issue_recovery()
2182 ccb->ccb_h.recovery_type = RECOVERY_READ_LOG; in ahci_issue_recovery()
2183 ccb->ccb_h.func_code = XPT_ATA_IO; in ahci_issue_recovery()
2184 ccb->ccb_h.flags = CAM_DIR_IN; in ahci_issue_recovery()
2185 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ in ahci_issue_recovery()
2186 ataio = &ccb->ataio; in ahci_issue_recovery()
2187 ataio->data_ptr = malloc(512, M_AHCI, M_NOWAIT); in ahci_issue_recovery()
2188 if (ataio->data_ptr == NULL) { in ahci_issue_recovery()
2190 device_printf(ch->dev, in ahci_issue_recovery()
2191 "Unable to allocate memory for READ LOG command\n"); in ahci_issue_recovery()
2194 ataio->dxfer_len = 512; in ahci_issue_recovery()
2195 bzero(&ataio->cmd, sizeof(ataio->cmd)); in ahci_issue_recovery()
2196 ataio->cmd.flags = CAM_ATAIO_48BIT; in ahci_issue_recovery()
2197 ataio->cmd.command = 0x2F; /* READ LOG EXT */ in ahci_issue_recovery()
2198 ataio->cmd.sector_count = 1; in ahci_issue_recovery()
2199 ataio->cmd.sector_count_exp = 0; in ahci_issue_recovery()
2200 ataio->cmd.lba_low = 0x10; in ahci_issue_recovery()
2201 ataio->cmd.lba_mid = 0; in ahci_issue_recovery()
2202 ataio->cmd.lba_mid_exp = 0; in ahci_issue_recovery()
2205 ccb->ccb_h.recovery_type = RECOVERY_REQUEST_SENSE; in ahci_issue_recovery()
2206 ccb->ccb_h.recovery_slot = i; in ahci_issue_recovery()
2207 ccb->ccb_h.func_code = XPT_SCSI_IO; in ahci_issue_recovery()
2208 ccb->ccb_h.flags = CAM_DIR_IN; in ahci_issue_recovery()
2209 ccb->ccb_h.status = 0; in ahci_issue_recovery()
2210 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ in ahci_issue_recovery()
2211 csio = &ccb->csio; in ahci_issue_recovery()
2212 csio->data_ptr = (void *)&ch->hold[i]->csio.sense_data; in ahci_issue_recovery()
2213 csio->dxfer_len = ch->hold[i]->csio.sense_len; in ahci_issue_recovery()
2214 csio->cdb_len = 6; in ahci_issue_recovery()
2215 bzero(&csio->cdb_io, sizeof(csio->cdb_io)); in ahci_issue_recovery()
2216 csio->cdb_io.cdb_bytes[0] = 0x03; in ahci_issue_recovery()
2217 csio->cdb_io.cdb_bytes[4] = csio->dxfer_len; in ahci_issue_recovery()
2220 ch->recoverycmd = 1; in ahci_issue_recovery()
2221 xpt_freeze_simq(ch->sim, 1); in ahci_issue_recovery()
2232 ch->recoverycmd = 0; in ahci_process_read_log()
2234 data = ccb->ataio.data_ptr; in ahci_process_read_log()
2235 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && in ahci_process_read_log()
2237 for (i = 0; i < ch->numslots; i++) { in ahci_process_read_log()
2238 if (!ch->hold[i]) in ahci_process_read_log()
2240 if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) in ahci_process_read_log()
2243 res = &ch->hold[i]->ataio.res; in ahci_process_read_log()
2244 res->status = data[2]; in ahci_process_read_log()
2245 res->error = data[3]; in ahci_process_read_log()
2246 res->lba_low = data[4]; in ahci_process_read_log()
2247 res->lba_mid = data[5]; in ahci_process_read_log()
2248 res->lba_high = data[6]; in ahci_process_read_log()
2249 res->device = data[7]; in ahci_process_read_log()
2250 res->lba_low_exp = data[8]; in ahci_process_read_log()
2251 res->lba_mid_exp = data[9]; in ahci_process_read_log()
2252 res->lba_high_exp = data[10]; in ahci_process_read_log()
2253 res->sector_count = data[12]; in ahci_process_read_log()
2254 res->sector_count_exp = data[13]; in ahci_process_read_log()
2256 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; in ahci_process_read_log()
2257 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; in ahci_process_read_log()
2259 ahci_done(ch, ch->hold[i]); in ahci_process_read_log()
2260 ch->hold[i] = NULL; in ahci_process_read_log()
2261 ch->numhslots--; in ahci_process_read_log()
2264 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) in ahci_process_read_log()
2265 device_printf(ch->dev, "Error while READ LOG EXT\n"); in ahci_process_read_log()
2267 device_printf(ch->dev, "Non-queued command error in READ LOG EXT\n"); in ahci_process_read_log()
2269 for (i = 0; i < ch->numslots; i++) { in ahci_process_read_log()
2270 if (!ch->hold[i]) in ahci_process_read_log()
2272 if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) in ahci_process_read_log()
2274 ahci_done(ch, ch->hold[i]); in ahci_process_read_log()
2275 ch->hold[i] = NULL; in ahci_process_read_log()
2276 ch->numhslots--; in ahci_process_read_log()
2279 free(ccb->ataio.data_ptr, M_AHCI); in ahci_process_read_log()
2281 xpt_release_simq(ch->sim, TRUE); in ahci_process_read_log()
2289 ch->recoverycmd = 0; in ahci_process_request_sense()
2291 i = ccb->ccb_h.recovery_slot; in ahci_process_request_sense()
2292 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) { in ahci_process_request_sense()
2293 ch->hold[i]->ccb_h.status |= CAM_AUTOSNS_VALID; in ahci_process_request_sense()
2295 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; in ahci_process_request_sense()
2296 ch->hold[i]->ccb_h.status |= CAM_AUTOSENSE_FAIL; in ahci_process_request_sense()
2298 ahci_done(ch, ch->hold[i]); in ahci_process_request_sense()
2299 ch->hold[i] = NULL; in ahci_process_request_sense()
2300 ch->numhslots--; in ahci_process_request_sense()
2302 xpt_release_simq(ch->sim, TRUE); in ahci_process_request_sense()
2311 if (ch->start) in ahci_start()
2312 ch->start(ch); in ahci_start()
2315 ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xFFFFFFFF); in ahci_start()
2317 ATA_OUTL(ch->r_mem, AHCI_P_IS, 0xFFFFFFFF); in ahci_start()
2318 /* Configure FIS-based switching if supported. */ in ahci_start()
2319 if (ch->chcaps & AHCI_P_CMD_FBSCP) { in ahci_start()
2320 ch->fbs_enabled = (fbs && ch->pm_present) ? 1 : 0; in ahci_start()
2321 ATA_OUTL(ch->r_mem, AHCI_P_FBS, in ahci_start()
2322 ch->fbs_enabled ? AHCI_P_FBS_EN : 0); in ahci_start()
2325 cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); in ahci_start()
2327 ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_ST | in ahci_start()
2328 (ch->pm_present ? AHCI_P_CMD_PMA : 0)); in ahci_start()
2338 cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); in ahci_stop()
2339 ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_ST); in ahci_stop()
2345 device_printf(ch->dev, "stopping AHCI engine failed\n"); in ahci_stop()
2348 } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CR); in ahci_stop()
2349 ch->eslots = 0; in ahci_stop()
2359 if (ch->caps & AHCI_CAP_SCLO) { in ahci_clo()
2360 cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); in ahci_clo()
2362 ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd); in ahci_clo()
2367 device_printf(ch->dev, "executing CLO failed\n"); in ahci_clo()
2370 } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CLO); in ahci_clo()
2381 cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); in ahci_stop_fr()
2382 ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_FRE); in ahci_stop_fr()
2388 device_printf(ch->dev, "stopping AHCI FR engine failed\n"); in ahci_stop_fr()
2391 } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_FR); in ahci_stop_fr()
2400 cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); in ahci_start_fr()
2401 ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_FRE); in ahci_start_fr()
2410 while ((val = ATA_INL(ch->r_mem, AHCI_P_TFD)) & in ahci_wait_ready()
2414 device_printf(ch->dev, in ahci_wait_ready()
2425 device_printf(ch->dev, "AHCI reset: device ready after %dms\n", in ahci_wait_ready()
2435 if (ch->resetting == 0) in ahci_reset_to()
2437 ch->resetting--; in ahci_reset_to()
2438 if (ahci_wait_ready(ch, ch->resetting == 0 ? -1 : 0, in ahci_reset_to()
2439 (310 - ch->resetting) * 100) == 0) { in ahci_reset_to()
2440 ch->resetting = 0; in ahci_reset_to()
2442 xpt_release_simq(ch->sim, TRUE); in ahci_reset_to()
2445 if (ch->resetting == 0) { in ahci_reset_to()
2448 xpt_release_simq(ch->sim, TRUE); in ahci_reset_to()
2451 callout_schedule(&ch->reset_timer, hz / 10); in ahci_reset_to()
2457 struct ahci_controller *ctlr = device_get_softc(device_get_parent(ch->dev)); in ahci_reset()
2460 xpt_freeze_simq(ch->sim, 1); in ahci_reset()
2462 device_printf(ch->dev, "AHCI reset...\n"); in ahci_reset()
2464 if (ch->resetting) { in ahci_reset()
2465 ch->resetting = 0; in ahci_reset()
2466 callout_stop(&ch->reset_timer); in ahci_reset()
2467 xpt_release_simq(ch->sim, TRUE); in ahci_reset()
2470 if (ch->frozen) { in ahci_reset()
2471 union ccb *fccb = ch->frozen; in ahci_reset()
2472 ch->frozen = NULL; in ahci_reset()
2473 fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; in ahci_reset()
2474 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { in ahci_reset()
2475 xpt_freeze_devq(fccb->ccb_h.path, 1); in ahci_reset()
2476 fccb->ccb_h.status |= CAM_DEV_QFRZN; in ahci_reset()
2482 for (i = 0; i < ch->numslots; i++) { in ahci_reset()
2484 if (ch->slot[i].state < AHCI_SLOT_RUNNING) in ahci_reset()
2487 ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); in ahci_reset()
2489 for (i = 0; i < ch->numslots; i++) { in ahci_reset()
2490 if (!ch->hold[i]) in ahci_reset()
2492 ahci_done(ch, ch->hold[i]); in ahci_reset()
2493 ch->hold[i] = NULL; in ahci_reset()
2494 ch->numhslots--; in ahci_reset()
2496 if (ch->toslots != 0) in ahci_reset()
2497 xpt_release_simq(ch->sim, TRUE); in ahci_reset()
2498 ch->eslots = 0; in ahci_reset()
2499 ch->toslots = 0; in ahci_reset()
2500 ch->wrongccs = 0; in ahci_reset()
2501 ch->fatalerr = 0; in ahci_reset()
2503 xpt_async(AC_BUS_RESET, ch->path, NULL); in ahci_reset()
2505 ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); in ahci_reset()
2509 device_printf(ch->dev, in ahci_reset()
2511 ch->devices = 0; in ahci_reset()
2513 ATA_OUTL(ch->r_mem, AHCI_P_IE, in ahci_reset()
2514 (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | in ahci_reset()
2516 xpt_release_simq(ch->sim, TRUE); in ahci_reset()
2520 device_printf(ch->dev, "AHCI reset: device found\n"); in ahci_reset()
2521 /* Wait for clearing busy status. */ in ahci_reset()
2526 ch->resetting = 310; in ahci_reset()
2528 ch->devices = 1; in ahci_reset()
2530 ATA_OUTL(ch->r_mem, AHCI_P_IE, in ahci_reset()
2531 (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | in ahci_reset()
2534 ((ch->pm_level == 0) ? AHCI_P_IX_PRC : 0) | AHCI_P_IX_PC | in ahci_reset()
2535 AHCI_P_IX_DP | AHCI_P_IX_UF | (ctlr->ccc ? 0 : AHCI_P_IX_SDB) | in ahci_reset()
2536 AHCI_P_IX_DS | AHCI_P_IX_PS | (ctlr->ccc ? 0 : AHCI_P_IX_DHR))); in ahci_reset()
2537 if (ch->resetting) in ahci_reset()
2538 callout_reset(&ch->reset_timer, hz / 10, ahci_reset_to, ch); in ahci_reset()
2541 xpt_release_simq(ch->sim, TRUE); in ahci_reset()
2548 u_int8_t *fis = &ctp->cfis[0]; in ahci_setup_fis()
2552 fis[1] = (ccb->ccb_h.target_id & 0x0f); in ahci_setup_fis()
2553 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { in ahci_setup_fis()
2556 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && in ahci_setup_fis()
2557 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) in ahci_setup_fis()
2560 fis[5] = ccb->csio.dxfer_len; in ahci_setup_fis()
2561 fis[6] = ccb->csio.dxfer_len >> 8; in ahci_setup_fis()
2565 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? in ahci_setup_fis()
2566 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, in ahci_setup_fis()
2567 ctp->acmd, ccb->csio.cdb_len); in ahci_setup_fis()
2568 bzero(ctp->acmd + ccb->csio.cdb_len, 32 - ccb->csio.cdb_len); in ahci_setup_fis()
2569 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { in ahci_setup_fis()
2571 fis[2] = ccb->ataio.cmd.command; in ahci_setup_fis()
2572 fis[3] = ccb->ataio.cmd.features; in ahci_setup_fis()
2573 fis[4] = ccb->ataio.cmd.lba_low; in ahci_setup_fis()
2574 fis[5] = ccb->ataio.cmd.lba_mid; in ahci_setup_fis()
2575 fis[6] = ccb->ataio.cmd.lba_high; in ahci_setup_fis()
2576 fis[7] = ccb->ataio.cmd.device; in ahci_setup_fis()
2577 fis[8] = ccb->ataio.cmd.lba_low_exp; in ahci_setup_fis()
2578 fis[9] = ccb->ataio.cmd.lba_mid_exp; in ahci_setup_fis()
2579 fis[10] = ccb->ataio.cmd.lba_high_exp; in ahci_setup_fis()
2580 fis[11] = ccb->ataio.cmd.features_exp; in ahci_setup_fis()
2581 fis[12] = ccb->ataio.cmd.sector_count; in ahci_setup_fis()
2582 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { in ahci_setup_fis()
2586 fis[13] = ccb->ataio.cmd.sector_count_exp; in ahci_setup_fis()
2587 if (ccb->ataio.ata_flags & ATA_FLAG_ICC) in ahci_setup_fis()
2588 fis[14] = ccb->ataio.icc; in ahci_setup_fis()
2590 if (ccb->ataio.ata_flags & ATA_FLAG_AUX) { in ahci_setup_fis()
2591 fis[16] = ccb->ataio.aux & 0xff; in ahci_setup_fis()
2592 fis[17] = (ccb->ataio.aux >> 8) & 0xff; in ahci_setup_fis()
2593 fis[18] = (ccb->ataio.aux >> 16) & 0xff; in ahci_setup_fis()
2594 fis[19] = (ccb->ataio.aux >> 24) & 0xff; in ahci_setup_fis()
2597 fis[15] = ccb->ataio.cmd.control; in ahci_setup_fis()
2605 u_int32_t status; in ahci_sata_connect() local
2610 * up to 500ms for devices with the SLOWDEV quirk. in ahci_sata_connect()
2612 timeoutslot = ((ch->quirks & AHCI_Q_SLOWDEV) ? 5000 : 1000); in ahci_sata_connect()
2614 status = ATA_INL(ch->r_mem, AHCI_P_SSTS); in ahci_sata_connect()
2615 if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) in ahci_sata_connect()
2617 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && in ahci_sata_connect()
2618 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && in ahci_sata_connect()
2619 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) in ahci_sata_connect()
2621 if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) { in ahci_sata_connect()
2623 device_printf(ch->dev, "SATA offline status=%08x\n", in ahci_sata_connect()
2624 status); in ahci_sata_connect()
2634 device_printf(ch->dev, in ahci_sata_connect()
2635 "SATA connect timeout time=%dus status=%08x\n", in ahci_sata_connect()
2636 timeout * 100, status); in ahci_sata_connect()
2641 device_printf(ch->dev, "SATA connect time=%dus status=%08x\n", in ahci_sata_connect()
2642 timeout * 100, status); in ahci_sata_connect()
2645 ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xffffffff); in ahci_sata_connect()
2655 if (ch->listening) { in ahci_sata_phy_reset()
2656 val = ATA_INL(ch->r_mem, AHCI_P_CMD); in ahci_sata_phy_reset()
2658 ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); in ahci_sata_phy_reset()
2659 ch->listening = 0; in ahci_sata_phy_reset()
2661 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; in ahci_sata_phy_reset()
2671 ATA_OUTL(ch->r_mem, AHCI_P_SCTL, in ahci_sata_phy_reset()
2676 ATA_OUTL(ch->r_mem, AHCI_P_SCTL, in ahci_sata_phy_reset()
2677 detval | val | ((ch->pm_level > 0) ? 0 : in ahci_sata_phy_reset()
2680 if (ch->caps & AHCI_CAP_SSS) { in ahci_sata_phy_reset()
2681 val = ATA_INL(ch->r_mem, AHCI_P_CMD); in ahci_sata_phy_reset()
2683 ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); in ahci_sata_phy_reset()
2684 ch->listening = 1; in ahci_sata_phy_reset()
2685 } else if (ch->pm_level > 0) in ahci_sata_phy_reset()
2686 ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); in ahci_sata_phy_reset()
2696 if (ccb->ccb_h.target_id > ((ch->caps & AHCI_CAP_SPM) ? 15 : 0)) { in ahci_check_ids()
2697 ccb->ccb_h.status = CAM_TID_INVALID; in ahci_check_ids()
2699 return (-1); in ahci_check_ids()
2701 if (ccb->ccb_h.target_lun != 0) { in ahci_check_ids()
2702 ccb->ccb_h.status = CAM_LUN_INVALID; in ahci_check_ids()
2704 return (-1); in ahci_check_ids()
2714 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahciaction func_code=%x\n", in ahciaction()
2715 ccb->ccb_h.func_code)); in ahciaction()
2718 switch (ccb->ccb_h.func_code) { in ahciaction()
2724 if (ch->devices == 0 || in ahciaction()
2725 (ch->pm_present == 0 && in ahciaction()
2726 ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { in ahciaction()
2727 ccb->ccb_h.status = CAM_SEL_TIMEOUT; in ahciaction()
2730 ccb->ccb_h.recovery_type = RECOVERY_NONE; in ahciaction()
2734 ch->frozen = ccb; in ahciaction()
2736 xpt_freeze_simq(ch->sim, 1); in ahciaction()
2743 ccb->ccb_h.status = CAM_REQ_INVALID; in ahciaction()
2747 struct ccb_trans_settings *cts = &ccb->cts; in ahciaction()
2752 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) in ahciaction()
2753 d = &ch->curr[ccb->ccb_h.target_id]; in ahciaction()
2755 d = &ch->user[ccb->ccb_h.target_id]; in ahciaction()
2756 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) in ahciaction()
2757 d->revision = cts->xport_specific.sata.revision; in ahciaction()
2758 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) in ahciaction()
2759 d->mode = cts->xport_specific.sata.mode; in ahciaction()
2760 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) in ahciaction()
2761 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); in ahciaction()
2762 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) in ahciaction()
2763 d->tags = min(ch->numslots, cts->xport_specific.sata.tags); in ahciaction()
2764 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) in ahciaction()
2765 ch->pm_present = cts->xport_specific.sata.pm_present; in ahciaction()
2766 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_ATAPI) in ahciaction()
2767 d->atapi = cts->xport_specific.sata.atapi; in ahciaction()
2768 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) in ahciaction()
2769 d->caps = cts->xport_specific.sata.caps; in ahciaction()
2770 ccb->ccb_h.status = CAM_REQ_CMP; in ahciaction()
2776 struct ccb_trans_settings *cts = &ccb->cts; in ahciaction()
2778 uint32_t status; in ahciaction() local
2782 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) in ahciaction()
2783 d = &ch->curr[ccb->ccb_h.target_id]; in ahciaction()
2785 d = &ch->user[ccb->ccb_h.target_id]; in ahciaction()
2786 cts->protocol = PROTO_UNSPECIFIED; in ahciaction()
2787 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; in ahciaction()
2788 cts->transport = XPORT_SATA; in ahciaction()
2789 cts->transport_version = XPORT_VERSION_UNSPECIFIED; in ahciaction()
2790 cts->proto_specific.valid = 0; in ahciaction()
2791 cts->xport_specific.sata.valid = 0; in ahciaction()
2792 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && in ahciaction()
2793 (ccb->ccb_h.target_id == 15 || in ahciaction()
2794 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { in ahciaction()
2795 status = ATA_INL(ch->r_mem, AHCI_P_SSTS) & ATA_SS_SPD_MASK; in ahciaction()
2796 if (status & 0x0f0) { in ahciaction()
2797 cts->xport_specific.sata.revision = in ahciaction()
2798 (status & 0x0f0) >> 4; in ahciaction()
2799 cts->xport_specific.sata.valid |= in ahciaction()
2802 cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; in ahciaction()
2803 if (ch->pm_level) { in ahciaction()
2804 if (ch->caps & (AHCI_CAP_PSC | AHCI_CAP_SSC)) in ahciaction()
2805 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; in ahciaction()
2806 if (ch->caps2 & AHCI_CAP2_APST) in ahciaction()
2807 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_APST; in ahciaction()
2809 if ((ch->caps & AHCI_CAP_SNCQ) && in ahciaction()
2810 (ch->quirks & AHCI_Q_NOAA) == 0) in ahciaction()
2811 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_DMAAA; in ahciaction()
2812 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_AN; in ahciaction()
2813 cts->xport_specific.sata.caps &= in ahciaction()
2814 ch->user[ccb->ccb_h.target_id].caps; in ahciaction()
2815 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; in ahciaction()
2817 cts->xport_specific.sata.revision = d->revision; in ahciaction()
2818 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; in ahciaction()
2819 cts->xport_specific.sata.caps = d->caps; in ahciaction()
2820 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; in ahciaction()
2822 cts->xport_specific.sata.mode = d->mode; in ahciaction()
2823 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; in ahciaction()
2824 cts->xport_specific.sata.bytecount = d->bytecount; in ahciaction()
2825 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; in ahciaction()
2826 cts->xport_specific.sata.pm_present = ch->pm_present; in ahciaction()
2827 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; in ahciaction()
2828 cts->xport_specific.sata.tags = d->tags; in ahciaction()
2829 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; in ahciaction()
2830 cts->xport_specific.sata.atapi = d->atapi; in ahciaction()
2831 cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; in ahciaction()
2832 ccb->ccb_h.status = CAM_REQ_CMP; in ahciaction()
2838 ccb->ccb_h.status = CAM_REQ_CMP; in ahciaction()
2842 ccb->ccb_h.status = CAM_REQ_INVALID; in ahciaction()
2846 struct ccb_pathinq *cpi = &ccb->cpi; in ahciaction()
2848 cpi->version_num = 1; /* XXX??? */ in ahciaction()
2849 cpi->hba_inquiry = PI_SDTR_ABLE; in ahciaction()
2850 if (ch->caps & AHCI_CAP_SNCQ) in ahciaction()
2851 cpi->hba_inquiry |= PI_TAG_ABLE; in ahciaction()
2852 if (ch->caps & AHCI_CAP_SPM) in ahciaction()
2853 cpi->hba_inquiry |= PI_SATAPM; in ahciaction()
2854 cpi->target_sprt = 0; in ahciaction()
2855 cpi->hba_misc = PIM_SEQSCAN | PIM_UNMAPPED; in ahciaction()
2856 if ((ch->quirks & AHCI_Q_NOAUX) == 0) in ahciaction()
2857 cpi->hba_misc |= PIM_ATA_EXT; in ahciaction()
2858 cpi->hba_eng_cnt = 0; in ahciaction()
2859 if (ch->caps & AHCI_CAP_SPM) in ahciaction()
2860 cpi->max_target = 15; in ahciaction()
2862 cpi->max_target = 0; in ahciaction()
2863 cpi->max_lun = 0; in ahciaction()
2864 cpi->initiator_id = 0; in ahciaction()
2865 cpi->bus_id = cam_sim_bus(sim); in ahciaction()
2866 cpi->base_transfer_speed = 150000; in ahciaction()
2867 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); in ahciaction()
2868 strlcpy(cpi->hba_vid, "AHCI", HBA_IDLEN); in ahciaction()
2869 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); in ahciaction()
2870 cpi->unit_number = cam_sim_unit(sim); in ahciaction()
2871 cpi->transport = XPORT_SATA; in ahciaction()
2872 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; in ahciaction()
2873 cpi->protocol = PROTO_ATA; in ahciaction()
2874 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; in ahciaction()
2875 cpi->maxio = ctob(AHCI_SG_ENTRIES - 1); in ahciaction()
2877 if (ch->quirks & AHCI_Q_MAXIO_64K) in ahciaction()
2878 cpi->maxio = min(cpi->maxio, 128 * 512); in ahciaction()
2879 cpi->hba_vendor = ch->vendorid; in ahciaction()
2880 cpi->hba_device = ch->deviceid; in ahciaction()
2881 cpi->hba_subvendor = ch->subvendorid; in ahciaction()
2882 cpi->hba_subdevice = ch->subdeviceid; in ahciaction()
2883 cpi->ccb_h.status = CAM_REQ_CMP; in ahciaction()
2887 ccb->ccb_h.status = CAM_REQ_INVALID; in ahciaction()
2899 /* Read interrupt statuses and process if any. */ in ahcipoll()
2900 istatus = ATA_INL(ch->r_mem, AHCI_P_IS); in ahcipoll()
2903 if (ch->resetting != 0 && in ahcipoll()
2904 (--ch->resetpolldiv <= 0 || !callout_pending(&ch->reset_timer))) { in ahcipoll()
2905 ch->resetpolldiv = 1000; in ahcipoll()