Lines Matching +full:4 +full:x2
25 cmp x2,#0
41 ld1 {v1.4s,v2.4s},[x3],#32
47 .align 4
51 st1 {v3.4s},[x2],#16
65 ld1 {v1.4s},[x3]
69 st1 {v3.4s},[x2],#16
83 st1 {v3.4s},[x2],#16
93 st1 {v3.4s},[x2]
94 add x2,x2,#0x50
99 .align 4
103 st1 {v3.4s},[x2],#16
110 st1 {v4.4s},[x2],#16
111 sub x2,x2,#8
113 st1 {v4.8b},[x2],#8
124 dup v5.4s,v3.s[3]
132 st1 {v3.4s},[x2],#16
136 add x2,x2,#0x20
139 .align 4
144 st1 {v3.4s},[x2],#16
149 st1 {v4.4s},[x2],#16
161 st1 {v3.4s},[x2],#16
164 dup v6.4s,v3.s[3] // just splat
178 str w12,[x2]
199 sub x2,x2,#240 // restore original x2
201 add x0,x2,x12,lsl#4 // end of key schedule
203 ld1 {v0.4s},[x2]
204 ld1 {v1.4s},[x0]
205 st1 {v0.4s},[x0],x4
206 st1 {v1.4s},[x2],#16
209 ld1 {v0.4s},[x2]
210 ld1 {v1.4s},[x0]
213 st1 {v0.4s},[x0],x4
214 st1 {v1.4s},[x2],#16
215 cmp x0,x2
218 ld1 {v0.4s},[x2]
220 st1 {v0.4s},[x0]
233 ldr w3,[x2,#240]
234 ld1 {v0.4s},[x2],#16
237 ld1 {v1.4s},[x2],#16
242 ld1 {v0.4s},[x2],#16
246 ld1 {v1.4s},[x2],#16
251 ld1 {v0.4s},[x2]
263 ldr w3,[x2,#240]
264 ld1 {v0.4s},[x2],#16
267 ld1 {v1.4s},[x2],#16
272 ld1 {v0.4s},[x2],#16
276 ld1 {v1.4s},[x2],#16
281 ld1 {v0.4s},[x2]
293 subs x2,x2,#16
299 ld1 {v5.4s,v6.4s},[x3],#32 // load key schedule...
304 ld1 {v16.4s,v17.4s},[x3],#32 // load key schedule...
312 ld1 {v16.4s},[x3],#16 // load key schedule...
315 ld1 {v17.4s},[x3],#16 // load key schedule...
319 ld1 {v18.4s,v19.4s},[x3],#32 // load key schedule...
324 ld1 {v20.4s,v21.4s},[x3],#32 // load key schedule...
329 ld1 {v22.4s,v23.4s},[x3],#32 // load key schedule...
334 ld1 {v7.4s},[x3]
344 ld1 {v16.4s,v17.4s},[x3],#32 // load key schedule...
352 ld1 {v16.4s},[x3],#16 // load key schedule...
355 ld1 {v17.4s},[x3],#16 // load key schedule...
359 ld1 {v18.4s,v19.4s},[x3],#32 // load key schedule...
364 ld1 {v20.4s,v21.4s},[x3],#32 // load key schedule...
369 ld1 {v22.4s,v23.4s},[x3],#32 // load key schedule...
374 ld1 {v7.4s},[x3]
390 and x2,x2,#-16
393 ld1 {v16.4s,v17.4s},[x3] // load key schedule...
395 add x7,x3,x5,lsl#4 // pointer to last 7 round keys
397 ld1 {v18.4s,v19.4s},[x7],#32
398 ld1 {v20.4s,v21.4s},[x7],#32
399 ld1 {v22.4s,v23.4s},[x7],#32
400 ld1 {v7.4s},[x7]
407 subs x2,x2,#32 // bias
416 cmp x2,#32
421 sub x2,x2,#32 // bias
435 ld1 {v16.4s},[x7],#16
447 ld1 {v17.4s},[x7],#16
460 cmp x2,#0x40 // because .Lecb_enc_tail4x
461 sub x2,x2,#0x50
473 csel x6,xzr,x2,gt // borrow x6, w6, "gt" is not typo
489 add x6,x2,#0x60 // because .Lecb_enc_tail4x
546 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
561 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
566 add x2,x2,#0x50
567 cbz x2,.Lecb_done
570 subs x2,x2,#0x30
578 .align 4
590 .align 4
598 ld1 {v16.4s},[x7],#16
606 ld1 {v17.4s},[x7],#16
615 subs x2,x2,#0x30
616 csel x6,x2,x6,lo // x6, w6, is zero at this point
651 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
656 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
665 cmn x2,#0x30
674 ld1 {v16.4s},[x7],#16
680 ld1 {v17.4s},[x7],#16
695 cmn x2,#0x20
720 subs x2,x2,#32 // bias
729 cmp x2,#32
734 sub x2,x2,#32 // bias
748 ld1 {v16.4s},[x7],#16
760 ld1 {v17.4s},[x7],#16
773 cmp x2,#0x40 // because .Lecb_tail4x
774 sub x2,x2,#0x50
786 csel x6,xzr,x2,gt // borrow x6, w6, "gt" is not typo
802 add x6,x2,#0x60 // because .Lecb_tail4x
859 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
874 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
879 add x2,x2,#0x50
880 cbz x2,.Lecb_done
883 subs x2,x2,#0x30
891 .align 4
903 .align 4
911 ld1 {v16.4s},[x7],#16
919 ld1 {v17.4s},[x7],#16
928 subs x2,x2,#0x30
929 csel x6,x2,x6,lo // x6, w6, is zero at this point
964 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
969 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
978 cmn x2,#0x30
987 ld1 {v16.4s},[x7],#16
993 ld1 {v17.4s},[x7],#16
1008 cmn x2,#0x20
1043 subs x2,x2,#16
1050 and x2,x2,#-16
1054 ld1 {v16.4s,v17.4s},[x3] // load key schedule...
1056 add x7,x3,x5,lsl#4 // pointer to last 7 round keys
1058 ld1 {v18.4s,v19.4s},[x7],#32
1059 ld1 {v20.4s,v21.4s},[x7],#32
1060 ld1 {v22.4s,v23.4s},[x7],#32
1061 ld1 {v7.4s},[x7]
1072 ld1 {v2.4s,v3.4s},[x7]
1074 add x6,x3,#16*4
1082 .align 4
1092 ld1 {v16.4s},[x6]
1093 cmp w5,#4
1096 ld1 {v17.4s},[x12]
1101 ld1 {v16.4s},[x14]
1104 ld1 {v17.4s},[x3]
1110 subs x2,x2,#16
1124 ld1 {v17.4s},[x7] // re-pre-load rndkey[1]
1136 ld1 {v2.4s,v3.4s},[x7]
1147 subs x2,x2,#16
1174 subs x2,x2,#32 // bias
1186 cmp x2,#32
1191 sub x2,x2,#32 // bias
1207 ld1 {v16.4s},[x7],#16
1219 ld1 {v17.4s},[x7],#16
1232 cmp x2,#0x40 // because .Lcbc_tail4x
1233 sub x2,x2,#0x50
1245 csel x6,xzr,x2,gt // borrow x6, w6, "gt" is not typo
1261 add x6,x2,#0x60 // because .Lcbc_tail4x
1324 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
1339 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
1344 add x2,x2,#0x50
1345 cbz x2,.Lcbc_done
1348 subs x2,x2,#0x30
1359 .align 4
1371 .align 4
1379 ld1 {v16.4s},[x7],#16
1387 ld1 {v17.4s},[x7],#16
1397 subs x2,x2,#0x30
1399 csel x6,x2,x6,lo // x6, w6, is zero at this point
1436 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
1441 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
1450 cmn x2,#0x30
1459 ld1 {v16.4s},[x7],#16
1465 ld1 {v17.4s},[x7],#16
1480 cmn x2,#0x20
1526 ld1 {v0.4s},[x4]
1528 ld1 {v16.4s,v17.4s},[x3] // load key schedule...
1529 sub w5,w5,#4
1531 cmp x2,#2
1532 add x7,x3,x5,lsl#4 // pointer to last 5 round keys
1534 ld1 {v20.4s,v21.4s},[x7],#32
1535 ld1 {v22.4s,v23.4s},[x7],#32
1536 ld1 {v7.4s},[x7]
1552 sub x2,x2,#3 // bias
1554 cmp x2,#32
1564 sub x2,x2,#2 // bias
1569 .align 4
1581 ld1 {v16.4s},[x7],#16
1593 ld1 {v17.4s},[x7],#16
1607 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
1619 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
1628 add w13,w8,#4
1703 cbz x2,.Lctr32_done
1706 subs x2,x2,#5
1709 add x2,x2,#5
1712 cmp x2,#2
1717 sub x2,x2,#3 // bias
1721 .align 4
1729 ld1 {v16.4s},[x7],#16
1737 ld1 {v17.4s},[x7],#16
1789 subs x2,x2,#3
1795 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
1801 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
1805 adds x2,x2,#3
1807 cmp x2,#1
1816 ld1 {v16.4s},[x7],#16
1822 ld1 {v17.4s},[x7],#16
1852 cmp x2,#1
1868 cmp x2,#16
1873 ld1 {v0.4s},[x4],#16
1876 ld1 {v1.4s},[x4],#16
1881 ld1 {v0.4s},[x4],#16
1885 ld1 {v1.4s},[x4],#16
1890 ld1 {v0.4s},[x4]
1898 ld1 {v28.4s,v29.4s},[x3],#32 // load key schedule...
1902 ld1 {v16.4s,v17.4s},[x3],#32 // load key schedule...
1910 ld1 {v16.4s},[x3],#16 // load key schedule...
1913 ld1 {v17.4s},[x3],#16 // load key schedule...
1917 ld1 {v18.4s,v19.4s},[x3],#32 // load key schedule...
1922 ld1 {v20.4s,v21.4s},[x3],#32 // load key schedule...
1927 ld1 {v22.4s,v23.4s},[x3],#32 // load key schedule...
1932 ld1 {v7.4s},[x3]
1941 .align 4
1949 and x21,x2,#0xf
1950 and x2,x2,#-16
1951 subs x2,x2,#16
1958 ld1 {v0.4s},[x4],#16
1961 ld1 {v1.4s},[x4],#16
1966 ld1 {v0.4s},[x4],#16
1970 ld1 {v1.4s},[x4],#16
1975 ld1 {v0.4s},[x4]
1995 ld1 {v16.4s,v17.4s},[x3] // load key schedule...
1997 add x7,x3,x5,lsl#4 // pointer to last 7 round keys
1999 ld1 {v18.4s,v19.4s},[x7],#32
2000 ld1 {v20.4s,v21.4s},[x7],#32
2001 ld1 {v22.4s,v23.4s},[x7],#32
2002 ld1 {v7.4s},[x7]
2010 subs x2,x2,#32 // bias
2036 cmp x2,#32
2059 sub x2,x2,#32 // bias
2063 .align 4
2075 ld1 {v16.4s},[x7],#16
2087 ld1 {v17.4s},[x7],#16
2100 subs x2,x2,#0x50 // because .Lxts_enc_tail4x
2112 csel x6,xzr,x2,gt // borrow x6, w6, "gt" is not typo
2128 add x6,x2,#0x60 // because .Lxts_enc_tail4x
2227 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
2242 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
2248 // If left 4 blocks, borrow the five block's processing.
2249 cmn x2,#0x10
2265 add x2,x2,#0x50
2266 cbz x2,.Lxts_enc_done
2269 subs x2,x2,#0x30
2277 .align 4
2289 .align 4
2297 ld1 {v16.4s},[x7],#16
2305 ld1 {v17.4s},[x7],#16
2315 subs x2,x2,#0x30
2327 csel x6,x2,x6,lo // x6, w6, is zero at this point
2363 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
2367 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
2371 cmn x2,#0x30
2379 cmn x2,#0x10
2389 ld1 {v16.4s},[x7],#16
2395 ld1 {v17.4s},[x7],#16
2410 cmn x2,#0x20
2476 ld1 {v0.4s},[x3],#16
2478 ld1 {v1.4s},[x3],#16 // load key schedule...
2482 ld1 {v0.4s},[x3],#16
2486 ld1 {v1.4s},[x3],#16
2491 ld1 {v0.4s},[x3]
2510 cmp x2,#16
2515 ld1 {v0.4s},[x4],#16
2518 ld1 {v1.4s},[x4],#16
2523 ld1 {v0.4s},[x4],#16
2527 ld1 {v1.4s},[x4],#16
2532 ld1 {v0.4s},[x4]
2540 ld1 {v28.4s,v29.4s},[x3],#32 // load key schedule...
2544 ld1 {v16.4s,v17.4s},[x3],#32 // load key schedule...
2552 ld1 {v16.4s},[x3],#16 // load key schedule...
2555 ld1 {v17.4s},[x3],#16 // load key schedule...
2559 ld1 {v18.4s,v19.4s},[x3],#32 // load key schedule...
2564 ld1 {v20.4s,v21.4s},[x3],#32 // load key schedule...
2569 ld1 {v22.4s,v23.4s},[x3],#32 // load key schedule...
2574 ld1 {v7.4s},[x3]
2588 and x21,x2,#0xf
2589 and x2,x2,#-16
2590 subs x2,x2,#16
2596 ld1 {v0.4s},[x4],#16
2599 ld1 {v1.4s},[x4],#16
2604 ld1 {v0.4s},[x4],#16
2608 ld1 {v1.4s},[x4],#16
2613 ld1 {v0.4s},[x4]
2640 ld1 {v16.4s,v17.4s},[x3] // load key schedule...
2642 add x7,x3,x5,lsl#4 // pointer to last 7 round keys
2644 ld1 {v18.4s,v19.4s},[x7],#32 // load key schedule...
2645 ld1 {v20.4s,v21.4s},[x7],#32
2646 ld1 {v22.4s,v23.4s},[x7],#32
2647 ld1 {v7.4s},[x7]
2666 subs x2,x2,#16
2673 subs x2,x2,#32 // bias
2691 cmp x2,#32
2707 sub x2,x2,#32 // bias
2711 .align 4
2723 ld1 {v16.4s},[x7],#16 // load key schedule...
2735 ld1 {v17.4s},[x7],#16 // load key schedule...
2748 subs x2,x2,#0x50 // because .Lxts_dec_tail4x
2760 csel x6,xzr,x2,gt // borrow x6, w6, "gt" is not typo
2776 add x6,x2,#0x60 // because .Lxts_dec_tail4x
2875 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
2890 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
2895 cmn x2,#0x10
2897 // If x2(x2) equal to -0x10, the left blocks is 4.
2914 add x2,x2,#0x50
2915 cbz x2,.Lxts_done
2918 subs x2,x2,#0x30
2926 .align 4
2941 .align 4
2949 ld1 {v16.4s},[x7],#16
2957 ld1 {v17.4s},[x7],#16
2967 subs x2,x2,#0x30
2979 csel x6,x2,x6,lo // x6, w6, is zero at this point
3030 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
3035 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
3040 cmn x2,#0x30
3041 add x2,x2,#0x30
3043 sub x2,x2,#0x30
3049 // x2 == -0x10 means two blocks left.
3050 cmn x2,#0x10
3060 ld1 {v16.4s},[x7],#16
3066 ld1 {v17.4s},[x7],#16
3081 cmn x2,#0x20
3101 add x2,x2,#16
3109 add x2,x2,#32
3116 cbnz x2,.Lxts_dec_1st_done
3123 ld1 {v0.4s},[x3],#16
3125 ld1 {v1.4s},[x3],#16
3129 ld1 {v0.4s},[x3],#16 // load key schedule...
3133 ld1 {v1.4s},[x3],#16 // load key schedule...
3138 ld1 {v0.4s},[x3]
3162 ld1 {v0.4s},[x7],#16
3164 ld1 {v1.4s},[x7],#16
3168 ld1 {v0.4s},[x7],#16 // load key schedule...
3172 ld1 {v1.4s},[x7],#16 // load key schedule...
3177 ld1 {v0.4s},[x7]