66    __m128i abcd, e0, e1;  in intel_sha1_step()  local
80    abcd      = _mm_loadu_si128((__m128i*) digest);  in intel_sha1_step()
82    abcd      = _mm_shuffle_epi32(abcd, 0x1B);  in intel_sha1_step()
89       abcd_save = abcd;  in intel_sha1_step()
96          e1   = abcd;  in intel_sha1_step()
97          abcd = _mm_sha1rnds4_epu32(abcd, e0, 0);  in intel_sha1_step()
103          e0   = abcd;  in intel_sha1_step()
104          abcd = _mm_sha1rnds4_epu32(abcd, e1, 0);  in intel_sha1_step()
111          e1   = abcd;  in intel_sha1_step()
112          abcd = _mm_sha1rnds4_epu32(abcd, e0, 0);  in intel_sha1_step()
120          e0   = abcd;  in intel_sha1_step()
122          abcd = _mm_sha1rnds4_epu32(abcd, e1, 0);  in intel_sha1_step()
128          e1   = abcd;  in intel_sha1_step()
130          abcd = _mm_sha1rnds4_epu32(abcd, e0, 0);  in intel_sha1_step()
136          e0   = abcd;  in intel_sha1_step()
138          abcd = _mm_sha1rnds4_epu32(abcd, e1, 1);  in intel_sha1_step()
144          e1   = abcd;  in intel_sha1_step()
146          abcd = _mm_sha1rnds4_epu32(abcd, e0, 1);  in intel_sha1_step()
152          e0   = abcd;  in intel_sha1_step()
154          abcd = _mm_sha1rnds4_epu32(abcd, e1, 1);  in intel_sha1_step()
160          e1   = abcd;  in intel_sha1_step()
162          abcd = _mm_sha1rnds4_epu32(abcd, e0, 1);  in intel_sha1_step()
168          e0   = abcd;  in intel_sha1_step()
170          abcd = _mm_sha1rnds4_epu32(abcd, e1, 1);  in intel_sha1_step()
176          e1   = abcd;  in intel_sha1_step()
178          abcd = _mm_sha1rnds4_epu32(abcd, e0, 2);  in intel_sha1_step()
184          e0   = abcd;  in intel_sha1_step()
186          abcd = _mm_sha1rnds4_epu32(abcd, e1, 2);  in intel_sha1_step()
192          e1   = abcd;  in intel_sha1_step()
194          abcd = _mm_sha1rnds4_epu32(abcd, e0, 2);  in intel_sha1_step()
200          e0   = abcd;  in intel_sha1_step()
202          abcd = _mm_sha1rnds4_epu32(abcd, e1, 2);  in intel_sha1_step()
208          e1   = abcd;  in intel_sha1_step()
210          abcd = _mm_sha1rnds4_epu32(abcd, e0, 2);  in intel_sha1_step()
216          e0   = abcd;  in intel_sha1_step()
218          abcd = _mm_sha1rnds4_epu32(abcd, e1, 3);  in intel_sha1_step()
224          e1   = abcd;  in intel_sha1_step()
226          abcd = _mm_sha1rnds4_epu32(abcd, e0, 3);  in intel_sha1_step()
232          e0   = abcd;  in intel_sha1_step()
234          abcd = _mm_sha1rnds4_epu32(abcd, e1, 3);  in intel_sha1_step()
239          e1   = abcd;  in intel_sha1_step()
241          abcd = _mm_sha1rnds4_epu32(abcd, e0, 3);  in intel_sha1_step()
245          e0   = abcd;  in intel_sha1_step()
246          abcd = _mm_sha1rnds4_epu32(abcd, e1, 3);  in intel_sha1_step()
250       abcd = _mm_add_epi32(abcd, abcd_save);  in intel_sha1_step()
256    abcd = _mm_shuffle_epi32(abcd, 0x1B);  in intel_sha1_step()
257    _mm_store_si128((__m128i*) digest, abcd);  in intel_sha1_step()