Lines Matching full:e0
66 __m128i abcd, e0, e1; in intel_sha1_step() local
75 e0 = _mm_set_epi64x(0, 0); in intel_sha1_step()
81 e0 = _mm_insert_epi32(e0, *(digest+4), 3); in intel_sha1_step()
84 e0 = _mm_and_si128(e0, e_mask); in intel_sha1_step()
90 e_save = e0; in intel_sha1_step()
95 e0 = _mm_add_epi32(e0, msg0); in intel_sha1_step()
97 abcd = _mm_sha1rnds4_epu32(abcd, e0, 0); in intel_sha1_step()
103 e0 = abcd; in intel_sha1_step()
110 e0 = _mm_sha1nexte_epu32(e0, msg2); in intel_sha1_step()
112 abcd = _mm_sha1rnds4_epu32(abcd, e0, 0); in intel_sha1_step()
120 e0 = abcd; in intel_sha1_step()
127 e0 = _mm_sha1nexte_epu32(e0, msg0); in intel_sha1_step()
130 abcd = _mm_sha1rnds4_epu32(abcd, e0, 0); in intel_sha1_step()
136 e0 = abcd; in intel_sha1_step()
143 e0 = _mm_sha1nexte_epu32(e0, msg2); in intel_sha1_step()
146 abcd = _mm_sha1rnds4_epu32(abcd, e0, 1); in intel_sha1_step()
152 e0 = abcd; in intel_sha1_step()
159 e0 = _mm_sha1nexte_epu32(e0, msg0); in intel_sha1_step()
162 abcd = _mm_sha1rnds4_epu32(abcd, e0, 1); in intel_sha1_step()
168 e0 = abcd; in intel_sha1_step()
175 e0 = _mm_sha1nexte_epu32(e0, msg2); in intel_sha1_step()
178 abcd = _mm_sha1rnds4_epu32(abcd, e0, 2); in intel_sha1_step()
184 e0 = abcd; in intel_sha1_step()
191 e0 = _mm_sha1nexte_epu32(e0, msg0); in intel_sha1_step()
194 abcd = _mm_sha1rnds4_epu32(abcd, e0, 2); in intel_sha1_step()
200 e0 = abcd; in intel_sha1_step()
207 e0 = _mm_sha1nexte_epu32(e0, msg2); in intel_sha1_step()
210 abcd = _mm_sha1rnds4_epu32(abcd, e0, 2); in intel_sha1_step()
216 e0 = abcd; in intel_sha1_step()
223 e0 = _mm_sha1nexte_epu32(e0, msg0); in intel_sha1_step()
226 abcd = _mm_sha1rnds4_epu32(abcd, e0, 3); in intel_sha1_step()
232 e0 = abcd; in intel_sha1_step()
238 e0 = _mm_sha1nexte_epu32(e0, msg2); in intel_sha1_step()
241 abcd = _mm_sha1rnds4_epu32(abcd, e0, 3); in intel_sha1_step()
245 e0 = abcd; in intel_sha1_step()
249 e0 = _mm_sha1nexte_epu32(e0, e_save); in intel_sha1_step()
258 *(digest+4) = _mm_extract_epi32(e0, 3); in intel_sha1_step()