Lines Matching refs:uint64_t
41 uint64_t changeset; /* Version of Xen that saved this file */
60 uint64_t rax;
61 uint64_t rbx;
62 uint64_t rcx;
63 uint64_t rdx;
64 uint64_t rbp;
65 uint64_t rsi;
66 uint64_t rdi;
67 uint64_t rsp;
68 uint64_t r8;
69 uint64_t r9;
70 uint64_t r10;
71 uint64_t r11;
72 uint64_t r12;
73 uint64_t r13;
74 uint64_t r14;
75 uint64_t r15;
77 uint64_t rip;
78 uint64_t rflags;
80 uint64_t cr0;
81 uint64_t cr2;
82 uint64_t cr3;
83 uint64_t cr4;
85 uint64_t dr0;
86 uint64_t dr1;
87 uint64_t dr2;
88 uint64_t dr3;
89 uint64_t dr6;
90 uint64_t dr7;
112 uint64_t cs_base;
113 uint64_t ds_base;
114 uint64_t es_base;
115 uint64_t fs_base;
116 uint64_t gs_base;
117 uint64_t ss_base;
118 uint64_t tr_base;
119 uint64_t ldtr_base;
120 uint64_t idtr_base;
121 uint64_t gdtr_base;
132 uint64_t sysenter_cs;
133 uint64_t sysenter_esp;
134 uint64_t sysenter_eip;
137 uint64_t shadow_gs;
140 uint64_t msr_flags; /* Obsolete, ignored. */
141 uint64_t msr_lstar;
142 uint64_t msr_star;
143 uint64_t msr_cstar;
144 uint64_t msr_syscall_mask;
145 uint64_t msr_efer;
146 uint64_t msr_tsc_aux;
149 uint64_t tsc;
174 uint64_t rax;
175 uint64_t rbx;
176 uint64_t rcx;
177 uint64_t rdx;
178 uint64_t rbp;
179 uint64_t rsi;
180 uint64_t rdi;
181 uint64_t rsp;
182 uint64_t r8;
183 uint64_t r9;
184 uint64_t r10;
185 uint64_t r11;
186 uint64_t r12;
187 uint64_t r13;
188 uint64_t r14;
189 uint64_t r15;
191 uint64_t rip;
192 uint64_t rflags;
194 uint64_t cr0;
195 uint64_t cr2;
196 uint64_t cr3;
197 uint64_t cr4;
199 uint64_t dr0;
200 uint64_t dr1;
201 uint64_t dr2;
202 uint64_t dr3;
203 uint64_t dr6;
204 uint64_t dr7;
226 uint64_t cs_base;
227 uint64_t ds_base;
228 uint64_t es_base;
229 uint64_t fs_base;
230 uint64_t gs_base;
231 uint64_t ss_base;
232 uint64_t tr_base;
233 uint64_t ldtr_base;
234 uint64_t idtr_base;
235 uint64_t gdtr_base;
246 uint64_t sysenter_cs;
247 uint64_t sysenter_esp;
248 uint64_t sysenter_eip;
251 uint64_t shadow_gs;
254 uint64_t msr_flags; /* Obsolete, ignored. */
255 uint64_t msr_lstar;
256 uint64_t msr_star;
257 uint64_t msr_cstar;
258 uint64_t msr_syscall_mask;
259 uint64_t msr_efer;
263 uint64_t tsc;
368 uint64_t bits;
388 uint64_t base_address; \
410 uint64_t apic_base_msr;
413 uint64_t tdt_msr;
436 uint64_t pad[2];
449 uint64_t pad[1];
519 uint64_t capability; /* capabilities */
520 uint64_t res0; /* reserved */
521 uint64_t config; /* configuration */
522 uint64_t res1; /* reserved */
523 uint64_t isr; /* interrupt status reg */
524 uint64_t res2[25]; /* reserved */
525 uint64_t mc64; /* main counter */
526 uint64_t res3; /* reserved */
528 uint64_t config; /* configuration/cap */
529 uint64_t cmp; /* comparator */
530 uint64_t fsb; /* FSB route, not supported now */
531 uint64_t res4; /* reserved */
533 uint64_t res5[4*(24-HPET_TIMER_NUM)]; /* reserved, up to 0x3ff */
536 uint64_t period[HPET_TIMER_NUM]; /* Last value written to comparator */
561 uint64_t msr_pat_cr;
563 uint64_t msr_mtrr_var[MTRR_VCNT*2];
564 uint64_t msr_mtrr_fixed[NUM_FIXED_MSR];
565 uint64_t msr_mtrr_cap;
566 uint64_t msr_mtrr_def_type;
576 uint64_t xfeature_mask; /* Ignored */
577 uint64_t xcr0; /* Updated by XSETBV */
578 uint64_t xcr0_accum; /* Updated by XSETBV */
583 uint64_t xstate_bv; /* Updated by XRSTOR */
584 uint64_t xcomp_bv; /* Updated by XRSTOR{C,S} */
585 uint64_t reserved[6];
597 uint64_t hypercall_gpa;
598 uint64_t guest_os_id;
599 uint64_t time_ref_count;
600 uint64_t reference_tsc;
606 uint64_t vp_assist_msr;
609 uint64_t simp_msr;
610 uint64_t sint_msr[16];
611 uint64_t stimer_config_msr[4];
612 uint64_t stimer_count_msr[4];
618 uint64_t caps;
619 uint64_t mci_ctl2_bank0;
620 uint64_t mci_ctl2_bank1;
621 uint64_t mcg_ext_ctl;
627 uint64_t tsc_adjust;
638 uint64_t val;