Lines Matching +full:0 +full:x03002000
170 #define XEN_HYPERCALL_TAG 0XEA1
199 _sxghr_tmp->q = 0; \
201 } while ( 0 )
294 #define _VGCF_online 0
310 #define XEN_DOMCTL_CONFIG_GIC_NATIVE 0
314 #define XEN_DOMCTL_CONFIG_TEE_NONE 0
333 * = 0 => property not present
334 * > 0 => Value of the property
362 #define PSR_IT_MASK (0x0600fc00) /* Thumb If-Then Mask */
366 #define PSR_MODE_USR 0x10
367 #define PSR_MODE_FIQ 0x11
368 #define PSR_MODE_IRQ 0x12
369 #define PSR_MODE_SVC 0x13
370 #define PSR_MODE_MON 0x16
371 #define PSR_MODE_ABT 0x17
372 #define PSR_MODE_HYP 0x1a
373 #define PSR_MODE_UND 0x1b
374 #define PSR_MODE_SYS 0x1f
377 #define PSR_MODE_BIT 0x10 /* Set iff AArch32 */
378 #define PSR_MODE_EL3h 0x0d
379 #define PSR_MODE_EL3t 0x0c
380 #define PSR_MODE_EL2h 0x09
381 #define PSR_MODE_EL2t 0x08
382 #define PSR_MODE_EL1h 0x05
383 #define PSR_MODE_EL1t 0x04
384 #define PSR_MODE_EL0t 0x00
389 #define SCTLR_GUEST_INIT xen_mk_ullong(0x00c50078)
407 #define GUEST_GICD_BASE xen_mk_ullong(0x03001000)
408 #define GUEST_GICD_SIZE xen_mk_ullong(0x00001000)
409 #define GUEST_GICC_BASE xen_mk_ullong(0x03002000)
410 #define GUEST_GICC_SIZE xen_mk_ullong(0x00002000)
413 #define GUEST_GICV3_GICD_BASE xen_mk_ullong(0x03001000)
414 #define GUEST_GICV3_GICD_SIZE xen_mk_ullong(0x00010000)
418 #define GUEST_GICV3_GICR0_BASE xen_mk_ullong(0x03020000) /* vCPU0..127 */
419 #define GUEST_GICV3_GICR0_SIZE xen_mk_ullong(0x01000000)
425 #define GUEST_VPCI_ECAM_BASE xen_mk_ullong(0x10000000)
426 #define GUEST_VPCI_ECAM_SIZE xen_mk_ullong(0x10000000)
429 #define GUEST_ACPI_BASE xen_mk_ullong(0x20000000)
430 #define GUEST_ACPI_SIZE xen_mk_ullong(0x02000000)
433 #define GUEST_PL011_BASE xen_mk_ullong(0x22000000)
434 #define GUEST_PL011_SIZE xen_mk_ullong(0x00001000)
437 #define GUEST_VPCI_ADDR_TYPE_MEM xen_mk_ullong(0x02000000)
438 #define GUEST_VPCI_MEM_ADDR xen_mk_ullong(0x23000000)
439 #define GUEST_VPCI_MEM_SIZE xen_mk_ullong(0x10000000)
445 #define GUEST_GNTTAB_BASE xen_mk_ullong(0x38000000)
446 #define GUEST_GNTTAB_SIZE xen_mk_ullong(0x01000000)
448 #define GUEST_MAGIC_BASE xen_mk_ullong(0x39000000)
449 #define GUEST_MAGIC_SIZE xen_mk_ullong(0x01000000)
458 #define GUEST_RAM0_BASE xen_mk_ullong(0x40000000) /* 3GB of low RAM @ 1GB */
459 #define GUEST_RAM0_SIZE xen_mk_ullong(0xc0000000)
462 #define GUEST_VPCI_ADDR_TYPE_PREFETCH_MEM xen_mk_ullong(0x42000000)
463 #define GUEST_VPCI_PREFETCH_MEM_ADDR xen_mk_ullong(0x100000000)
464 #define GUEST_VPCI_PREFETCH_MEM_SIZE xen_mk_ullong(0x100000000)
466 #define GUEST_RAM1_BASE xen_mk_ullong(0x0200000000) /* 1016GB of RAM @ 8GB */
467 #define GUEST_RAM1_SIZE xen_mk_ullong(0xfe00000000)
488 #define PSCI_cpu_suspend 0