351         U32 v4 = seed - PRIME32_1;  in XXH32_endian_align()  local
357             v4 = XXH32_round(v4, XXH_get32bits(p)); p+=4;  in XXH32_endian_align()
360         h32 = XXH_rotl32(v1, 1) + XXH_rotl32(v2, 7) + XXH_rotl32(v3, 12) + XXH_rotl32(v4, 18);  in XXH32_endian_align()
451         U64 v4 = seed - PRIME64_1;  in XXH64_endian_align()  local
457             v4 = XXH64_round(v4, XXH_get64bits(p)); p+=8;  in XXH64_endian_align()
460         h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);  in XXH64_endian_align()
464         h64 = XXH64_mergeRound(h64, v4);  in XXH64_endian_align()
562     state.v4 = seed - PRIME32_1;  in XXH32_reset()
575     state.v4 = seed - PRIME64_1;  in XXH64_reset()
605             state->v4 = XXH32_round(state->v4, XXH_readLE32(p32, endian)); p32++;  in XXH32_update_endian()
616         U32 v4 = state->v4;  in XXH32_update_endian()  local
622             v4 = XXH32_round(v4, XXH_readLE32(p, endian)); p+=4;  in XXH32_update_endian()
628         state->v4 = v4;  in XXH32_update_endian()
658 …2(state->v1, 1) + XXH_rotl32(state->v2, 7) + XXH_rotl32(state->v3, 12) + XXH_rotl32(state->v4, 18);  in XXH32_digest_endian()
725         state->v4 = XXH64_round(state->v4, XXH_readLE64(state->mem64+3, endian));  in XXH64_update_endian()
735         U64 v4 = state->v4;  in XXH64_update_endian()  local
741             v4 = XXH64_round(v4, XXH_readLE64(p, endian)); p+=8;  in XXH64_update_endian()
747         state->v4 = v4;  in XXH64_update_endian()
780         U64 const v4 = state->v4;  in XXH64_digest_endian()  local
782         h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);  in XXH64_digest_endian()
786         h64 = XXH64_mergeRound(h64, v4);  in XXH64_digest_endian()