Lines Matching +full:0 +full:x0003ffff

81 	uint32_t kgse_dv0; /**< KeyGen Scheme Entry Default Value 0 */
99 #define FM_KG_KGAR_GO				0x80000000
100 #define FM_KG_KGAR_READ				0x40000000
101 #define FM_KG_KGAR_WRITE			0x00000000
102 #define FM_KG_KGAR_SEL_SCHEME_ENTRY		0x00000000
103 #define FM_KG_KGAR_SCM_WSEL_UPDATE_CNT		0x00008000
105 #define KG_SCH_PP_SHIFT_HIGH			0x80000000
106 #define KG_SCH_PP_NO_GEN			0x10000000
107 #define KG_SCH_PP_SHIFT_LOW			0x0000F000
108 #define KG_SCH_MODE_NIA_PLCR			0x40000000
109 #define KG_SCH_GEN_EXTRACT_TYPE			0x00008000
110 #define KG_SCH_BITMASK_MASK			0x000000FF
111 #define KG_SCH_GEN_VALID			0x80000000
112 #define KG_SCH_GEN_MASK				0x00FF0000
113 #define FM_PCD_KG_KGAR_ERR			0x20000000
114 #define FM_PCD_KG_KGAR_SEL_CLS_PLAN_ENTRY	0x01000000
115 #define FM_PCD_KG_KGAR_SEL_PORT_ENTRY		0x02000000
116 #define FM_PCD_KG_KGAR_SEL_PORT_WSEL_SP		0x00008000
117 #define FM_PCD_KG_KGAR_SEL_PORT_WSEL_CPP	0x00004000
118 #define FM_PCD_KG_KGAR_WSEL_MASK		0x0000FF00
119 #define KG_SCH_HASH_CONFIG_NO_FQID		0x80000000
120 #define KG_SCH_HASH_CONFIG_SYM			0x40000000
122 #define FM_EX_KG_DOUBLE_ECC			0x80000000
123 #define FM_EX_KG_KEYSIZE_OVERFLOW		0x40000000
126 #define KG_FMKG_SERC_CAP			0x80000000
127 #define KG_FMKG_SERC_CET			0x40000000
128 #define KG_FMKG_SERC_CNT_MSK			0x00FF0000
130 #define KG_FMKG_SERC_ADDR_MSK			0x000003FF
133 #define FM_KG_KGGCR_EN				0x80000000
134 #define KG_SCH_GEN_VALID			0x80000000
135 #define KG_SCH_GEN_EXTRACT_TYPE			0x00008000
136 #define KG_ERR_TYPE_DOUBLE			0x40000000
137 #define KG_ERR_ADDR_MASK			0x00000FFF
138 #define KG_SCH_MODE_EN				0x80000000
145 #define FM_KG_SCH_GEN_HT_INVALID		0
147 #define FM_KG_MASK_SEL_GEN_BASE			0x20
152 	case 0: (shift) = 26; break;	\
156 	default: (shift) = 0;		\
162 	case 0: (shift) = 16; break;	\
163 	case 1: (shift) = 0; break;	\
166 	default: (shift) = 0;		\
172 	case 0: shift = 24; break;	\
175 	case 3: shift = 0;  break;	\
176 	default: shift = 0;		\
183 #define FMAN_KG_SCH_MODE_EN		0x80000000
184 #define FMAN_KG_SCH_MODE_NIA_PLCR	0x40000000
201 #define FMAN_KG_SCH_GEN_VALID		0x80000000
203 #define FMAN_KG_SCH_GEN_OR		0x00008000
211 #define FMAN_KG_SCH_HASH_HSHIFT_MAX	0x28
212 #define FMAN_KG_SCH_HASH_SYM		0x40000000
213 #define FMAN_KG_SCH_HASH_NO_FQID_GEN	0x80000000
217 #define FMAN_KG_SCH_PP_SH_MASK		0x80000000
218 #define FMAN_KG_SCH_PP_SL_MASK		0x0000F000
219 #define FMAN_KG_SCH_PP_SHIFT_MAX	0x17
221 #define FMAN_KG_SCH_PP_NO_GEN		0x10000000
366 	E_FMAN_PCD_INVALID = 0,	/**< Invalid PCD engine indicated*/
468 #define KG_NIA_ORDER_RESTOR	0x00800000
469 #define KG_NIA_ENG_FM_CTL	0x00000000
470 #define KG_NIA_ENG_PRS		0x00440000
471 #define KG_NIA_ENG_KG		0x00480000
472 #define KG_NIA_ENG_PLCR		0x004C0000
473 #define KG_NIA_ENG_BMI		0x00500000
474 #define KG_NIA_ENG_QMI_ENQ	0x00540000
475 #define KG_NIA_ENG_QMI_DEQ	0x00580000
476 #define KG_NIA_ENG_MASK		0x007C0000
478 #define KG_NIA_AC_MASK		0x0003FFFF
480 #define KG_NIA_INVALID		0xFFFFFFFF