Lines Matching +full:sgmii +full:- +full:phy
2 * Copyright 2008-2012 Freescale Semiconductor Inc.
37 @Description Ethernet MAC-PHY Interface
48 E_ENET_IF_SGMII = 0x00080000, /**< SGMII interface */
72 @Description Enum for inter-module interrupts registration
168 /**< dTSEC Time-Stamp Receive Error */
172 /**< mEMAC Time-stamp FIFO ECC error interrupt;
177 /**< SGMII/QSGII interface with 1000BaseX auto-negotiation between MAC
178 and phy or backplane;
179 Note: 1000BaseX auto-negotiation relates only to interface between MAC
180 and phy/backplane, SGMII phy can still synchronize with far-end phy at
211 /**< 10 Mbps SGMII with auto-negotiation between MAC and
212 SGMII phy according to Cisco SGMII specification */
214 /**< 100 Mbps SGMII with auto-negotiation between MAC and
215 SGMII phy according to Cisco SGMII specification */
217 /**< 1000 Mbps SGMII with auto-negotiation between MAC and
218 SGMII phy according to Cisco SGMII specification */
221 /**< 10 Mbps SGMII with 1000BaseX auto-negotiation between
222 MAC and SGMII phy or backplane */
225 /**< 100 Mbps SGMII with 1000BaseX auto-negotiation between
226 MAC and SGMII phy or backplane */
229 /**< 1000 Mbps SGMII with 1000BaseX auto-negotiation between
230 MAC and SGMII phy or backplane */
232 /**< 1000 Mbps QSGMII with auto-negotiation between MAC and
233 QSGMII phy according to Cisco QSGMII specification */
236 /**< 1000 Mbps QSGMII with 1000BaseX auto-negotiation between
237 MAC and QSGMII phy or backplane */
270 (_enet_addr)[i] = (uint8_t)((_addr64) >> ((5-i)*8));\