Lines Matching +full:inter +full:- +full:processor

3  � 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc.
138 /* Corenet initiator settings. Stash request queues are 4-deep to match cores'
146 /* QM-Portal defaults */
397  * inter-processor locking only. */
400         if (fq->flags & QMAN_FQ_FLAG_LOCKED)    \
401             XX_LockSpinlock(&fq->fqlock);       \
405         if (fq->flags & QMAN_FQ_FLAG_LOCKED)    \
406             XX_UnlockSpinlock(&fq->fqlock);     \
410  * interrupts/preemption and, if FLAG_UNLOCKED isn't defined, inter-processor
412 #define NCSW_PLOCK(p) ((t_QmPortal*)(p))->irq_flags = XX_DisableAllIntr()
413 #define PUNLOCK(p) XX_RestoreAllIntr(((t_QmPortal*)(p))->irq_flags)
418 /* Follows WQ_CS_CFG0-5 */
528     uint32_t                    bits;    /* PORTAL_BITS_*** - dynamic, strictly internal */
533     uint32_t                    options;    /* QMAN_PORTAL_FLAG_*** - static, caller-provided */
535     /* The wrap-around eq_[prod|cons] counters are used to support
539 …struct qman_cgrs            cgrs[2]; /* 2-element array. cgrs[0] is mask, cgrs[1] is previous snap…
542      * these handlers. (This is not considered a fast-path mechanism.) */
558     /* s/w-visible states. Ie. tentatively scheduled + truly scheduled +
559      * active + held-active + held-suspended are just "sched". Things like
590 /*       Inter-Module functions         */
604     ASSERT_COND(!((t_Qm*)h_Qm)->h_Portals[portalId] || !h_Portal);  in QmSetPortalHandle()
605     ((t_Qm*)h_Qm)->h_Portals[portalId] = h_Portal;  in QmSetPortalHandle()
613     return p_Qm->h_Portals[CORE_GetId()];  in QmGetPortalHandle()
618     uint32_t e = 0;    /* co-efficient, exponent */  in GenerateCgrThresh()
640             p_Qm->exceptions |= bitMask;  in SetException()
642             p_Qm->exceptions &= ~bitMask;  in SetException()