37 void fman_tgec_set_mac_address(struct tgec_regs *regs, uint8_t *adr)  in fman_tgec_set_mac_address()  argument
46 	iowrite32be(tmp0, &regs->mac_addr_0);  in fman_tgec_set_mac_address()
47 	iowrite32be(tmp1, &regs->mac_addr_1);  in fman_tgec_set_mac_address()
50 void fman_tgec_reset_stat(struct tgec_regs *regs)  in fman_tgec_reset_stat()  argument
54 	tmp = ioread32be(&regs->command_config);  in fman_tgec_reset_stat()
58 	iowrite32be(tmp, &regs->command_config);  in fman_tgec_reset_stat()
60 	while (ioread32be(&regs->command_config) & CMD_CFG_STAT_CLR) ;  in fman_tgec_reset_stat()
64 	(((uint64_t)ioread32be(&regs->bn ## _u) << 32) | \
65 			ioread32be(&regs->bn ## _l))
67 uint64_t fman_tgec_get_counter(struct tgec_regs *regs, enum tgec_counters reg_name)  in fman_tgec_get_counter()  argument
157 void fman_tgec_enable(struct tgec_regs *regs, bool apply_rx, bool apply_tx)  in fman_tgec_enable()  argument
161 	tmp = ioread32be(&regs->command_config);  in fman_tgec_enable()
166 	iowrite32be(tmp, &regs->command_config);  in fman_tgec_enable()
169 void fman_tgec_disable(struct tgec_regs *regs, bool apply_rx, bool apply_tx)  in fman_tgec_disable()  argument
173 	tmp_reg_32 = ioread32be(&regs->command_config);  in fman_tgec_disable()
178 	iowrite32be(tmp_reg_32, &regs->command_config);  in fman_tgec_disable()
181 void fman_tgec_set_promiscuous(struct tgec_regs *regs, bool val)  in fman_tgec_set_promiscuous()  argument
185 	tmp = ioread32be(&regs->command_config);  in fman_tgec_set_promiscuous()
190 	iowrite32be(tmp, &regs->command_config);  in fman_tgec_set_promiscuous()
193 void fman_tgec_reset_filter_table(struct tgec_regs *regs)  in fman_tgec_reset_filter_table()  argument
197 		iowrite32be(i & ~TGEC_HASH_MCAST_EN, &regs->hashtable_ctrl);  in fman_tgec_reset_filter_table()
200 void fman_tgec_set_hash_table_entry(struct tgec_regs *regs, uint32_t crc)  in fman_tgec_set_hash_table_entry()  argument
203 	iowrite32be(hash | TGEC_HASH_MCAST_EN, &regs->hashtable_ctrl);  in fman_tgec_set_hash_table_entry()
206 void fman_tgec_set_hash_table(struct tgec_regs *regs, uint32_t value)  in fman_tgec_set_hash_table()  argument
208 	iowrite32be(value, &regs->hashtable_ctrl);  in fman_tgec_set_hash_table()
211 void fman_tgec_set_tx_pause_frames(struct tgec_regs *regs, uint16_t pause_time)  in fman_tgec_set_tx_pause_frames()  argument
213 	iowrite32be((uint32_t)pause_time, &regs->pause_quant);  in fman_tgec_set_tx_pause_frames()
216 void fman_tgec_set_rx_ignore_pause_frames(struct tgec_regs *regs, bool en)  in fman_tgec_set_rx_ignore_pause_frames()  argument
220 	tmp = ioread32be(&regs->command_config);  in fman_tgec_set_rx_ignore_pause_frames()
225 	iowrite32be(tmp, &regs->command_config);  in fman_tgec_set_rx_ignore_pause_frames()
228 void fman_tgec_enable_1588_time_stamp(struct tgec_regs *regs, bool en)  in fman_tgec_enable_1588_time_stamp()  argument
232 	tmp = ioread32be(&regs->command_config);  in fman_tgec_enable_1588_time_stamp()
237 	iowrite32be(tmp, &regs->command_config);  in fman_tgec_enable_1588_time_stamp()
240 uint32_t fman_tgec_get_event(struct tgec_regs *regs, uint32_t ev_mask)  in fman_tgec_get_event()  argument
242 	return ioread32be(&regs->ievent) & ev_mask;  in fman_tgec_get_event()
245 void fman_tgec_ack_event(struct tgec_regs *regs, uint32_t ev_mask)  in fman_tgec_ack_event()  argument
247 	iowrite32be(ev_mask, &regs->ievent);  in fman_tgec_ack_event()
250 uint32_t fman_tgec_get_interrupt_mask(struct tgec_regs *regs)  in fman_tgec_get_interrupt_mask()  argument
252 	return ioread32be(&regs->imask);  in fman_tgec_get_interrupt_mask()
255 void fman_tgec_add_addr_in_paddr(struct tgec_regs *regs, uint8_t *adr)  in fman_tgec_add_addr_in_paddr()  argument
264 	iowrite32be(tmp0, &regs->mac_addr_2);  in fman_tgec_add_addr_in_paddr()
265 	iowrite32be(tmp1, &regs->mac_addr_3);  in fman_tgec_add_addr_in_paddr()
268 void fman_tgec_clear_addr_in_paddr(struct tgec_regs *regs)  in fman_tgec_clear_addr_in_paddr()  argument
270 	iowrite32be(0, &regs->mac_addr_2);  in fman_tgec_clear_addr_in_paddr()
271 	iowrite32be(0, &regs->mac_addr_3);  in fman_tgec_clear_addr_in_paddr()
274 uint32_t fman_tgec_get_revision(struct tgec_regs *regs)  in fman_tgec_get_revision()  argument
276 	return ioread32be(&regs->tgec_id);  in fman_tgec_get_revision()
279 void fman_tgec_enable_interrupt(struct tgec_regs *regs, uint32_t ev_mask)  in fman_tgec_enable_interrupt()  argument
281 	iowrite32be(ioread32be(&regs->imask) | ev_mask, &regs->imask);  in fman_tgec_enable_interrupt()
284 void fman_tgec_disable_interrupt(struct tgec_regs *regs, uint32_t ev_mask)  in fman_tgec_disable_interrupt()  argument
286 	iowrite32be(ioread32be(&regs->imask) & ~ev_mask, &regs->imask);  in fman_tgec_disable_interrupt()
289 uint16_t fman_tgec_get_max_frame_len(struct tgec_regs *regs)  in fman_tgec_get_max_frame_len()  argument
291 	return (uint16_t) ioread32be(&regs->maxfrm);  in fman_tgec_get_max_frame_len()
316 int fman_tgec_init(struct tgec_regs *regs, struct tgec_cfg *cfg,  in fman_tgec_init()  argument
345 	iowrite32be(tmp, &regs->command_config);  in fman_tgec_init()
348 	iowrite32be((uint32_t)cfg->max_frame_length, &regs->maxfrm);  in fman_tgec_init()
350 	iowrite32be(cfg->pause_quant, &regs->pause_quant);  in fman_tgec_init()
353 	fman_tgec_ack_event(regs, 0xffffffff);  in fman_tgec_init()
354 	fman_tgec_enable_interrupt(regs, exception_mask);  in fman_tgec_init()
359 void fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007(struct tgec_regs *regs)  in fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007()  argument
364 	tmp = (ioread32be(&regs->tx_ipg_len) & ~TGEC_TX_IPG_LENGTH_MASK) | 12;  in fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007()
366 	iowrite32be(tmp, &regs->tx_ipg_len);  in fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007()