Lines Matching +full:system +full:- +full:bus

4   PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,
6   defferent types of bus mastering DMA.
8   Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
9   SPDX-License-Identifier: BSD-2-Clause-Patent
53   /// A read operation from system memory by a bus master that is not capable of producing
58   /// A write operation from system memory by a bus master that is not capable of producing
63   /// Provides both read and write access to system memory by both the processor and a bus
68   /// A read operation from system memory by a bus master that is capable of producing PCI
73   /// A write operation to system memory by a bus master that is capable of producing PCI
78   /// Provides both read and write access to system memory by both the processor and a bus
104 #define EFI_PCI_ADDRESS(bus, dev, func, reg) \  argument
106   (((UINTN) bus) << 24) | \
115   UINT8     Bus;  member
211   Provides the PCI controller-specific addresses required to access system memory from a
212   DMA bus master.
215 …@param  Operation             Indicates if the bus master is going to read or write to system memo…
216   @param  HostAddress           The system memory address to map to the PCI controller.
219 …@param  DeviceAddress         The resulting map address for the bus master PCI controller to use to
227   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.
249   @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.
268   @param  HostAddress           A pointer to store the base system memory address of the
295   @param  HostAddress           The base system memory address of the allocated range.
311   Flushes all PCI posted write transactions from a PCI host bridge to system memory.
316                                 bridge to system memory.