Lines Matching full:memory

4   PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,
53   /// A read operation from system memory by a bus master that is not capable of producing
58   /// A write operation from system memory by a bus master that is not capable of producing
63   /// Provides both read and write access to system memory by both the processor and a bus
68   /// A read operation from system memory by a bus master that is capable of producing PCI
73   /// A write operation to system memory by a bus master that is capable of producing PCI
78   /// Provides both read and write access to system memory by both the processor and a bus
124   @param  Width                 Signifies the width of the memory or I/O operations.
125   @param  Address               The base address of the memory or I/O operations.
129   @param  Result                Pointer to the last value read from the memory location.
150   Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
153   @param  Width                 Signifies the width of the memory operations.
154   @param  Address               The base address of the memory operations.
155   @param  Count                 The number of memory operations to perform.
176   /// Read PCI controller registers in the PCI root bridge memory space.
180   /// Write PCI controller registers in the PCI root bridge memory space.
186   Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI
187   root bridge memory space.
190   @param  Width                 Signifies the width of the memory operations.
191   @param  DestAddress           The destination address of the memory operation.
192   @param  SrcAddress            The source address of the memory operation.
193   @param  Count                 The number of memory operations to perform.
195   @retval EFI_SUCCESS           The data was copied from one memory region to another memory region.
211   Provides the PCI controller-specific addresses required to access system memory from a
215 …aram  Operation             Indicates if the bus master is going to read or write to system memory.
216   @param  HostAddress           The system memory address to map to the PCI controller.
249   @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.
265   @param  MemoryType            The type of memory to allocate, EfiBootServicesData or
268   @param  HostAddress           A pointer to store the base system memory address of the
272   @retval EFI_SUCCESS           The requested memory pages were allocated.
276   @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.
291   Frees memory that was allocated with AllocateBuffer().
295   @param  HostAddress           The base system memory address of the allocated range.
297   @retval EFI_SUCCESS           The requested memory pages were freed.
298   @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
311   Flushes all PCI posted write transactions from a PCI host bridge to system memory.
316                                 bridge to system memory.
405 /// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are