Lines Matching +full:image +full:- +full:controller

3   the PCI bus driver/PCI Host Bridge Resource Allocation driver and a platform-specific
7 Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
8 SPDX-License-Identifier: BSD-2-Clause-Patent
40 ///   - EFI_RESERVE_NONE_IO_ALIAS:<BR>
46 ///   - EFI_RESERVE_ISA_IO_ALIAS | EFI_RESERVE_VGA_IO_ALIAS:<BR>
49 ///       ranges. In this scheme, seventy-five percent of the I/O space remains unused.
56 ///         - n100..n3FF
57 ///         - n500..n7FF
58 ///         - n900..nBFF
59 ///         - nD00..nFFF
68 ///   - EFI_RESERVE_ISA_IO_NO_ALIAS | EFI_RESERVE_VGA_IO_ALIAS:<BR>
69 ///       Sets aside the ISA I/O range (0x100 - 0x3FF) during PCI enumeration
73 ///       wants to support non-VGA devices that ask for the ISA range (0x100 -
75 ///       not allocate I/O addresses out of the legacy ISA I/O range (0x100 -
81 ///       aliases, all the upstream PCI-to-PCI bridges must be set up to perform
82 ///       10-bit decode on legacy VGA ranges. To prevent two bridges from
83 ///       positively decoding the same address, all PCI-to-PCI bridges that are
87 ///       of PCI-to-PCI bridges and is described in the white paper PCI-to-PCI
91 ///   - EFI_RESERVE_ISA_IO_NO_ALIAS | EFI_RESERVE_VGA_IO_NO_ALIAS:<BR>
92 ///       Sets aside the ISA I/O range (0x100 - 0x3FF) during PCI enumeration.
98 ///       range (0x100-0x3FF). If a PCI device driver asks for the ISA I/O
102 ///       require VGA aliases. To truly support 16-bit VGA decode, all the PCIto-
104 ///       upstream to the parent PCI root bridge, must support 16-bit VGA I/O
105 ///       decode. See the PCI-to-PCI Bridge Architecture Specification for
106 ///       information regarding the 16-bit VGA decode support. This
108 ///       of these bridges does not support 16-bit VGA decode, it will positively
123 ///   - n100..n3FF
124 ///   - n500..n7FF
125 ///   - n900..nBFF
126 ///   - nD00..nFFF.
131 /// Sets aside ISA I/O range 0x100-0x3FF.
147 /// platform-specific code.
186   it can perform platform-specific actions. No specific actions are required.
189   twice for every Phase-once before the PCI Host Bridge Resource Allocation Protocol
198   @param[in] HostBridge     The handle of the host bridge controller.
216   controller at several predefined points during PCI controller initialization.
219   it can perform platform-specific actions. No specific actions are required.
222   every PCI controller-once before the PCI Host Bridge Resource Allocation Protocol driver
234   @param[in] Phase          The phase of the PCI controller enumeration.
273   Gets the PCI device's option ROM from a platform-specific location.
275   The GetPciRom() function gets the PCI device's option ROM from a platform-specific location.
276   The option ROM will be loaded into memory. This member function is used to return an image
277   that is packaged as a PCI 2.2 option ROM. The image may contain both legacy and EFI option
280   stored in platform-specific storage, and this member function can retrieve it from that storage
282   scanning the ROM that is attached to any controller, which allows a platform to specify a ROM
283   image that is different from the ROM image on a PCI card.
287   @param[out] RomImage    If the call succeeds, the pointer to the pointer to the option ROM image.
312 /// Bridge Resource Allocation driver and a platform-specific driver to describe
323   /// controller at several predefined points during PCI controller initialization.
331   /// Gets the PCI device's option ROM from a platform-specific location.