Lines Matching full:memory
2 EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration,
47 #define EFI_PCI_IO_PASS_THROUGH_BAR 0xff ///< Special BAR that passes a memory or…
48 #define EFI_PCI_IO_ATTRIBUTE_MASK 0x077f ///< All the following I/O and Memory cy…
56 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 ///< Map a memory range so writes are co…
58 #define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 ///< Enable the Memory decode bit in the…
60 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 ///< Map a memory range so all r/w acces…
61 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 ///< Disable a memory range
79 /// A read operation from system memory by a bus master.
83 /// A write operation from system memory by a bus master.
87 /// Provides both read and write access to system memory by both the processor and a
124 Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
128 @param Width Signifies the width of the memory or I/O operations.
130 base address for the memory operation to perform.
131 @param Offset The offset within the selected BAR to start the memory operation.
135 @param Result Pointer to the last value read from the memory location.
159 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
162 @param Width Signifies the width of the memory or I/O operations.
164 base address for the memory or I/O operation to perform.
165 …@param Offset The offset within the selected BAR to start the memory or I/O operat…
166 @param Count The number of memory or I/O operations to perform.
191 /// Read PCI controller registers in the PCI memory or I/O space.
195 /// Write PCI controller registers in the PCI memory or I/O space.
204 @param Width Signifies the width of the memory operations.
240 Enables a PCI driver to copy one region of PCI memory space to another region of PCI
241 memory space.
244 @param Width Signifies the width of the memory operations.
246 base address for the memory operation to perform.
248 start the memory writes for the copy operation.
250 base address for the memory operation to perform.
252 the memory reads for the copy operation.
253 @param Count The number of memory operations to perform. Bytes moved is Width
256 @retval EFI_SUCCESS The data was copied from one memory region to another memory region.
280 Provides the PCI controller-specific addresses needed to access system memory.
283 …aram Operation Indicates if the bus master is going to read or write to system memory.
284 @param HostAddress The system memory address to map to the PCI controller.
316 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
332 @param MemoryType The type of memory to allocate, EfiBootServicesData or
335 @param HostAddress A pointer to store the base system memory address of the
339 @retval EFI_SUCCESS The requested memory pages were allocated.
343 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
358 Frees memory that was allocated with AllocateBuffer().
362 @param HostAddress The base system memory address of the allocated range.
364 @retval EFI_SUCCESS The requested memory pages were freed.
365 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
378 Flushes all PCI posted write transactions from a PCI host bridge to system memory.
383 bridge to system memory.
510 /// The EFI_PCI_IO_PROTOCOL provides the basic Memory, I/O, PCI configuration,
539 /// A pointer to the in memory copy of the ROM image. The PCI Bus Driver is responsible
540 /// for allocating memory for the ROM image, and copying the contents of the ROM to memory.