Lines Matching +full:count +full:- +full:width

5   is used by a PCI root bridge I/O driver to perform memory-mapped I/O and I/O transactions.
7   bus-specific configuration cycles, such as the transitional configuration address and data
11   Note: This is a boot-services only protocol and it may not be used by runtime drivers after
15   Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
16   SPDX-License-Identifier: BSD-2-Clause-Patent
35 /// Enumeration that defines the width of the I/O operation.
60   for satisfying any alignment and I/O width restrictions that a PI System on a
61   platform might require. For example on some platforms, width requests of
65   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
67   each of the Count operations that is performed.
69   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
71   incremented for each of the Count operations that is performed. The read or
72   write operation is performed Count times on the same Address.
74   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
76   incremented for each of the Count operations that is performed. The read or
77   write operation is performed Count times from the first element of Buffer.
80   @param[in]       Width    Signifies the width of the I/O or Memory operation.
82   @param[in]       Count    The number of I/O operations to perform. The number
83                             of bytes moved is Width size * Count, starting at Address.
88   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
90   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
91   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
92                                  and Count is not valid for this PI system.
99   IN     EFI_CPU_IO_PROTOCOL_WIDTH         Width,
101   IN     UINTN                             Count,
125   /// Enables a driver to access memory-mapped registers in the EFI system memory space.