Lines Matching +full:gpio +full:- +full:restart
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 #include "fu540-c000.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pwm/pwm.h>
14 compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000",
18 stdout-path = "serial0";
22 timebase-frequency = <RTCCLK_FREQ>;
31 #clock-cells = <0>;
32 compatible = "fixed-clock";
33 clock-frequency = <33333333>;
34 clock-output-names = "hfclk";
38 #clock-cells = <0>;
39 compatible = "fixed-clock";
40 clock-frequency = <RTCCLK_FREQ>;
41 clock-output-names = "rtcclk";
43 gpio-restart {
44 compatible = "gpio-restart";
45 gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
48 led-controller {
49 compatible = "pwm-leds";
51 led-d1 {
53 active-low;
55 max-brightness = <255>;
59 led-d2 {
61 active-low;
63 max-brightness = <255>;
67 led-d3 {
69 active-low;
71 max-brightness = <255>;
75 led-d4 {
77 active-low;
79 max-brightness = <255>;
100 compatible = "jedec,spi-nor";
102 spi-max-frequency = <50000000>;
103 m25p,fast-read;
104 spi-tx-bus-width = <4>;
105 spi-rx-bus-width = <4>;
112 compatible = "mmc-spi-slot";
114 spi-max-frequency = <20000000>;
115 voltage-ranges = <3300 3300>;
116 disable-wp;
117 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
123 phy-mode = "gmii";
124 phy-handle = <&phy0>;
125 phy0: ethernet-phy@0 {
126 compatible = "ethernet-phy-id0007.0771";
139 &gpio {