Lines Matching +full:uhs +full:-
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
6 #include "microchip-mpfs.dtsi"
12 model = "Microchip PolarFire-SoC Icicle Kit";
13 compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs";
25 stdout-path = "serial1:115200n8";
29 timebase-frequency = <RTCCLK_FREQ>;
48 clock-frequency = <125000000>;
70 bus-width = <4>;
71 disable-wp;
72 cap-sd-highspeed;
73 cap-mmc-highspeed;
74 card-detect-delay = <200>;
75 mmc-ddr-1_8v;
76 mmc-hs200-1_8v;
77 sd-uhs-sdr12;
78 sd-uhs-sdr25;
79 sd-uhs-sdr50;
80 sd-uhs-sdr104;
108 phy-mode = "sgmii";
109 phy-handle = <&phy0>;
114 phy-mode = "sgmii";
115 phy-handle = <&phy1>;
116 phy1: ethernet-phy@9 {
118 ti,fifo-depth = <0x1>;
120 phy0: ethernet-phy@8 {
122 ti,fifo-depth = <0x1>;