Lines Matching +full:0 +full:x4500000
21 #clock-cells = <0>;
39 reg = <0x2000000 0x800>;
150 reg = <0x2001000 0x1000>;
161 reg = <0x2009000 0x400>;
172 reg = <0x2031000 0x400>;
181 #sound-dai-cells = <0>;
187 reg = <0x2033000 0x1000>;
196 #sound-dai-cells = <0>;
202 reg = <0x2034000 0x1000>;
211 #sound-dai-cells = <0>;
217 reg = <0x2050000 0xa0>;
226 reg = <0x20500a0 0x20>;
235 reg = <0x2500000 0x400>;
248 reg = <0x2500400 0x400>;
261 reg = <0x2500800 0x400>;
274 reg = <0x2500c00 0x400>;
287 reg = <0x2501000 0x400>;
300 reg = <0x2501400 0x400>;
315 reg = <0x2502000 0x400>;
323 #size-cells = <0>;
330 reg = <0x2502400 0x400>;
338 #size-cells = <0>;
345 reg = <0x2502800 0x400>;
353 #size-cells = <0>;
360 reg = <0x2502c00 0x400>;
368 #size-cells = <0>;
373 reg = <0x02504000 0x400>;
378 pinctrl-0 = <&can0_pins>;
384 reg = <0x02504400 0x400>;
389 pinctrl-0 = <&can1_pins>;
395 reg = <0x3000000 0x1000>;
403 reg = <0x3002000 0x1000>;
415 reg = <0x3006000 0x1000>;
422 reg = <0x3040000 0x800>;
434 reg = <0x3102000 0x1000>,
435 <0x3103000 0x1000>;
442 dma-ranges = <0 0x40000000 0x80000000>;
450 reg = <0x4020000 0x1000>;
461 #size-cells = <0>;
466 reg = <0x4021000 0x1000>;
477 #size-cells = <0>;
483 reg = <0x4022000 0x1000>;
497 #size-cells = <0>;
503 reg = <0x04025000 0x1000>;
512 #size-cells = <0>;
519 reg = <0x04026000 0x1000>;
528 #size-cells = <0>;
534 reg = <0x4100000 0x400>;
539 extcon = <&usbphy 0>;
540 phys = <&usbphy 0>;
547 reg = <0x4100400 0x100>,
548 <0x4101800 0x100>,
549 <0x4200800 0x100>;
568 reg = <0x4101000 0x100>;
575 phys = <&usbphy 0>;
583 reg = <0x4101400 0x100>;
588 phys = <&usbphy 0>;
596 reg = <0x4200000 0x100>;
611 reg = <0x4200400 0x100>;
624 reg = <0x4500000 0x10000>;
637 #size-cells = <0>;
644 reg = <0x5000000 0x10000>;
653 compatible = "allwinner,sun20i-d1-de2-mixer-0";
654 reg = <0x5100000 0x100000>;
662 #size-cells = <0>;
676 reg = <0x5200000 0x100000>;
684 #size-cells = <0>;
699 reg = <0x5450000 0x1000>;
719 reg = <0x5451000 0x1000>;
725 #phy-cells = <0>;
730 reg = <0x5460000 0x1000>;
742 #size-cells = <0>;
744 tcon_top_mixer0_in: port@0 {
745 reg = <0>;
755 #size-cells = <0>;
757 tcon_top_mixer0_out_tcon_lcd0: endpoint@0 {
758 reg = <0>;
771 #size-cells = <0>;
782 #size-cells = <0>;
784 tcon_top_mixer1_out_tcon_lcd0: endpoint@0 {
785 reg = <0>;
811 reg = <0x5461000 0x1000>;
820 #clock-cells = <0>;
824 #size-cells = <0>;
826 tcon_lcd0_in: port@0 {
827 reg = <0>;
829 #size-cells = <0>;
831 tcon_lcd0_in_tcon_top_mixer0: endpoint@0 {
832 reg = <0>;
845 #size-cells = <0>;
857 reg = <0x5470000 0x1000>;
867 #size-cells = <0>;
869 tcon_tv0_in: port@0 {
870 reg = <0>;
872 #size-cells = <0>;
874 tcon_tv0_in_tcon_top_mixer0: endpoint@0 {
875 reg = <0>;
897 reg = <0x7001000 0x1000>;
905 reg = <0x7010000 0x400>;
918 reg = <0x7090000 0x400>;