Lines Matching +full:0 +full:x01f80000

29 		#size-cells = <0>;
31 PowerPC,8540@0 {
33 reg = <0>;
38 timebase-frequency = <0>;
39 bus-frequency = <0>;
40 clock-frequency = <0>;
47 reg = <0x00000000 0x10000000>;
54 ranges = <0x0 0xe0000000 0x100000>;
55 bus-frequency = <0>;
58 ecm-law@0 {
60 reg = <0x0 0x1000>;
66 reg = <0x1000 0x1000>;
73 reg = <0x2000 0x1000>;
80 reg = <0x20000 0x1000>;
82 cache-size = <0x40000>; // L2, 256K
89 #size-cells = <0>;
90 cell-index = <0>;
92 reg = <0x3000 0x100>;
99 reg = <0x48>;
104 reg = <0x68>;
112 reg = <0x21300 0x4>;
113 ranges = <0x0 0x21100 0x200>;
114 cell-index = <0>;
115 dma-channel@0 {
118 reg = <0x0 0x80>;
119 cell-index = <0>;
126 reg = <0x80 0x80>;
134 reg = <0x100 0x80>;
142 reg = <0x180 0x80>;
152 cell-index = <0>;
156 reg = <0x24000 0x1000>;
157 ranges = <0x0 0x24000 0x1000>;
165 #size-cells = <0>;
167 reg = <0x520 0x20>;
185 reg = <0x11>;
198 reg = <0x25000 0x1000>;
199 ranges = <0x0 0x25000 0x1000>;
207 #size-cells = <0>;
209 reg = <0x520 0x20>;
212 reg = <0x11>;
225 reg = <0x26000 0x1000>;
226 ranges = <0x0 0x26000 0x1000>;
234 #size-cells = <0>;
236 reg = <0x520 0x20>;
239 reg = <0x11>;
246 cell-index = <0>;
249 reg = <0x4500 0x100>; // reg base, size
250 clock-frequency = <0>; // should we fill in in uboot?
259 reg = <0x4600 0x100>; // reg base, size
260 clock-frequency = <0>; // should we fill in in uboot?
267 #address-cells = <0>;
269 reg = <0x40000 0x40000>;
280 reg = <0xe0005000 0x1000>;
284 ranges = <0x0 0x0 0xfe000000 0x02000000>;
286 nor@0,0 {
290 reg = <0x0 0x0 0x02000000>;
293 partition@0 {
295 reg = <0x00000000 0x00180000>;
299 reg = <0x00180000 0x01dc0000>;
303 reg = <0x01f40000 0x00040000>;
307 reg = <0x01f80000 0x00040000>;
311 reg = <0x01fc0000 0x00040000>;
323 reg = <0xe0008000 0x1000>;
325 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
328 0xe000 0 0 1 &mpic 2 1
329 0xe000 0 0 2 &mpic 3 1
330 0xe000 0 0 3 &mpic 6 1
331 0xe000 0 0 4 &mpic 5 1
334 0x5800 0 0 1 &mpic 6 1
335 0x5800 0 0 2 &mpic 5 1
340 bus-range = <0 0>;
341 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
342 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;