Lines Matching +full:3 +full:- +full:cell
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2009 Freescale Semiconductor Inc.
9 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
49 #address-cells = <2>;
50 #size-cells = <1>;
51 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
54 interrupt-parent = <&ipic>;
58 #address-cells = <1>;
59 #size-cells = <1>;
60 compatible = "cfi-flash";
62 bank-width = <2>;
63 device-width = <1>;
67 label = "u-boot";
68 read-only;
76 partition@3a0000 {
84 #address-cells = <1>;
85 #size-cells = <1>;
87 compatible = "simple-bus";
90 bus-frequency = <0>;
98 gpio1: gpio-controller@c00 {
99 #gpio-cells = <2>;
100 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
103 interrupt-parent = <&ipic>;
104 gpio-controller;
107 gpio2: gpio-controller@d00 {
108 #gpio-cells = <2>;
109 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
112 interrupt-parent = <&ipic>;
113 gpio-controller;
116 sleep-nexus {
117 #address-cells = <1>;
118 #size-cells = <1>;
119 compatible = "simple-bus";
124 #address-cells = <1>;
125 #size-cells = <0>;
126 cell-index = <0>;
127 compatible = "fsl-i2c";
130 interrupt-parent = <&ipic>;
145 compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
148 interrupt-parent = <&ipic>;
149 sdhci,wp-inverted;
150 clock-frequency = <133333333>;
155 #address-cells = <1>;
156 #size-cells = <0>;
157 cell-index = <1>;
158 compatible = "fsl-i2c";
161 interrupt-parent = <&ipic>;
166 cell-index = <0>;
170 interrupt-parent = <&ipic>;
175 #address-cells = <1>;
176 #size-cells = <1>;
177 compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
180 interrupt-parent = <&ipic>;
182 cell-index = <0>;
183 dma-channel@0 {
184 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
186 cell-index = <0>;
187 interrupt-parent = <&ipic>;
190 dma-channel@80 {
191 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
193 cell-index = <1>;
194 interrupt-parent = <&ipic>;
197 dma-channel@100 {
198 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
200 cell-index = <2>;
201 interrupt-parent = <&ipic>;
204 dma-channel@180 {
205 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
207 cell-index = <3>;
208 interrupt-parent = <&ipic>;
214 compatible = "fsl-usb2-dr";
216 #address-cells = <1>;
217 #size-cells = <0>;
218 interrupt-parent = <&ipic>;
225 #address-cells = <1>;
226 #size-cells = <1>;
227 cell-index = <0>;
233 local-mac-address = [ 00 00 00 00 00 00 ];
235 phy-connection-type = "mii";
236 interrupt-parent = <&ipic>;
237 tbi-handle = <&tbi0>;
238 phy-handle = <&phy2>;
240 fsl,magic-packet;
243 #address-cells = <1>;
244 #size-cells = <0>;
245 compatible = "fsl,gianfar-mdio";
248 phy2: ethernet-phy@2 {
249 interrupt-parent = <&ipic>;
254 phy3: ethernet-phy@3 {
255 interrupt-parent = <&ipic>;
260 tbi0: tbi-phy@11 {
262 device_type = "tbi-phy";
268 #address-cells = <1>;
269 #size-cells = <1>;
270 cell-index = <1>;
276 local-mac-address = [ 00 00 00 00 00 00 ];
278 phy-connection-type = "mii";
279 interrupt-parent = <&ipic>;
280 phy-handle = <&phy3>;
281 tbi-handle = <&tbi1>;
283 fsl,magic-packet;
286 #address-cells = <1>;
287 #size-cells = <0>;
288 compatible = "fsl,gianfar-tbi";
291 tbi1: tbi-phy@11 {
293 device_type = "tbi-phy";
299 cell-index = <0>;
303 clock-frequency = <0>;
305 interrupt-parent = <&ipic>;
309 cell-index = <1>;
313 clock-frequency = <0>;
315 interrupt-parent = <&ipic>;
323 interrupt-parent = <&ipic>;
324 fsl,num-channels = <4>;
325 fsl,channel-fifo-len = <24>;
326 fsl,exec-units-mask = <0x9fe>;
327 fsl,descriptor-types-mask = <0x3ab0ebf>;
332 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
335 interrupt-parent = <&ipic>;
340 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
343 interrupt-parent = <&ipic>;
348 * interrupts cell = <intr #, sense>
351 * sense == 2: Edge, high-to-low change
353 ipic: interrupt-controller@700 {
355 interrupt-controller;
356 #address-cells = <0>;
357 #interrupt-cells = <2>;
362 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
365 interrupt-parent = <&ipic>;
370 interrupt-map-mask = <0xf800 0 0 7>;
371 interrupt-map = <
379 interrupt-parent = <&ipic>;
381 bus-range = <0 0>;
386 clock-frequency = <66666666>;
387 #interrupt-cells = <1>;
388 #size-cells = <2>;
389 #address-cells = <3>;
392 compatible = "fsl,mpc8349-pci";
397 #address-cells = <3>;
398 #size-cells = <2>;
399 #interrupt-cells = <1>;
401 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
405 bus-range = <0 255>;
406 interrupt-map-mask = <0xf800 0 0 7>;
407 interrupt-map = <0 0 0 1 &ipic 1 8
409 0 0 0 3 &ipic 1 8
412 clock-frequency = <0>;
415 #address-cells = <3>;
416 #size-cells = <2>;
429 #address-cells = <3>;
430 #size-cells = <2>;
431 #interrupt-cells = <1>;
433 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
437 bus-range = <0 255>;
438 interrupt-map-mask = <0xf800 0 0 7>;
439 interrupt-map = <0 0 0 1 &ipic 2 8
441 0 0 0 3 &ipic 2 8
444 clock-frequency = <0>;
447 #address-cells = <3>;
448 #size-cells = <2>;