Lines Matching +full:sleep +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
49 #address-cells = <2>;
50 #size-cells = <1>;
51 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
54 interrupt-parent = <&ipic>;
62 #address-cells = <1>;
63 #size-cells = <1>;
64 compatible = "cfi-flash";
66 bank-width = <2>;
67 device-width = <1>;
69 u-boot@0 {
71 read-only;
89 compatible = "fsl,mpc837xmds-bcsr";
93 #address-cells = <1>;
94 #size-cells = <1>;
95 compatible = "fsl,mpc8377-fcm-nand",
96 "fsl,elbc-fcm-nand";
99 u-boot@0 {
101 read-only;
115 #address-cells = <1>;
116 #size-cells = <1>;
118 compatible = "simple-bus";
121 bus-frequency = <0>;
128 sleep-nexus {
129 #address-cells = <1>;
130 #size-cells = <1>;
131 compatible = "simple-bus";
132 sleep = <&pmc 0x0c000000>;
136 #address-cells = <1>;
137 #size-cells = <0>;
138 cell-index = <0>;
139 compatible = "fsl-i2c";
142 interrupt-parent = <&ipic>;
149 interrupt-parent = <&ipic>;
154 compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
157 interrupt-parent = <&ipic>;
158 sdhci,wp-inverted;
159 /* Filled in by U-Boot */
160 clock-frequency = <0>;
165 #address-cells = <1>;
166 #size-cells = <0>;
167 cell-index = <1>;
168 compatible = "fsl-i2c";
171 interrupt-parent = <&ipic>;
176 cell-index = <0>;
180 interrupt-parent = <&ipic>;
185 compatible = "fsl-usb2-dr";
187 #address-cells = <1>;
188 #size-cells = <0>;
189 interrupt-parent = <&ipic>;
193 sleep = <&pmc 0x00c00000>;
197 #address-cells = <1>;
198 #size-cells = <1>;
199 cell-index = <0>;
205 local-mac-address = [ 00 00 00 00 00 00 ];
207 phy-connection-type = "mii";
208 interrupt-parent = <&ipic>;
209 tbi-handle = <&tbi0>;
210 phy-handle = <&phy2>;
211 sleep = <&pmc 0xc0000000>;
212 fsl,magic-packet;
215 #address-cells = <1>;
216 #size-cells = <0>;
217 compatible = "fsl,gianfar-mdio";
220 phy2: ethernet-phy@2 {
221 interrupt-parent = <&ipic>;
226 phy3: ethernet-phy@3 {
227 interrupt-parent = <&ipic>;
232 tbi0: tbi-phy@11 {
234 device_type = "tbi-phy";
240 #address-cells = <1>;
241 #size-cells = <1>;
242 cell-index = <1>;
248 local-mac-address = [ 00 00 00 00 00 00 ];
250 phy-connection-type = "mii";
251 interrupt-parent = <&ipic>;
252 tbi-handle = <&tbi1>;
253 phy-handle = <&phy3>;
254 sleep = <&pmc 0x30000000>;
255 fsl,magic-packet;
258 #address-cells = <1>;
259 #size-cells = <0>;
260 compatible = "fsl,gianfar-tbi";
263 tbi1: tbi-phy@11 {
265 device_type = "tbi-phy";
271 cell-index = <0>;
275 clock-frequency = <0>;
277 interrupt-parent = <&ipic>;
281 cell-index = <1>;
285 clock-frequency = <0>;
287 interrupt-parent = <&ipic>;
291 #address-cells = <1>;
292 #size-cells = <1>;
293 compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
296 interrupt-parent = <&ipic>;
298 cell-index = <0>;
299 dma-channel@0 {
300 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
302 cell-index = <0>;
303 interrupt-parent = <&ipic>;
306 dma-channel@80 {
307 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
309 cell-index = <1>;
310 interrupt-parent = <&ipic>;
313 dma-channel@100 {
314 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
316 cell-index = <2>;
317 interrupt-parent = <&ipic>;
320 dma-channel@180 {
321 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
323 cell-index = <3>;
324 interrupt-parent = <&ipic>;
334 interrupt-parent = <&ipic>;
335 fsl,num-channels = <4>;
336 fsl,channel-fifo-len = <24>;
337 fsl,exec-units-mask = <0x9fe>;
338 fsl,descriptor-types-mask = <0x3ab0ebf>;
339 sleep = <&pmc 0x03000000>;
343 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
346 interrupt-parent = <&ipic>;
347 sleep = <&pmc 0x000000c0>;
351 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
354 interrupt-parent = <&ipic>;
355 sleep = <&pmc 0x00000030>;
362 * sense == 2: Edge, high-to-low change
366 interrupt-controller;
367 #address-cells = <0>;
368 #interrupt-cells = <2>;
373 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
376 interrupt-parent = <&ipic>;
381 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
382 interrupt-map = <
425 interrupt-parent = <&ipic>;
427 bus-range = <0x0 0x0>;
431 sleep = <&pmc 0x00010000>;
432 clock-frequency = <0>;
433 #interrupt-cells = <1>;
434 #size-cells = <2>;
435 #address-cells = <3>;
438 compatible = "fsl,mpc8349-pci";
443 #address-cells = <3>;
444 #size-cells = <2>;
445 #interrupt-cells = <1>;
447 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
451 bus-range = <0 255>;
452 interrupt-map-mask = <0xf800 0 0 7>;
453 interrupt-map = <0 0 0 1 &ipic 1 8
457 sleep = <&pmc 0x00300000>;
458 clock-frequency = <0>;
461 #address-cells = <3>;
462 #size-cells = <2>;
475 #address-cells = <3>;
476 #size-cells = <2>;
477 #interrupt-cells = <1>;
479 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
483 bus-range = <0 255>;
484 interrupt-map-mask = <0xf800 0 0 7>;
485 interrupt-map = <0 0 0 1 &ipic 2 8
489 sleep = <&pmc 0x000c0000>;
490 clock-frequency = <0>;
493 #address-cells = <3>;
494 #size-cells = <2>;