Lines Matching +full:3 +full:- +full:cell
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <0x20>; // 32 bytes
32 i-cache-line-size = <0x20>; // 32 bytes
33 d-cache-size = <16384>; // L1, 16K
34 i-cache-size = <16384>; // L1, 16K
35 timebase-frequency = <0>;
36 bus-frequency = <0>;
37 clock-frequency = <0>;
47 #address-cells = <1>;
48 #size-cells = <1>;
50 compatible = "simple-bus";
53 bus-frequency = <0>;
62 compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
65 interrupt-parent = <&ipic>;
69 #address-cells = <1>;
70 #size-cells = <0>;
71 cell-index = <0>;
72 compatible = "fsl-i2c";
75 interrupt-parent = <&ipic>;
80 cell-index = <0>;
84 clock-frequency = <0>;
86 interrupt-parent = <&ipic>;
90 cell-index = <1>;
94 clock-frequency = <0>;
96 interrupt-parent = <&ipic>;
100 #address-cells = <1>;
101 #size-cells = <1>;
102 compatible = "fsl,mpc8323-dma", "fsl,elo-dma";
105 interrupt-parent = <&ipic>;
107 cell-index = <0>;
108 dma-channel@0 {
109 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
111 cell-index = <0>;
112 interrupt-parent = <&ipic>;
115 dma-channel@80 {
116 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
118 cell-index = <1>;
119 interrupt-parent = <&ipic>;
122 dma-channel@100 {
123 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
125 cell-index = <2>;
126 interrupt-parent = <&ipic>;
129 dma-channel@180 {
130 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
132 cell-index = <3>;
133 interrupt-parent = <&ipic>;
142 interrupt-parent = <&ipic>;
143 fsl,num-channels = <1>;
144 fsl,channel-fifo-len = <24>;
145 fsl,exec-units-mask = <0x4c>;
146 fsl,descriptor-types-mask = <0x0122003f>;
151 interrupt-controller;
152 #address-cells = <0>;
153 #interrupt-cells = <2>;
159 #address-cells = <1>;
160 #size-cells = <1>;
162 ranges = <3 0x1448 0x18>;
163 compatible = "fsl,mpc8323-qe-pario";
165 num-ports = <7>;
167 qe_pio_d: gpio-controller@1448 {
168 #gpio-cells = <2>;
169 compatible = "fsl,mpc8323-qe-pario-bank";
170 reg = <3 0x18>;
171 gpio-controller;
175 pio-map = <
177 3 4 3 0 2 0 /* MDIO */
178 3 5 1 0 2 0 /* MDC */
179 3 21 2 0 1 0 /* RX_CLK (CLK16) */
180 3 23 2 0 1 0 /* TX_CLK (CLK3) */
196 ucc3pio:ucc_pin@3 {
197 pio-map = <
200 3 24 2 0 1 0 /* TX_CLK (CLK10) */
204 1 3 1 0 1 0 /* TxD3 */
220 #address-cells = <1>;
221 #size-cells = <1>;
226 brg-frequency = <0>;
227 bus-frequency = <198000000>;
228 fsl,qe-num-riscs = <1>;
229 fsl,qe-num-snums = <28>;
232 #address-cells = <1>;
233 #size-cells = <1>;
234 compatible = "fsl,qe-muram", "fsl,cpm-muram";
237 data-only@0 {
238 compatible = "fsl,qe-muram-data",
239 "fsl,cpm-muram-data";
245 #address-cells = <1>;
246 #size-cells = <0>;
247 cell-index = <0>;
251 interrupt-parent = <&qeic>;
252 cs-gpios = <&qe_pio_d 13 0>;
253 mode = "cpu-qe";
255 mmc-slot@0 {
256 compatible = "fsl,mpc8323rdb-mmc-slot",
257 "mmc-spi-slot";
261 voltage-ranges = <3300 3300>;
262 spi-max-frequency = <50000000>;
267 cell-index = <1>;
271 interrupt-parent = <&qeic>;
278 cell-index = <2>;
281 interrupt-parent = <&qeic>;
282 local-mac-address = [ 00 00 00 00 00 00 ];
283 rx-clock-name = "clk16";
284 tx-clock-name = "clk3";
285 phy-handle = <&phy00>;
286 pio-handle = <&ucc2pio>;
292 cell-index = <3>;
295 interrupt-parent = <&qeic>;
296 local-mac-address = [ 00 00 00 00 00 00 ];
297 rx-clock-name = "clk9";
298 tx-clock-name = "clk10";
299 phy-handle = <&phy04>;
300 pio-handle = <&ucc3pio>;
304 #address-cells = <1>;
305 #size-cells = <0>;
307 compatible = "fsl,ucc-mdio";
309 phy00:ethernet-phy@0 {
312 phy04:ethernet-phy@4 {
317 qeic:interrupt-controller@80 {
318 interrupt-controller;
319 compatible = "fsl,qe-ic";
320 #address-cells = <0>;
321 #interrupt-cells = <1>;
323 big-endian;
325 interrupt-parent = <&ipic>;
330 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
331 interrupt-map = <
347 interrupt-parent = <&ipic>;
349 bus-range = <0x0 0x0>;
353 clock-frequency = <0>;
354 #interrupt-cells = <1>;
355 #size-cells = <2>;
356 #address-cells = <3>;
359 compatible = "fsl,mpc8349-pci";