Lines Matching +full:preserve +full:- +full:clocking
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
32 compatible = "cfi-flash";
34 #address-cells = <1>;
35 #size-cells = <1>;
36 bank-width = <4>;
37 device-width = <2>;
42 read-only;
52 device-tree@3ec0000 {
53 label = "device-tree";
56 u-boot@3f00000 {
57 label = "u-boot";
58 reg = <0x03f00000 0x00100000>; // 1M for u-boot
59 read-only;
63 board-control@2,0 {
64 compatible = "fsl,mpc5121ads-cpld";
69 compatible = "fsl,mpc5121ads-cpld-pic";
70 interrupt-controller;
71 #interrupt-cells = <2>;
85 fsl,preserve-clocking;
104 phy-handle = <&phy0>;
120 phy0: ethernet-phy@0 {
133 fsl,invert-drvvbus;
134 fsl,invert-pwr-fault;
139 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
144 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
149 compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc";
150 fsl,mode = "ac97-slave";
151 fsl,rx-fifo-size = <384>;
152 fsl,tx-fifo-size = <384>;
157 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
158 interrupt-map = <
159 /* IDSEL 0x15 - Slot 1 PCI */
165 /* IDSEL 0x16 - Slot 2 MiniPCI */
169 /* IDSEL 0x17 - Slot 3 MiniPCI */