Lines Matching +full:0 +full:x0d0
22 dcr-parent = <&{/cpus/cpu@0}>;
30 #size-cells = <0>;
32 cpu@0 {
35 reg = <0x00000000>;
49 reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
55 cell-index = <0>;
56 dcr-reg = <0x0c0 0x009>;
57 #address-cells = <0>;
58 #size-cells = <0>;
67 dcr-reg = <0x0d0 0x009>;
68 #address-cells = <0>;
69 #size-cells = <0>;
71 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
80 clock-frequency = <0>; // Filled in by zImage
88 ranges = <0x00000000 0x00000001 0x00000000 0x80000000
89 0x80000000 0x00000001 0x80000000 0x80000000>;
90 clock-frequency = <0>; // Filled in by zImage
94 reg = <0x40000200 0x00000008>;
95 virtual-reg = <0xe0000200>;
99 interrupts = <0x0 0x4>;
106 reg = <0 0xEF703000 0x2000>;
110 reg = <0 0xEF701000 0x1000>;