Lines Matching +full:1 +full:- +full:cell
12 /dts-v1/;
15 #address-cells = <2>;
16 #size-cells = <1>;
19 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by cuboot */
36 timebase-frequency = <0>; /* Filled in by cuboot */
37 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
39 d-cache-size = <32768>;
40 i-cache-size = <32768>;
41 dcr-controller;
42 dcr-access-method = "native";
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <50000000>;
57 clock-output-names = "mmc_clk";
62 #address-cells = <0>;
63 #size-cells = <0>;
64 #interrupt-cells = <2>;
66 interrupt-controller;
67 cell-index = <0>;
68 dcr-reg = <0x2c0 0x8>;
72 first pair is non-critical, second is critical */
74 #address-cells = <0>;
75 #size-cells = <0>;
76 #interrupt-cells = <2>;
79 interrupt-controller;
80 cell-index = <1>;
81 dcr-reg = <0x2c8 0x8>;
82 interrupt-parent = <&UIC0>;
88 #address-cells = <0>;
89 #size-cells = <0>;
90 #interrupt-cells = <2>;
93 interrupt-controller;
94 cell-index = <2>;
95 dcr-reg = <0x350 0x8>;
96 interrupt-parent = <&UIC0>;
102 #address-cells = <0>;
103 #size-cells = <0>;
104 #interrupt-cells = <2>;
107 interrupt-controller;
108 cell-index = <3>;
109 dcr-reg = <0x358 0x8>;
110 interrupt-parent = <&UIC0>;
116 #address-cells = <0>;
117 #size-cells = <0>;
118 #interrupt-cells = <2>;
121 interrupt-controller;
122 cell-index = <4>;
123 dcr-reg = <0x360 0x8>;
124 interrupt-parent = <&UIC0>;
129 #address-cells = <0>;
130 #size-cells = <0>;
131 #interrupt-cells = <2>;
134 interrupt-controller;
135 cell-index = <5>;
136 dcr-reg = <0x368 0x8>;
137 interrupt-parent = <&UIC0>;
142 #address-cells = <0>;
143 #size-cells = <0>;
144 #interrupt-cells = <2>;
147 interrupt-controller;
148 cell-index = <6>;
149 dcr-reg = <0x370 0x8>;
150 interrupt-parent = <&UIC0>;
156 #address-cells = <0>;
157 #size-cells = <0>;
158 #interrupt-cells = <2>;
161 interrupt-controller;
162 cell-index = <7>;
163 dcr-reg = <0x2d0 0x8>;
164 interrupt-parent = <&UIC1_0>;
169 #address-cells = <0>;
170 #size-cells = <0>;
171 #interrupt-cells = <2>;
174 interrupt-controller;
175 cell-index = <8>;
176 dcr-reg = <0x2d8 0x8>;
177 interrupt-parent = <&UIC1_0>;
178 interrupts = <17 0x4 1 0x84>;
182 #address-cells = <0>;
183 #size-cells = <0>;
184 #interrupt-cells = <2>;
187 interrupt-controller;
188 cell-index = <9>;
189 dcr-reg = <0x2e0 0x8>;
190 interrupt-parent = <&UIC1_0>;
195 #address-cells = <0>;
196 #size-cells = <0>;
197 #interrupt-cells = <2>;
200 interrupt-controller;
201 cell-index = <10>;
202 dcr-reg = <0x2e8 0x8>;
203 interrupt-parent = <&UIC1_0>;
208 #address-cells = <0>;
209 #size-cells = <0>;
210 #interrupt-cells = <2>;
213 interrupt-controller;
214 cell-index = <11>;
215 dcr-reg = <0x2f0 0x8>;
216 interrupt-parent = <&UIC1_0>;
221 #address-cells = <0>;
222 #size-cells = <0>;
223 #interrupt-cells = <2>;
226 interrupt-controller;
227 cell-index = <12>;
228 dcr-reg = <0x2f8 0x8>;
229 interrupt-parent = <&UIC1_0>;
234 #address-cells = <0>;
235 #size-cells = <0>;
236 #interrupt-cells = <2>;
239 interrupt-controller;
240 cell-index = <13>;
241 dcr-reg = <0x300 0x8>;
242 interrupt-parent = <&UIC1_0>;
247 #address-cells = <0>;
248 #size-cells = <0>;
249 #interrupt-cells = <2>;
252 interrupt-controller;
253 cell-index = <14>;
254 dcr-reg = <0x308 0x8>;
255 interrupt-parent = <&UIC1_0>;
260 #address-cells = <0>;
261 #size-cells = <0>;
262 #interrupt-cells = <2>;
265 interrupt-controller;
266 cell-index = <15>;
267 dcr-reg = <0x310 0x8>;
268 interrupt-parent = <&UIC1_0>;
273 #address-cells = <0>;
274 #size-cells = <0>;
275 #interrupt-cells = <2>;
278 interrupt-controller;
279 cell-index = <16>;
280 dcr-reg = <0x318 0x8>;
281 interrupt-parent = <&UIC1_0>;
286 #address-cells = <0>;
287 #size-cells = <0>;
288 #interrupt-cells = <2>;
291 interrupt-controller;
292 cell-index = <17>;
293 dcr-reg = <0x320 0x8>;
294 interrupt-parent = <&UIC1_0>;
299 #address-cells = <0>;
300 #size-cells = <0>;
301 #interrupt-cells = <2>;
304 interrupt-controller;
305 cell-index = <18>;
306 dcr-reg = <0x328 0x8>;
307 interrupt-parent = <&UIC1_0>;
312 #address-cells = <0>;
313 #size-cells = <0>;
314 #interrupt-cells = <2>;
317 interrupt-controller;
318 cell-index = <19>;
319 dcr-reg = <0x330 0x8>;
320 interrupt-parent = <&UIC1_0>;
325 #address-cells = <0>;
326 #size-cells = <0>;
327 #interrupt-cells = <2>;
330 interrupt-controller;
331 cell-index = <20>;
332 dcr-reg = <0x338 0x8>;
333 interrupt-parent = <&UIC1_0>;
338 #address-cells = <0>;
339 #size-cells = <0>;
340 #interrupt-cells = <2>;
343 interrupt-controller;
344 cell-index = <21>;
345 dcr-reg = <0x340 0x8>;
346 interrupt-parent = <&UIC1_0>;
351 #address-cells = <0>;
352 #size-cells = <0>;
353 #interrupt-cells = <2>;
356 interrupt-controller;
357 cell-index = <22>;
358 dcr-reg = <0x348 0x8>;
359 interrupt-parent = <&UIC1_0>;
365 #address-cells = <2>;
366 #size-cells = <1>;
369 MCW0: memory-controller-wrapper {
370 compatible = "ibm,cw-476fsp2";
371 dcr-reg = <0x11111800 0x40>;
374 MCIF0: memory-controller {
375 compatible = "ibm,sdram-476fsp2", "ibm,sdram-4xx-ddr3";
376 dcr-reg = <0x11120000 0x10000>;
377 mcer-device = <&MCW0>;
378 interrupt-parent = <&UIC0>;
386 #address-cells = <1>;
387 #size-cells = <1>;
390 clock-frequency = <333333334>;
392 plb6-system-hung-irq {
393 compatible = "ibm,bus-error-irq";
394 #interrupt-cells = <2>;
395 interrupt-parent = <&UIC0>;
399 l2-error-irq {
400 compatible = "ibm,bus-error-irq";
401 #interrupt-cells = <2>;
402 interrupt-parent = <&UIC0>;
406 plb6-plb4-irq {
407 compatible = "ibm,bus-error-irq";
408 #interrupt-cells = <2>;
409 interrupt-parent = <&UIC0>;
410 interrupts = <1 0x84>;
413 plb4-ahb-irq {
414 compatible = "ibm,bus-error-irq";
415 #interrupt-cells = <2>;
416 interrupt-parent = <&UIC1_3>;
420 opbd-error-irq {
421 compatible = "ibm,opbd-error-irq";
422 #interrupt-cells = <2>;
423 interrupt-parent = <&UIC1_4>;
427 cmu-error-irq {
428 compatible = "ibm,cmu-error-irq";
429 #interrupt-cells = <2>;
430 interrupt-parent = <&UIC0>;
434 conf-error-irq {
435 compatible = "ibm,conf-error-irq";
436 #interrupt-cells = <2>;
437 interrupt-parent = <&UIC1_4>;
441 mc-ue-irq {
442 compatible = "ibm,mc-ue-irq";
443 #interrupt-cells = <2>;
444 interrupt-parent = <&UIC0>;
448 reset-warning-irq {
449 compatible = "ibm,reset-warning-irq";
450 #interrupt-cells = <2>;
451 interrupt-parent = <&UIC0>;
456 #interrupt-cells = <1>;
457 #address-cells = <0>;
458 #size-cells = <0>;
460 dcr-reg = <0x80 0x80>;
461 num-tx-chans = <1>;
462 num-rx-chans = <1>;
463 interrupt-parent = <&MAL0>;
464 interrupts = <0 1 2 3 4>;
465 /* index interrupt-parent interrupt# type */
466 interrupt-map = </*TXEOB*/ 0 &UIC1_2 4 0x4
467 /*RXEOB*/ 1 &UIC1_2 3 0x4
474 #interrupt-cells = <1>;
475 #address-cells = <0>;
476 #size-cells = <0>;
478 dcr-reg = <0x100 0x80>;
479 num-tx-chans = <1>;
480 num-rx-chans = <1>;
481 interrupt-parent = <&MAL1>;
482 interrupts = <0 1 2 3 4>;
483 /* index interrupt-parent interrupt# type */
484 interrupt-map = </*TXEOB*/ 0 &UIC1_2 12 0x4
485 /*RXEOB*/ 1 &UIC1_2 11 0x4
492 compatible = "st,sdhci-stih407", "st,sdhci";
494 reg-names = "mmc";
496 interrupt-parent = <&UIC1_3>;
497 interrupt-names = "mmcirq";
498 pinctrl-names = "default";
499 pinctrl-0 = <>;
500 clock-names = "mmc";
502 bus-width = <4>;
503 non-removable;
504 sd-uhs-sdr50;
505 sd-uhs-sdr104;
506 sd-uhs-ddr50;
511 #address-cells = <1>;
512 #size-cells = <1>;
513 ranges; // pass-thru to parent bus
514 clock-frequency = <83333334>;
517 linux,network-index = <0>;
520 has-inverted-stacr-oc;
521 interrupt-parent = <&UIC1_2>;
522 interrupts = <1 0x4 0 0x4>;
524 local-mac-address = [000000000000]; /* Filled in by
526 mal-device = <&MAL0>;
527 mal-tx-channel = <0>;
528 mal-rx-channel = <0>;
529 cell-index = <0>;
530 max-frame-size = <1500>;
531 rx-fifo-size = <4096>;
532 tx-fifo-size = <4096>;
533 rx-fifo-size-gige = <16384>;
534 tx-fifo-size-gige = <8192>;
535 phy-address = <1>;
536 phy-mode = "rgmii";
537 phy-map = <00000003>;
538 rgmii-device = <&RGMII>;
539 rgmii-channel = <0>;
543 linux,network-index = <1>;
546 has-inverted-stacr-oc;
547 interrupt-parent = <&UIC1_2>;
550 local-mac-address = [000000000000]; /* Filled in by
552 mal-device = <&MAL1>;
553 mal-tx-channel = <0>;
554 mal-rx-channel = <0>;
555 cell-index = <1>;
556 max-frame-size = <1500>;
557 rx-fifo-size = <4096>;
558 tx-fifo-size = <4096>;
559 rx-fifo-size-gige = <16384>;
560 tx-fifo-size-gige = <8192>;
561 phy-address = <2>;
562 phy-mode = "rgmii";
563 phy-map = <00000003>;
564 rgmii-device = <&RGMII>;
565 rgmii-channel = <1>;
570 has-mdio;
578 virtual-reg = <0xb0020000>;
579 clock-frequency = <20833333>;
580 current-speed = <115200>;
581 interrupt-parent = <&UIC0>;
587 compatible = "ohci-le";
589 interrupt-parent = <&UIC1_3>;
594 compatible = "ohci-le";
596 interrupt-parent = <&UIC1_3>;
601 compatible = "usb-ehci";
603 interrupt-parent = <&UIC1_3>;
610 stdout-path = "/plb/opb/serial@b0020000";