Lines Matching +full:0 +full:x2e0
19 dcr-parent = <&{/cpus/cpu@0}>;
29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0x0>;
35 clock-frequency = <0>; /* Filled in by cuboot */
36 timebase-frequency = <0>; /* Filled in by cuboot */
48 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by
55 #clock-cells = <0>;
62 #address-cells = <0>;
63 #size-cells = <0>;
67 cell-index = <0>;
68 dcr-reg = <0x2c0 0x8>;
74 #address-cells = <0>;
75 #size-cells = <0>;
81 dcr-reg = <0x2c8 0x8>;
83 interrupts = <21 0x4 4 0x84>;
88 #address-cells = <0>;
89 #size-cells = <0>;
95 dcr-reg = <0x350 0x8>;
97 interrupts = <22 0x4 5 0x84>;
102 #address-cells = <0>;
103 #size-cells = <0>;
109 dcr-reg = <0x358 0x8>;
111 interrupts = <23 0x4 6 0x84>;
116 #address-cells = <0>;
117 #size-cells = <0>;
123 dcr-reg = <0x360 0x8>;
125 interrupts = <24 0x4 7 0x84>;
129 #address-cells = <0>;
130 #size-cells = <0>;
136 dcr-reg = <0x368 0x8>;
138 interrupts = <25 0x4 8 0x84>;
142 #address-cells = <0>;
143 #size-cells = <0>;
149 dcr-reg = <0x370 0x8>;
151 interrupts = <26 0x4 9 0x84>;
156 #address-cells = <0>;
157 #size-cells = <0>;
163 dcr-reg = <0x2d0 0x8>;
165 interrupts = <16 0x4 0 0x84>;
169 #address-cells = <0>;
170 #size-cells = <0>;
176 dcr-reg = <0x2d8 0x8>;
178 interrupts = <17 0x4 1 0x84>;
182 #address-cells = <0>;
183 #size-cells = <0>;
189 dcr-reg = <0x2e0 0x8>;
191 interrupts = <18 0x4 2 0x84>;
195 #address-cells = <0>;
196 #size-cells = <0>;
202 dcr-reg = <0x2e8 0x8>;
204 interrupts = <19 0x4 3 0x84>;
208 #address-cells = <0>;
209 #size-cells = <0>;
215 dcr-reg = <0x2f0 0x8>;
217 interrupts = <20 0x4 4 0x84>;
221 #address-cells = <0>;
222 #size-cells = <0>;
228 dcr-reg = <0x2f8 0x8>;
230 interrupts = <21 0x4 5 0x84>;
234 #address-cells = <0>;
235 #size-cells = <0>;
241 dcr-reg = <0x300 0x8>;
243 interrupts = <22 0x4 6 0x84>;
247 #address-cells = <0>;
248 #size-cells = <0>;
254 dcr-reg = <0x308 0x8>;
256 interrupts = <23 0x4 7 0x84>;
260 #address-cells = <0>;
261 #size-cells = <0>;
267 dcr-reg = <0x310 0x8>;
269 interrupts = <24 0x4 8 0x84>;
273 #address-cells = <0>;
274 #size-cells = <0>;
280 dcr-reg = <0x318 0x8>;
282 interrupts = <25 0x4 9 0x84>;
286 #address-cells = <0>;
287 #size-cells = <0>;
293 dcr-reg = <0x320 0x8>;
295 interrupts = <26 0x4 10 0x84>;
299 #address-cells = <0>;
300 #size-cells = <0>;
306 dcr-reg = <0x328 0x8>;
308 interrupts = <27 0x4 11 0x84>;
312 #address-cells = <0>;
313 #size-cells = <0>;
319 dcr-reg = <0x330 0x8>;
321 interrupts = <28 0x4 12 0x84>;
325 #address-cells = <0>;
326 #size-cells = <0>;
332 dcr-reg = <0x338 0x8>;
334 interrupts = <29 0x4 13 0x84>;
338 #address-cells = <0>;
339 #size-cells = <0>;
345 dcr-reg = <0x340 0x8>;
347 interrupts = <30 0x4 14 0x84>;
351 #address-cells = <0>;
352 #size-cells = <0>;
358 dcr-reg = <0x348 0x8>;
360 interrupts = <31 0x4 15 0x84>;
371 dcr-reg = <0x11111800 0x40>;
376 dcr-reg = <0x11120000 0x10000>;
379 interrupts = <10 0x84 /* ECC UE */
380 11 0x84>; /* ECC CE */
388 ranges = <0x00000000 0x00000010 0x00000000 0x80000000
389 0x80000000 0x00000010 0x80000000 0x80000000>;
396 interrupts = <0 0x84>;
403 interrupts = <20 0x84>;
410 interrupts = <1 0x84>;
417 interrupts = <20 0x84>;
424 interrupts = <5 0x84>;
431 interrupts = <28 0x84>;
438 interrupts = <11 0x84>;
445 interrupts = <10 0x84>;
452 interrupts = <17 0x84>;
457 #address-cells = <0>;
458 #size-cells = <0>;
460 dcr-reg = <0x80 0x80>;
464 interrupts = <0 1 2 3 4>;
466 interrupt-map = </*TXEOB*/ 0 &UIC1_2 4 0x4
467 /*RXEOB*/ 1 &UIC1_2 3 0x4
468 /*SERR*/ 2 &UIC1_2 7 0x4
469 /*TXDE*/ 3 &UIC1_2 6 0x4
470 /*RXDE*/ 4 &UIC1_2 5 0x4>;
475 #address-cells = <0>;
476 #size-cells = <0>;
478 dcr-reg = <0x100 0x80>;
482 interrupts = <0 1 2 3 4>;
484 interrupt-map = </*TXEOB*/ 0 &UIC1_2 12 0x4
485 /*RXEOB*/ 1 &UIC1_2 11 0x4
486 /*SERR*/ 2 &UIC1_2 15 0x4
487 /*TXDE*/ 3 &UIC1_2 14 0x4
488 /*RXDE*/ 4 &UIC1_2 13 0x4>;
493 reg = <0x020c0000 0x20000>;
495 interrupts = <21 0x4>;
499 pinctrl-0 = <>;
517 linux,network-index = <0>;
522 interrupts = <1 0x4 0 0x4>;
523 reg = <0xb0000000 0x100>;
527 mal-tx-channel = <0>;
528 mal-rx-channel = <0>;
529 cell-index = <0>;
539 rgmii-channel = <0>;
548 interrupts = <9 0x4 8 0x4>;
549 reg = <0xb0000100 0x100>;
553 mal-tx-channel = <0>;
554 mal-rx-channel = <0>;
571 reg = <0xb0000600 0x8>;
577 reg = <0xb0020000 0x8>;
578 virtual-reg = <0xb0020000>;
582 interrupts = <31 0x4>;
588 reg = <0x02040000 0xa0>;
590 interrupts = <28 0x8 29 0x8>;
595 reg = <0x02080000 0xa0>;
597 interrupts = <30 0x8 31 0x8>;
602 reg = <0x02000000 0xa4>;
604 interrupts = <23 0x4>;