Lines Matching +full:0 +full:xfe000000
48 size = <0 0x1000000>;
49 alignment = <0 0x1000000>;
52 size = <0 0x400000>;
53 alignment = <0 0x400000>;
56 size = <0 0x2000000>;
57 alignment = <0 0x2000000>;
62 reg = <0xf 0xfe124000 0 0x2000>;
63 ranges = <0 0 0xf 0xe8000000 0x08000000
64 2 0 0xf 0xff800000 0x00010000
65 3 0 0xf 0xffdf0000 0x00008000>;
67 nor@0,0 {
71 reg = <0x0 0x0 0x8000000>;
77 nand@1,0 {
81 reg = <0x2 0x0 0x10000>;
84 boardctrl: board-control@2,0 {
88 reg = <3 0 0x300>;
89 ranges = <0 3 0 0x300>;
98 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
102 ranges = <0x0 0xf 0xf4000000 0x2000000>;
106 ranges = <0x0 0xf 0xf6000000 0x2000000>;
110 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
111 reg = <0xf 0xfe000000 0 0x00001000>;
113 flash@0 {
117 reg = <0>;
125 reg = <0x4c>;
130 reg = <0x68>;
131 interrupts = <0x1 0x1 0 0>;
136 reg = <0x50>;
143 reg = <0x77>;
153 reg = <0xf 0xfe240000 0 0x10000>;
154 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
155 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
156 pcie@0 {
157 ranges = <0x02000000 0 0xe0000000
158 0x02000000 0 0xe0000000
159 0 0x20000000
161 0x01000000 0 0x00000000
162 0x01000000 0 0x00000000
163 0 0x00010000>;
168 reg = <0xf 0xfe250000 0 0x10000>;
169 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x10000000
170 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
171 pcie@0 {
172 ranges = <0x02000000 0 0xe0000000
173 0x02000000 0 0xe0000000
174 0 0x20000000
176 0x01000000 0 0x00000000
177 0x01000000 0 0x00000000
178 0 0x00010000>;
183 reg = <0xf 0xfe260000 0 0x1000>;
184 ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
185 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
186 pcie@0 {
187 ranges = <0x02000000 0 0xe0000000
188 0x02000000 0 0xe0000000
189 0 0x20000000
191 0x01000000 0 0x00000000
192 0x01000000 0 0x00000000
193 0 0x00010000>;
198 reg = <0xf 0xfe270000 0 0x10000>;
199 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x10000000
200 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
201 pcie@0 {
202 ranges = <0x02000000 0 0xe0000000
203 0x02000000 0 0xe0000000
204 0 0x20000000
206 0x01000000 0 0x00000000
207 0x01000000 0 0x00000000
208 0 0x00010000>;