Lines Matching +full:0 +full:xf4000000
42 size = <0 0x1000000>;
43 alignment = <0 0x1000000>;
46 size = <0 0x400000>;
47 alignment = <0 0x400000>;
50 size = <0 0x2000000>;
51 alignment = <0 0x2000000>;
56 reg = <0xf 0xfe124000 0 0x2000>;
57 ranges = <0 0 0xf 0xe8000000 0x08000000
58 2 0 0xf 0xff800000 0x00010000
59 3 0 0xf 0xffdf0000 0x00008000>;
61 nor@0,0 {
65 reg = <0x0 0x0 0x8000000>;
70 nand@2,0 {
74 reg = <0x2 0x0 0x10000>;
77 cpld@3,0 {
79 reg = <3 0 0x300>;
88 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
92 ranges = <0x0 0xf 0xf4000000 0x2000000>;
96 ranges = <0x0 0xf 0xf6000000 0x2000000>;
100 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
101 reg = <0xf 0xfe000000 0 0x00001000>;
104 flash@0 {
108 reg = <0>;
126 reg = <0x4c>;
131 reg = <0x68>;
132 interrupts = <0x2 0x1 0 0>;
148 reg = <0x77>;
150 #size-cells = <0>;
157 reg = <0xf 0xfe240000 0 0x10000>;
158 ranges = <0x02000000 0 0xe0000000 0xc 0x0 0x0 0x10000000
159 0x01000000 0 0x0 0xf 0xf8000000 0x0 0x00010000>;
160 pcie@0 {
161 ranges = <0x02000000 0 0xe0000000
162 0x02000000 0 0xe0000000
163 0 0x10000000
165 0x01000000 0 0x00000000
166 0x01000000 0 0x00000000
167 0 0x00010000>;
172 reg = <0xf 0xfe250000 0 0x10000>;
173 ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
174 0x01000000 0 0 0xf 0xf8010000 0 0x00010000>;
175 pcie@0 {
176 ranges = <0x02000000 0 0xe0000000
177 0x02000000 0 0xe0000000
178 0 0x10000000
180 0x01000000 0 0x00000000
181 0x01000000 0 0x00000000
182 0 0x00010000>;
187 reg = <0xf 0xfe260000 0 0x10000>;
188 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
189 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
190 pcie@0 {
191 ranges = <0x02000000 0 0xe0000000
192 0x02000000 0 0xe0000000
193 0 0x10000000
195 0x01000000 0 0x00000000
196 0x01000000 0 0x00000000
197 0 0x00010000>;
202 reg = <0xf 0xfe270000 0 0x10000>;
203 ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
204 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
205 pcie@0 {
206 ranges = <0x02000000 0 0xe0000000
207 0x02000000 0 0xe0000000
208 0 0x10000000
210 0x01000000 0 0x00000000
211 0x01000000 0 0x00000000
212 0 0x00010000>;
217 ranges = <0x0 0xf 0xfe140000 0x40000>;
218 reg = <0xf 0xfe140000 0 0x480>;
219 brg-frequency = <0>;
220 bus-frequency = <0>;
224 reg = <0x700 0x80>;
229 reg = <0x1000 0x800>;
238 fsl,tx-timeslot-mask = <0xfffffffe>;
239 fsl,rx-timeslot-mask = <0xfffffffe>;
241 fsl,tdm-id = <0>;
242 fsl,siram-entry-id = <0>;
248 port-number = <0>;