Lines Matching +full:x1000 +full:- +full:mac
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
34 d-cache-line-size = <32>; // 32 bytes
35 i-cache-line-size = <32>; // 32 bytes
36 d-cache-size = <0x8000>; // L1, 32K
37 i-cache-size = <0x8000>; // L1, 32K
38 timebase-frequency = <0>; // 33 MHz, from uboot
39 bus-frequency = <0>; // 166 MHz
40 clock-frequency = <0>; // 825 MHz, from uboot
41 next-level-cache = <&L2>;
51 #address-cells = <1>;
52 #size-cells = <1>;
54 compatible = "simple-bus";
56 bus-frequency = <0>;
58 ecm-law@0 {
59 compatible = "fsl,ecm-law";
60 reg = <0x0 0x1000>;
61 fsl,num-laws = <8>;
65 compatible = "fsl,mpc8540-ecm", "fsl,ecm";
66 reg = <0x1000 0x1000>;
68 interrupt-parent = <&mpic>;
71 memory-controller@2000 {
72 compatible = "fsl,mpc8540-memory-controller";
73 reg = <0x2000 0x1000>;
74 interrupt-parent = <&mpic>;
78 L2: l2-cache-controller@20000 {
79 compatible = "fsl,mpc8540-l2-cache-controller";
80 reg = <0x20000 0x1000>;
81 cache-line-size = <32>; // 32 bytes
82 cache-size = <0x40000>; // L2, 256K
83 interrupt-parent = <&mpic>;
88 #address-cells = <1>;
89 #size-cells = <0>;
90 cell-index = <0>;
91 compatible = "fsl-i2c";
94 interrupt-parent = <&mpic>;
99 #address-cells = <1>;
100 #size-cells = <1>;
101 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
104 cell-index = <0>;
105 dma-channel@0 {
106 compatible = "fsl,mpc8540-dma-channel",
107 "fsl,eloplus-dma-channel";
109 cell-index = <0>;
110 interrupt-parent = <&mpic>;
113 dma-channel@80 {
114 compatible = "fsl,mpc8540-dma-channel",
115 "fsl,eloplus-dma-channel";
117 cell-index = <1>;
118 interrupt-parent = <&mpic>;
121 dma-channel@100 {
122 compatible = "fsl,mpc8540-dma-channel",
123 "fsl,eloplus-dma-channel";
125 cell-index = <2>;
126 interrupt-parent = <&mpic>;
129 dma-channel@180 {
130 compatible = "fsl,mpc8540-dma-channel",
131 "fsl,eloplus-dma-channel";
133 cell-index = <3>;
134 interrupt-parent = <&mpic>;
140 #address-cells = <1>;
141 #size-cells = <1>;
142 cell-index = <0>;
146 reg = <0x24000 0x1000>;
147 ranges = <0x0 0x24000 0x1000>;
148 local-mac-address = [ 00 00 00 00 00 00 ];
150 interrupt-parent = <&mpic>;
151 tbi-handle = <&tbi0>;
152 phy-handle = <&phy0>;
155 #address-cells = <1>;
156 #size-cells = <0>;
157 compatible = "fsl,gianfar-mdio";
160 phy0: ethernet-phy@0 {
161 interrupt-parent = <&mpic>;
165 phy1: ethernet-phy@1 {
166 interrupt-parent = <&mpic>;
170 phy3: ethernet-phy@3 {
171 interrupt-parent = <&mpic>;
175 tbi0: tbi-phy@11 {
177 device_type = "tbi-phy";
183 #address-cells = <1>;
184 #size-cells = <1>;
185 cell-index = <1>;
189 reg = <0x25000 0x1000>;
190 ranges = <0x0 0x25000 0x1000>;
191 local-mac-address = [ 00 00 00 00 00 00 ];
193 interrupt-parent = <&mpic>;
194 tbi-handle = <&tbi1>;
195 phy-handle = <&phy1>;
198 #address-cells = <1>;
199 #size-cells = <0>;
200 compatible = "fsl,gianfar-tbi";
203 tbi1: tbi-phy@11 {
205 device_type = "tbi-phy";
211 #address-cells = <1>;
212 #size-cells = <1>;
213 cell-index = <2>;
217 reg = <0x26000 0x1000>;
218 ranges = <0x0 0x26000 0x1000>;
219 local-mac-address = [ 00 00 00 00 00 00 ];
221 interrupt-parent = <&mpic>;
222 tbi-handle = <&tbi2>;
223 phy-handle = <&phy3>;
226 #address-cells = <1>;
227 #size-cells = <0>;
228 compatible = "fsl,gianfar-tbi";
231 tbi2: tbi-phy@11 {
233 device_type = "tbi-phy";
239 cell-index = <0>;
243 clock-frequency = <0>; // should we fill in in uboot?
245 interrupt-parent = <&mpic>;
249 cell-index = <1>;
253 clock-frequency = <0>; // should we fill in in uboot?
255 interrupt-parent = <&mpic>;
258 interrupt-controller;
259 #address-cells = <0>;
260 #interrupt-cells = <2>;
262 compatible = "chrp,open-pic";
263 device_type = "open-pic";
268 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
269 interrupt-map = <
272 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
273 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
274 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
275 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
342 interrupt-parent = <&mpic>;
344 bus-range = <0 0>;
347 clock-frequency = <66666666>;
348 #interrupt-cells = <1>;
349 #size-cells = <2>;
350 #address-cells = <3>;
351 reg = <0xe0008000 0x1000>;
352 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";